1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for the TWSI (i2c) controller found on the Marvell
4 * orion5x and kirkwood SoC families.
6 * Author: Albert Aribaud <albert.u.boot@aribaud.net>
7 * Copyright (c) 2010 Albert Aribaud.
12 #include <linux/errno.h>
14 #include <linux/bitops.h>
15 #include <linux/compat.h>
20 DECLARE_GLOBAL_DATA_PTR;
23 * Include a file that will provide CONFIG_I2C_MVTWSI_BASE*, and possibly other
28 #if defined(CONFIG_ORION5X)
29 #include <asm/arch/orion5x.h>
30 #elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
31 #include <asm/arch/soc.h>
32 #elif defined(CONFIG_ARCH_SUNXI)
33 #include <asm/arch/i2c.h>
35 #error Driver mvtwsi not supported by SoC or board
37 #endif /* CONFIG_DM_I2C */
40 * On SUNXI, we get CONFIG_SYS_TCLK from this include, so we want to
43 #if defined(CONFIG_DM_I2C) && defined(CONFIG_ARCH_SUNXI)
44 #include <asm/arch/i2c.h>
48 * TWSI register structure
51 #ifdef CONFIG_ARCH_SUNXI
53 struct mvtwsi_registers {
61 u32 debug; /* Dummy field for build compatibility with mvebu */
66 struct mvtwsi_registers {
71 u32 status; /* When reading */
72 u32 baudrate; /* When writing */
84 struct mvtwsi_i2c_dev {
85 /* TWSI Register base for the device */
86 struct mvtwsi_registers *base;
87 /* Number of the device (determined from cell-index property) */
89 /* The I2C slave address for the device */
91 /* The configured I2C speed in Hz */
93 /* The current length of a clock period (depending on speed) */
96 #endif /* CONFIG_DM_I2C */
99 * enum mvtwsi_ctrl_register_fields - Bit masks for flags in the control
102 enum mvtwsi_ctrl_register_fields {
103 /* Acknowledge bit */
104 MVTWSI_CONTROL_ACK = 0x00000004,
106 MVTWSI_CONTROL_IFLG = 0x00000008,
108 MVTWSI_CONTROL_STOP = 0x00000010,
110 MVTWSI_CONTROL_START = 0x00000020,
112 MVTWSI_CONTROL_TWSIEN = 0x00000040,
113 /* Interrupt enable */
114 MVTWSI_CONTROL_INTEN = 0x00000080,
118 * On sun6i and newer, IFLG is a write-clear bit, which is cleared by writing 1;
119 * on other platforms, it is a normal r/w bit, which is cleared by writing 0.
122 #ifdef CONFIG_SUNXI_GEN_SUN6I
123 #define MVTWSI_CONTROL_CLEAR_IFLG 0x00000008
125 #define MVTWSI_CONTROL_CLEAR_IFLG 0x00000000
129 * enum mvstwsi_status_values - Possible values of I2C controller's status
132 * Only those statuses expected in normal master operation on
133 * non-10-bit-address devices are specified.
135 * Every status that's unexpected during normal operation (bus errors,
136 * arbitration losses, missing ACKs...) is passed back to the caller as an error
139 enum mvstwsi_status_values {
140 /* START condition transmitted */
141 MVTWSI_STATUS_START = 0x08,
142 /* Repeated START condition transmitted */
143 MVTWSI_STATUS_REPEATED_START = 0x10,
144 /* Address + write bit transmitted, ACK received */
145 MVTWSI_STATUS_ADDR_W_ACK = 0x18,
146 /* Data transmitted, ACK received */
147 MVTWSI_STATUS_DATA_W_ACK = 0x28,
148 /* Address + read bit transmitted, ACK received */
149 MVTWSI_STATUS_ADDR_R_ACK = 0x40,
150 /* Address + read bit transmitted, ACK not received */
151 MVTWSI_STATUS_ADDR_R_NAK = 0x48,
152 /* Data received, ACK transmitted */
153 MVTWSI_STATUS_DATA_R_ACK = 0x50,
154 /* Data received, ACK not transmitted */
155 MVTWSI_STATUS_DATA_R_NAK = 0x58,
156 /* No relevant status */
157 MVTWSI_STATUS_IDLE = 0xF8,
161 * enum mvstwsi_ack_flags - Determine whether a read byte should be
162 * acknowledged or not.
164 enum mvtwsi_ack_flags {
165 /* Send NAK after received byte */
167 /* Send ACK after received byte */
172 * calc_tick() - Calculate the duration of a clock cycle from the I2C speed
174 * @speed: The speed in Hz to calculate the clock cycle duration for.
175 * @return The duration of a clock cycle in ns.
177 inline uint calc_tick(uint speed)
179 /* One tick = the duration of a period at the specified speed in ns (we
180 * add 100 ns to be on the safe side) */
181 return (1000000000u / speed) + 100;
184 #ifndef CONFIG_DM_I2C
187 * twsi_get_base() - Get controller register base for specified adapter
189 * @adap: Adapter to get the register base for.
190 * @return Register base for the specified adapter.
192 static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
194 switch (adap->hwadapnr) {
195 #ifdef CONFIG_I2C_MVTWSI_BASE0
197 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE0;
199 #ifdef CONFIG_I2C_MVTWSI_BASE1
201 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE1;
203 #ifdef CONFIG_I2C_MVTWSI_BASE2
205 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE2;
207 #ifdef CONFIG_I2C_MVTWSI_BASE3
209 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE3;
211 #ifdef CONFIG_I2C_MVTWSI_BASE4
213 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE4;
215 #ifdef CONFIG_I2C_MVTWSI_BASE5
217 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE5;
220 printf("Missing mvtwsi controller %d base\n", adap->hwadapnr);
229 * enum mvtwsi_error_class - types of I2C errors
231 enum mvtwsi_error_class {
232 /* The controller returned a different status than expected */
233 MVTWSI_ERROR_WRONG_STATUS = 0x01,
234 /* The controller timed out */
235 MVTWSI_ERROR_TIMEOUT = 0x02,
239 * mvtwsi_error() - Build I2C return code from error information
241 * For debugging purposes, this function packs some information of an occurred
242 * error into a return code. These error codes are returned from I2C API
243 * functions (i2c_{read,write}, dm_i2c_{read,write}, etc.).
245 * @ec: The error class of the error (enum mvtwsi_error_class).
246 * @lc: The last value of the control register.
247 * @ls: The last value of the status register.
248 * @es: The expected value of the status register.
249 * @return The generated error code.
251 inline uint mvtwsi_error(uint ec, uint lc, uint ls, uint es)
253 return ((ec << 24) & 0xFF000000)
254 | ((lc << 16) & 0x00FF0000)
255 | ((ls << 8) & 0x0000FF00)
260 * twsi_wait() - Wait for I2C bus interrupt flag and check status, or time out.
262 * @return Zero if status is as expected, or a non-zero code if either a time
263 * out occurred, or the status was not the expected one.
265 static int twsi_wait(struct mvtwsi_registers *twsi, int expected_status,
272 control = readl(&twsi->control);
273 if (control & MVTWSI_CONTROL_IFLG) {
274 status = readl(&twsi->status);
275 if (status == expected_status)
279 MVTWSI_ERROR_WRONG_STATUS,
280 control, status, expected_status);
282 ndelay(tick); /* One clock cycle */
284 status = readl(&twsi->status);
285 return mvtwsi_error(MVTWSI_ERROR_TIMEOUT, control, status,
290 * twsi_start() - Assert a START condition on the bus.
292 * This function is used in both single I2C transactions and inside
293 * back-to-back transactions (repeated starts).
295 * @twsi: The MVTWSI register structure to use.
296 * @expected_status: The I2C bus status expected to be asserted after the
297 * operation completion.
298 * @tick: The duration of a clock cycle at the current I2C speed.
299 * @return Zero if status is as expected, or a non-zero code if either a time
300 * out occurred or the status was not the expected one.
302 static int twsi_start(struct mvtwsi_registers *twsi, int expected_status,
306 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_START |
307 MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
308 /* Wait for controller to process START */
309 return twsi_wait(twsi, expected_status, tick);
313 * twsi_send() - Send a byte on the I2C bus.
315 * The byte may be part of an address byte or data.
317 * @twsi: The MVTWSI register structure to use.
318 * @byte: The byte to send.
319 * @expected_status: The I2C bus status expected to be asserted after the
320 * operation completion.
321 * @tick: The duration of a clock cycle at the current I2C speed.
322 * @return Zero if status is as expected, or a non-zero code if either a time
323 * out occurred or the status was not the expected one.
325 static int twsi_send(struct mvtwsi_registers *twsi, u8 byte,
326 int expected_status, uint tick)
328 /* Write byte to data register for sending */
329 writel(byte, &twsi->data);
330 /* Clear any pending interrupt -- that will cause sending */
331 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_CLEAR_IFLG,
333 /* Wait for controller to receive byte, and check ACK */
334 return twsi_wait(twsi, expected_status, tick);
338 * twsi_recv() - Receive a byte on the I2C bus.
340 * The static variable mvtwsi_control_flags controls whether we ack or nak.
342 * @twsi: The MVTWSI register structure to use.
343 * @byte: The byte to send.
344 * @ack_flag: Flag that determines whether the received byte should
345 * be acknowledged by the controller or not (sent ACK/NAK).
346 * @tick: The duration of a clock cycle at the current I2C speed.
347 * @return Zero if status is as expected, or a non-zero code if either a time
348 * out occurred or the status was not the expected one.
350 static int twsi_recv(struct mvtwsi_registers *twsi, u8 *byte, int ack_flag,
353 int expected_status, status, control;
355 /* Compute expected status based on passed ACK flag */
356 expected_status = ack_flag ? MVTWSI_STATUS_DATA_R_ACK :
357 MVTWSI_STATUS_DATA_R_NAK;
358 /* Acknowledge *previous state*, and launch receive */
359 control = MVTWSI_CONTROL_TWSIEN;
360 control |= ack_flag == MVTWSI_READ_ACK ? MVTWSI_CONTROL_ACK : 0;
361 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
362 /* Wait for controller to receive byte, and assert ACK or NAK */
363 status = twsi_wait(twsi, expected_status, tick);
364 /* If we did receive the expected byte, store it */
366 *byte = readl(&twsi->data);
371 * twsi_stop() - Assert a STOP condition on the bus.
373 * This function is also used to force the bus back to idle state (SDA =
376 * @twsi: The MVTWSI register structure to use.
377 * @tick: The duration of a clock cycle at the current I2C speed.
378 * @return Zero if the operation succeeded, or a non-zero code if a time out
381 static int twsi_stop(struct mvtwsi_registers *twsi, uint tick)
383 int control, stop_status;
388 control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
389 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
390 /* Wait for IDLE; IFLG won't rise, so we can't use twsi_wait() */
392 stop_status = readl(&twsi->status);
393 if (stop_status == MVTWSI_STATUS_IDLE)
395 ndelay(tick); /* One clock cycle */
397 control = readl(&twsi->control);
398 if (stop_status != MVTWSI_STATUS_IDLE)
399 status = mvtwsi_error(MVTWSI_ERROR_TIMEOUT,
400 control, status, MVTWSI_STATUS_IDLE);
405 * twsi_calc_freq() - Compute I2C frequency depending on m and n parameters.
407 * @n: Parameter 'n' for the frequency calculation algorithm.
408 * @m: Parameter 'm' for the frequency calculation algorithm.
409 * @return The I2C frequency corresponding to the passed m and n parameters.
411 static uint twsi_calc_freq(const int n, const int m)
413 #ifdef CONFIG_ARCH_SUNXI
414 return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
416 return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
421 * twsi_reset() - Reset the I2C controller.
423 * Resetting the controller also resets the baud rate and slave address, hence
424 * they must be re-established after the reset.
426 * @twsi: The MVTWSI register structure to use.
428 static void twsi_reset(struct mvtwsi_registers *twsi)
430 /* Reset controller */
431 writel(0, &twsi->soft_reset);
432 /* Wait 2 ms -- this is what the Marvell LSP does */
437 * __twsi_i2c_set_bus_speed() - Set the speed of the I2C controller.
439 * This function sets baud rate to the highest possible value that does not
440 * exceed the requested rate.
442 * @twsi: The MVTWSI register structure to use.
443 * @requested_speed: The desired frequency the controller should run at
445 * @return The actual frequency the controller was configured to.
447 static uint __twsi_i2c_set_bus_speed(struct mvtwsi_registers *twsi,
448 uint requested_speed)
450 uint tmp_speed, highest_speed, n, m;
451 uint baud = 0x44; /* Baud rate after controller reset */
454 /* Successively try m, n combinations, and use the combination
455 * resulting in the largest speed that's not above the requested
457 for (n = 0; n < 8; n++) {
458 for (m = 0; m < 16; m++) {
459 tmp_speed = twsi_calc_freq(n, m);
460 if ((tmp_speed <= requested_speed) &&
461 (tmp_speed > highest_speed)) {
462 highest_speed = tmp_speed;
467 writel(baud, &twsi->baudrate);
469 /* Wait for controller for one tick */
471 ndelay(calc_tick(highest_speed));
475 return highest_speed;
479 * __twsi_i2c_init() - Initialize the I2C controller.
481 * @twsi: The MVTWSI register structure to use.
482 * @speed: The initial frequency the controller should run at
484 * @slaveadd: The I2C address to be set for the I2C master.
485 * @actual_speed: A output parameter that receives the actual frequency
486 * in Hz the controller was set to by the function.
487 * @return Zero if the operation succeeded, or a non-zero code if a time out
490 static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
491 int slaveadd, uint *actual_speed)
495 /* Reset controller */
498 tmp_speed = __twsi_i2c_set_bus_speed(twsi, speed);
500 *actual_speed = tmp_speed;
501 /* Set slave address; even though we don't use it */
502 writel(slaveadd, &twsi->slave_address);
503 writel(0, &twsi->xtnd_slave_addr);
504 /* Assert STOP, but don't care for the result */
506 (void) twsi_stop(twsi, calc_tick(*actual_speed));
508 (void) twsi_stop(twsi, 10000);
513 * i2c_begin() - Start a I2C transaction.
515 * Begin a I2C transaction with a given expected start status and chip address.
516 * A START is asserted, and the address byte is sent to the I2C controller. The
517 * expected address status will be derived from the direction bit (bit 0) of
520 * @twsi: The MVTWSI register structure to use.
521 * @expected_start_status: The I2C status the controller is expected to
522 * assert after the address byte was sent.
523 * @addr: The address byte to be sent.
524 * @tick: The duration of a clock cycle at the current
526 * @return Zero if the operation succeeded, or a non-zero code if a time out or
527 * unexpected I2C status occurred.
529 static int i2c_begin(struct mvtwsi_registers *twsi, int expected_start_status,
532 int status, expected_addr_status;
534 /* Compute the expected address status from the direction bit in
535 * the address byte */
536 if (addr & 1) /* Reading */
537 expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
539 expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
541 status = twsi_start(twsi, expected_start_status, tick);
542 /* Send out the address if the start went well */
544 status = twsi_send(twsi, addr, expected_addr_status, tick);
545 /* Return 0, or the status of the first failure */
550 * __twsi_i2c_probe_chip() - Probe the given I2C chip address.
552 * This function begins a I2C read transaction, does a dummy read and NAKs; if
553 * the procedure succeeds, the chip is considered to be present.
555 * @twsi: The MVTWSI register structure to use.
556 * @chip: The chip address to probe.
557 * @tick: The duration of a clock cycle at the current I2C speed.
558 * @return Zero if the operation succeeded, or a non-zero code if a time out or
559 * unexpected I2C status occurred.
561 static int __twsi_i2c_probe_chip(struct mvtwsi_registers *twsi, uchar chip,
568 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1) | 1, tick);
569 /* Dummy read was accepted: receive byte, but NAK it. */
571 status = twsi_recv(twsi, &dummy_byte, MVTWSI_READ_NAK, tick);
572 /* Stop transaction */
573 twsi_stop(twsi, tick);
574 /* Return 0, or the status of the first failure */
579 * __twsi_i2c_read() - Read data from a I2C chip.
581 * This function begins a I2C write transaction, and transmits the address
582 * bytes; then begins a I2C read transaction, and receives the data bytes.
584 * NOTE: Some devices want a stop right before the second start, while some
585 * will choke if it is there. Since deciding this is not yet supported in
586 * higher level APIs, we need to make a decision here, and for the moment that
587 * will be a repeated start without a preceding stop.
589 * @twsi: The MVTWSI register structure to use.
590 * @chip: The chip address to read from.
591 * @addr: The address bytes to send.
592 * @alen: The length of the address bytes in bytes.
593 * @data: The buffer to receive the data read from the chip (has to have
594 * a size of at least 'length' bytes).
595 * @length: The amount of data to be read from the chip in bytes.
596 * @tick: The duration of a clock cycle at the current I2C speed.
597 * @return Zero if the operation succeeded, or a non-zero code if a time out or
598 * unexpected I2C status occurred.
600 static int __twsi_i2c_read(struct mvtwsi_registers *twsi, uchar chip,
601 u8 *addr, int alen, uchar *data, int length,
606 int expected_start = MVTWSI_STATUS_START;
609 /* Begin i2c write to send the address bytes */
610 status = i2c_begin(twsi, expected_start, (chip << 1), tick);
611 /* Send address bytes */
612 while ((status == 0) && alen--)
613 status = twsi_send(twsi, addr[alen],
614 MVTWSI_STATUS_DATA_W_ACK, tick);
615 /* Send repeated STARTs after the initial START */
616 expected_start = MVTWSI_STATUS_REPEATED_START;
618 /* Begin i2c read to receive data bytes */
620 status = i2c_begin(twsi, expected_start, (chip << 1) | 1, tick);
621 /* Receive actual data bytes; set NAK if we if we have nothing more to
623 while ((status == 0) && length--)
624 status = twsi_recv(twsi, data++,
626 MVTWSI_READ_ACK : MVTWSI_READ_NAK, tick);
627 /* Stop transaction */
628 stop_status = twsi_stop(twsi, tick);
629 /* Return 0, or the status of the first failure */
630 return status != 0 ? status : stop_status;
634 * __twsi_i2c_write() - Send data to a I2C chip.
636 * This function begins a I2C write transaction, and transmits the address
637 * bytes; then begins a new I2C write transaction, and sends the data bytes.
639 * @twsi: The MVTWSI register structure to use.
640 * @chip: The chip address to read from.
641 * @addr: The address bytes to send.
642 * @alen: The length of the address bytes in bytes.
643 * @data: The buffer containing the data to be sent to the chip.
644 * @length: The length of data to be sent to the chip in bytes.
645 * @tick: The duration of a clock cycle at the current I2C speed.
646 * @return Zero if the operation succeeded, or a non-zero code if a time out or
647 * unexpected I2C status occurred.
649 static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip,
650 u8 *addr, int alen, uchar *data, int length,
653 int status, stop_status;
655 /* Begin i2c write to send first the address bytes, then the
657 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1), tick);
658 /* Send address bytes */
659 while ((status == 0) && (alen-- > 0))
660 status = twsi_send(twsi, addr[alen], MVTWSI_STATUS_DATA_W_ACK,
662 /* Send data bytes */
663 while ((status == 0) && (length-- > 0))
664 status = twsi_send(twsi, *(data++), MVTWSI_STATUS_DATA_W_ACK,
666 /* Stop transaction */
667 stop_status = twsi_stop(twsi, tick);
668 /* Return 0, or the status of the first failure */
669 return status != 0 ? status : stop_status;
672 #ifndef CONFIG_DM_I2C
673 static void twsi_i2c_init(struct i2c_adapter *adap, int speed,
676 struct mvtwsi_registers *twsi = twsi_get_base(adap);
677 __twsi_i2c_init(twsi, speed, slaveadd, NULL);
680 static uint twsi_i2c_set_bus_speed(struct i2c_adapter *adap,
681 uint requested_speed)
683 struct mvtwsi_registers *twsi = twsi_get_base(adap);
684 __twsi_i2c_set_bus_speed(twsi, requested_speed);
688 static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)
690 struct mvtwsi_registers *twsi = twsi_get_base(adap);
691 return __twsi_i2c_probe_chip(twsi, chip, 10000);
694 static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
695 int alen, uchar *data, int length)
697 struct mvtwsi_registers *twsi = twsi_get_base(adap);
700 addr_bytes[0] = (addr >> 0) & 0xFF;
701 addr_bytes[1] = (addr >> 8) & 0xFF;
702 addr_bytes[2] = (addr >> 16) & 0xFF;
703 addr_bytes[3] = (addr >> 24) & 0xFF;
705 return __twsi_i2c_read(twsi, chip, addr_bytes, alen, data, length,
709 static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
710 int alen, uchar *data, int length)
712 struct mvtwsi_registers *twsi = twsi_get_base(adap);
715 addr_bytes[0] = (addr >> 0) & 0xFF;
716 addr_bytes[1] = (addr >> 8) & 0xFF;
717 addr_bytes[2] = (addr >> 16) & 0xFF;
718 addr_bytes[3] = (addr >> 24) & 0xFF;
720 return __twsi_i2c_write(twsi, chip, addr_bytes, alen, data, length,
724 #ifdef CONFIG_I2C_MVTWSI_BASE0
725 U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
726 twsi_i2c_read, twsi_i2c_write,
727 twsi_i2c_set_bus_speed,
728 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
730 #ifdef CONFIG_I2C_MVTWSI_BASE1
731 U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe,
732 twsi_i2c_read, twsi_i2c_write,
733 twsi_i2c_set_bus_speed,
734 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1)
737 #ifdef CONFIG_I2C_MVTWSI_BASE2
738 U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe,
739 twsi_i2c_read, twsi_i2c_write,
740 twsi_i2c_set_bus_speed,
741 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2)
744 #ifdef CONFIG_I2C_MVTWSI_BASE3
745 U_BOOT_I2C_ADAP_COMPLETE(twsi3, twsi_i2c_init, twsi_i2c_probe,
746 twsi_i2c_read, twsi_i2c_write,
747 twsi_i2c_set_bus_speed,
748 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3)
751 #ifdef CONFIG_I2C_MVTWSI_BASE4
752 U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe,
753 twsi_i2c_read, twsi_i2c_write,
754 twsi_i2c_set_bus_speed,
755 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4)
758 #ifdef CONFIG_I2C_MVTWSI_BASE5
759 U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe,
760 twsi_i2c_read, twsi_i2c_write,
761 twsi_i2c_set_bus_speed,
762 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5)
765 #else /* CONFIG_DM_I2C */
767 static int mvtwsi_i2c_probe_chip(struct udevice *bus, u32 chip_addr,
770 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
771 return __twsi_i2c_probe_chip(dev->base, chip_addr, dev->tick);
774 static int mvtwsi_i2c_set_bus_speed(struct udevice *bus, uint speed)
776 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
778 dev->speed = __twsi_i2c_set_bus_speed(dev->base, speed);
779 dev->tick = calc_tick(dev->speed);
784 static int mvtwsi_i2c_ofdata_to_platdata(struct udevice *bus)
786 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
788 dev->base = devfdt_get_addr_ptr(bus);
793 dev->index = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
795 dev->slaveadd = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
796 "u-boot,i2c-slave-addr", 0x0);
797 dev->speed = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
798 "clock-frequency", 100000);
802 static void twsi_disable_i2c_slave(struct mvtwsi_registers *twsi)
804 clrbits_le32(&twsi->debug, BIT(18));
807 static int mvtwsi_i2c_bind(struct udevice *bus)
809 struct mvtwsi_registers *twsi = devfdt_get_addr_ptr(bus);
811 /* Disable the hidden slave in i2c0 of these platforms */
812 if ((IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_KIRKWOOD))
813 && bus->req_seq == 0)
814 twsi_disable_i2c_slave(twsi);
819 static int mvtwsi_i2c_probe(struct udevice *bus)
821 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
824 __twsi_i2c_init(dev->base, dev->speed, dev->slaveadd, &actual_speed);
825 dev->speed = actual_speed;
826 dev->tick = calc_tick(dev->speed);
830 static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
832 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
833 struct i2c_msg *dmsg, *omsg, dummy;
835 memset(&dummy, 0, sizeof(struct i2c_msg));
837 /* We expect either two messages (one with an offset and one with the
838 * actual data) or one message (just data or offset/data combined) */
839 if (nmsgs > 2 || nmsgs == 0) {
840 debug("%s: Only one or two messages are supported.", __func__);
844 omsg = nmsgs == 1 ? &dummy : msg;
845 dmsg = nmsgs == 1 ? msg : msg + 1;
847 if (dmsg->flags & I2C_M_RD)
848 return __twsi_i2c_read(dev->base, dmsg->addr, omsg->buf,
849 omsg->len, dmsg->buf, dmsg->len,
852 return __twsi_i2c_write(dev->base, dmsg->addr, omsg->buf,
853 omsg->len, dmsg->buf, dmsg->len,
857 static const struct dm_i2c_ops mvtwsi_i2c_ops = {
858 .xfer = mvtwsi_i2c_xfer,
859 .probe_chip = mvtwsi_i2c_probe_chip,
860 .set_bus_speed = mvtwsi_i2c_set_bus_speed,
863 static const struct udevice_id mvtwsi_i2c_ids[] = {
864 { .compatible = "marvell,mv64xxx-i2c", },
865 { .compatible = "marvell,mv78230-i2c", },
866 { .compatible = "allwinner,sun6i-a31-i2c", },
870 U_BOOT_DRIVER(i2c_mvtwsi) = {
871 .name = "i2c_mvtwsi",
873 .of_match = mvtwsi_i2c_ids,
874 .bind = mvtwsi_i2c_bind,
875 .probe = mvtwsi_i2c_probe,
876 .ofdata_to_platdata = mvtwsi_i2c_ofdata_to_platdata,
877 .priv_auto_alloc_size = sizeof(struct mvtwsi_i2c_dev),
878 .ops = &mvtwsi_i2c_ops,
880 #endif /* CONFIG_DM_I2C */