drivers/i2c/mv_i2c.c

   1 /*
   2  * (C) Copyright 2000
   3  * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
   4  *
   5  * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   6  * Marius Groeger <mgroeger@sysgo.de>
   7  *
   8  * (C) Copyright 2003 Pengutronix e.K.
   9  * Robert Schwebel <r.schwebel@pengutronix.de>
  10  *
  11  * (C) Copyright 2011 Marvell Inc.
  12  * Lei Wen <leiwen@marvell.com>
  13  *
  14  * SPDX-License-Identifier:     GPL-2.0+
  15  *
  16  * Back ported to the 8xx platform (from the 8260 platform) by
  17  * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
  18  */
  19
  20 #include <common.h>
  21 #include <dm.h>
  22 #include <i2c.h>
  23 #include <asm/io.h>
  24 #include "mv_i2c.h"
  25
  26 /* All transfers are described by this data structure */
  27 struct mv_i2c_msg {
  28         u8 condition;
  29         u8 acknack;
  30         u8 direction;
  31         u8 data;
  32 };
  33
  34 #ifdef CONFIG_ARMADA_3700
  35 /* Armada 3700 has no padding between the registers */
  36 struct mv_i2c {
  37         u32 ibmr;
  38         u32 idbr;
  39         u32 icr;
  40         u32 isr;
  41         u32 isar;
  42 };
  43 #else
  44 struct mv_i2c {
  45         u32 ibmr;
  46         u32 pad0;
  47         u32 idbr;
  48         u32 pad1;
  49         u32 icr;
  50         u32 pad2;
  51         u32 isr;
  52         u32 pad3;
  53         u32 isar;
  54 };
  55 #endif
  56
  57 /*
  58  * Dummy implementation that can be overwritten by a board
  59  * specific function
  60  */
  61 __weak void i2c_clk_enable(void)
  62 {
  63 }
  64
  65 /*
  66  * i2c_reset: - reset the host controller
  67  *
  68  */
  69 static void i2c_reset(struct mv_i2c *base)
  70 {
  71         u32 icr_mode;
  72
  73         /* Save bus mode (standard or fast speed) for later use */
  74         icr_mode = readl(&base->icr) & ICR_MODE_MASK;
  75         writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
  76         writel(readl(&base->icr) | ICR_UR, &base->icr);   /* reset the unit */
  77         udelay(100);
  78         writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
  79
  80         i2c_clk_enable();
  81
  82         writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */
  83         /* set control reg values */
  84         writel(I2C_ICR_INIT | icr_mode, &base->icr);
  85         writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */
  86         writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */
  87         udelay(100);
  88 }
  89
  90 /*
  91  * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
  92  *                        are set and cleared
  93  *
  94  * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
  95  */
  96 static int i2c_isr_set_cleared(struct mv_i2c *base, unsigned long set_mask,
  97                                unsigned long cleared_mask)
  98 {
  99         int timeout = 1000, isr;
 100
 101         do {
 102                 isr = readl(&base->isr);
 103                 udelay(10);
 104                 if (timeout-- < 0)
 105                         return 0;
 106         } while (((isr & set_mask) != set_mask)
 107                 || ((isr & cleared_mask) != 0));
 108
 109         return 1;
 110 }
 111
 112 /*
 113  * i2c_transfer: - Transfer one byte over the i2c bus
 114  *
 115  * This function can tranfer a byte over the i2c bus in both directions.
 116  * It is used by the public API functions.
 117  *
 118  * @return:  0: transfer successful
 119  *          -1: message is empty
 120  *          -2: transmit timeout
 121  *          -3: ACK missing
 122  *          -4: receive timeout
 123  *          -5: illegal parameters
 124  *          -6: bus is busy and couldn't be aquired
 125  */
 126 static int i2c_transfer(struct mv_i2c *base, struct mv_i2c_msg *msg)
 127 {
 128         int ret;
 129
 130         if (!msg)
 131                 goto transfer_error_msg_empty;
 132
 133         switch (msg->direction) {
 134         case I2C_WRITE:
 135                 /* check if bus is not busy */
 136                 if (!i2c_isr_set_cleared(base, 0, ISR_IBB))
 137                         goto transfer_error_bus_busy;
 138
 139                 /* start transmission */
 140                 writel(readl(&base->icr) & ~ICR_START, &base->icr);
 141                 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
 142                 writel(msg->data, &base->idbr);
 143                 if (msg->condition == I2C_COND_START)
 144                         writel(readl(&base->icr) | ICR_START, &base->icr);
 145                 if (msg->condition == I2C_COND_STOP)
 146                         writel(readl(&base->icr) | ICR_STOP, &base->icr);
 147                 if (msg->acknack == I2C_ACKNAK_SENDNAK)
 148                         writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
 149                 if (msg->acknack == I2C_ACKNAK_SENDACK)
 150                         writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
 151                 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
 152                 writel(readl(&base->icr) | ICR_TB, &base->icr);
 153
 154                 /* transmit register empty? */
 155                 if (!i2c_isr_set_cleared(base, ISR_ITE, 0))
 156                         goto transfer_error_transmit_timeout;
 157
 158                 /* clear 'transmit empty' state */
 159                 writel(readl(&base->isr) | ISR_ITE, &base->isr);
 160
 161                 /* wait for ACK from slave */
 162                 if (msg->acknack == I2C_ACKNAK_WAITACK)
 163                         if (!i2c_isr_set_cleared(base, 0, ISR_ACKNAK))
 164                                 goto transfer_error_ack_missing;
 165                 break;
 166
 167         case I2C_READ:
 168
 169                 /* check if bus is not busy */
 170                 if (!i2c_isr_set_cleared(base, 0, ISR_IBB))
 171                         goto transfer_error_bus_busy;
 172
 173                 /* start receive */
 174                 writel(readl(&base->icr) & ~ICR_START, &base->icr);
 175                 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
 176                 if (msg->condition == I2C_COND_START)
 177                         writel(readl(&base->icr) | ICR_START, &base->icr);
 178                 if (msg->condition == I2C_COND_STOP)
 179                         writel(readl(&base->icr) | ICR_STOP, &base->icr);
 180                 if (msg->acknack == I2C_ACKNAK_SENDNAK)
 181                         writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
 182                 if (msg->acknack == I2C_ACKNAK_SENDACK)
 183                         writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
 184                 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
 185                 writel(readl(&base->icr) | ICR_TB, &base->icr);
 186
 187                 /* receive register full? */
 188                 if (!i2c_isr_set_cleared(base, ISR_IRF, 0))
 189                         goto transfer_error_receive_timeout;
 190
 191                 msg->data = readl(&base->idbr);
 192
 193                 /* clear 'receive empty' state */
 194                 writel(readl(&base->isr) | ISR_IRF, &base->isr);
 195                 break;
 196         default:
 197                 goto transfer_error_illegal_param;
 198         }
 199
 200         return 0;
 201
 202 transfer_error_msg_empty:
 203         debug("i2c_transfer: error: 'msg' is empty\n");
 204         ret = -1;
 205         goto i2c_transfer_finish;
 206
 207 transfer_error_transmit_timeout:
 208         debug("i2c_transfer: error: transmit timeout\n");
 209         ret = -2;
 210         goto i2c_transfer_finish;
 211
 212 transfer_error_ack_missing:
 213         debug("i2c_transfer: error: ACK missing\n");
 214         ret = -3;
 215         goto i2c_transfer_finish;
 216
 217 transfer_error_receive_timeout:
 218         debug("i2c_transfer: error: receive timeout\n");
 219         ret = -4;
 220         goto i2c_transfer_finish;
 221
 222 transfer_error_illegal_param:
 223         debug("i2c_transfer: error: illegal parameters\n");
 224         ret = -5;
 225         goto i2c_transfer_finish;
 226
 227 transfer_error_bus_busy:
 228         debug("i2c_transfer: error: bus is busy\n");
 229         ret = -6;
 230         goto i2c_transfer_finish;
 231
 232 i2c_transfer_finish:
 233         debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr));
 234         i2c_reset(base);
 235         return ret;
 236 }
 237
 238 static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
 239                       uchar *buffer, int len)
 240 {
 241         struct mv_i2c_msg msg;
 242
 243         debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
 244               "len=0x%02x)\n", chip, *addr, alen, len);
 245
 246         i2c_reset(base);
 247
 248         /* dummy chip address write */
 249         debug("i2c_read: dummy chip address write\n");
 250         msg.condition = I2C_COND_START;
 251         msg.acknack   = I2C_ACKNAK_WAITACK;
 252         msg.direction = I2C_WRITE;
 253         msg.data = (chip << 1);
 254         msg.data &= 0xFE;
 255         if (i2c_transfer(base, &msg))
 256                 return -1;
 257
 258         /*
 259          * send memory address bytes;
 260          * alen defines how much bytes we have to send.
 261          */
 262         while (--alen >= 0) {
 263                 debug("i2c_read: send address byte %02x (alen=%d)\n",
 264                       *addr, alen);
 265                 msg.condition = I2C_COND_NORMAL;
 266                 msg.acknack   = I2C_ACKNAK_WAITACK;
 267                 msg.direction = I2C_WRITE;
 268                 msg.data      = *(addr++);
 269                 if (i2c_transfer(base, &msg))
 270                         return -1;
 271         }
 272
 273         /* start read sequence */
 274         debug("i2c_read: start read sequence\n");
 275         msg.condition = I2C_COND_START;
 276         msg.acknack   = I2C_ACKNAK_WAITACK;
 277         msg.direction = I2C_WRITE;
 278         msg.data      = (chip << 1);
 279         msg.data     |= 0x01;
 280         if (i2c_transfer(base, &msg))
 281                 return -1;
 282
 283         /* read bytes; send NACK at last byte */
 284         while (len--) {
 285                 if (len == 0) {
 286                         msg.condition = I2C_COND_STOP;
 287                         msg.acknack   = I2C_ACKNAK_SENDNAK;
 288                 } else {
 289                         msg.condition = I2C_COND_NORMAL;
 290                         msg.acknack   = I2C_ACKNAK_SENDACK;
 291                 }
 292
 293                 msg.direction = I2C_READ;
 294                 msg.data      = 0x00;
 295                 if (i2c_transfer(base, &msg))
 296                         return -1;
 297
 298                 *buffer = msg.data;
 299                 debug("i2c_read: reading byte (%p)=0x%02x\n",
 300                       buffer, *buffer);
 301                 buffer++;
 302         }
 303
 304         i2c_reset(base);
 305
 306         return 0;
 307 }
 308
 309 static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
 310                        uchar *buffer, int len)
 311 {
 312         struct mv_i2c_msg msg;
 313
 314         debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
 315               "len=0x%02x)\n", chip, *addr, alen, len);
 316
 317         i2c_reset(base);
 318
 319         /* chip address write */
 320         debug("i2c_write: chip address write\n");
 321         msg.condition = I2C_COND_START;
 322         msg.acknack   = I2C_ACKNAK_WAITACK;
 323         msg.direction = I2C_WRITE;
 324         msg.data = (chip << 1);
 325         msg.data &= 0xFE;
 326         if (i2c_transfer(base, &msg))
 327                 return -1;
 328
 329         /*
 330          * send memory address bytes;
 331          * alen defines how much bytes we have to send.
 332          */
 333         while (--alen >= 0) {
 334                 debug("i2c_read: send address byte %02x (alen=%d)\n",
 335                       *addr, alen);
 336                 msg.condition = I2C_COND_NORMAL;
 337                 msg.acknack   = I2C_ACKNAK_WAITACK;
 338                 msg.direction = I2C_WRITE;
 339                 msg.data      = *(addr++);
 340                 if (i2c_transfer(base, &msg))
 341                         return -1;
 342         }
 343
 344         /* write bytes; send NACK at last byte */
 345         while (len--) {
 346                 debug("i2c_write: writing byte (%p)=0x%02x\n",
 347                       buffer, *buffer);
 348
 349                 if (len == 0)
 350                         msg.condition = I2C_COND_STOP;
 351                 else
 352                         msg.condition = I2C_COND_NORMAL;
 353
 354                 msg.acknack   = I2C_ACKNAK_WAITACK;
 355                 msg.direction = I2C_WRITE;
 356                 msg.data      = *(buffer++);
 357
 358                 if (i2c_transfer(base, &msg))
 359                         return -1;
 360         }
 361
 362         i2c_reset(base);
 363
 364         return 0;
 365 }
 366
 367 #ifndef CONFIG_DM_I2C
 368
 369 static struct mv_i2c *base_glob;
 370
 371 static void i2c_board_init(struct mv_i2c *base)
 372 {
 373 #ifdef CONFIG_SYS_I2C_INIT_BOARD
 374         u32 icr;
 375         /*
 376          * call board specific i2c bus reset routine before accessing the
 377          * environment, which might be in a chip on that bus. For details
 378          * about this problem see doc/I2C_Edge_Conditions.
 379          *
 380          * disable I2C controller first, otherwhise it thinks we want to
 381          * talk to the slave port...
 382          */
 383         icr = readl(&base->icr);
 384         writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
 385
 386         i2c_init_board();
 387
 388         writel(icr, &base->icr);
 389 #endif
 390 }
 391
 392 #ifdef CONFIG_I2C_MULTI_BUS
 393 static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
 394 static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
 395 static unsigned int current_bus;
 396
 397 int i2c_set_bus_num(unsigned int bus)
 398 {
 399         if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
 400                 printf("Bad bus: %d\n", bus);
 401                 return -1;
 402         }
 403
 404         base_glob = (struct mv_i2c *)i2c_regs[bus];
 405         current_bus = bus;
 406
 407         if (!bus_initialized[current_bus]) {
 408                 i2c_board_init(base_glob);
 409                 bus_initialized[current_bus] = 1;
 410         }
 411
 412         return 0;
 413 }
 414
 415 unsigned int i2c_get_bus_num(void)
 416 {
 417         return current_bus;
 418 }
 419 #endif
 420
 421 /* API Functions */
 422 void i2c_init(int speed, int slaveaddr)
 423 {
 424         u32 val;
 425
 426 #ifdef CONFIG_I2C_MULTI_BUS
 427         current_bus = 0;
 428         base_glob = (struct mv_i2c *)i2c_regs[current_bus];
 429 #else
 430         base_glob = (struct mv_i2c *)CONFIG_MV_I2C_REG;
 431 #endif
 432
 433         if (speed > 100000)
 434                 val = ICR_FM;
 435         else
 436                 val = ICR_SM;
 437         clrsetbits_le32(&base_glob->icr, ICR_MODE_MASK, val);
 438
 439         i2c_board_init(base_glob);
 440 }
 441
 442 static int __i2c_probe_chip(struct mv_i2c *base, uchar chip)
 443 {
 444         struct mv_i2c_msg msg;
 445
 446         i2c_reset(base);
 447
 448         msg.condition = I2C_COND_START;
 449         msg.acknack   = I2C_ACKNAK_WAITACK;
 450         msg.direction = I2C_WRITE;
 451         msg.data      = (chip << 1) + 1;
 452         if (i2c_transfer(base, &msg))
 453                 return -1;
 454
 455         msg.condition = I2C_COND_STOP;
 456         msg.acknack   = I2C_ACKNAK_SENDNAK;
 457         msg.direction = I2C_READ;
 458         msg.data      = 0x00;
 459         if (i2c_transfer(base, &msg))
 460                 return -1;
 461
 462         return 0;
 463 }
 464
 465 /*
 466  * i2c_probe: - Test if a chip answers for a given i2c address
 467  *
 468  * @chip:       address of the chip which is searched for
 469  * @return:     0 if a chip was found, -1 otherwhise
 470  */
 471 int i2c_probe(uchar chip)
 472 {
 473         return __i2c_probe_chip(base_glob, chip);
 474 }
 475
 476 /*
 477  * i2c_read: - Read multiple bytes from an i2c device
 478  *
 479  * The higher level routines take into account that this function is only
 480  * called with len < page length of the device (see configuration file)
 481  *
 482  * @chip:      address of the chip which is to be read
 483  * @addr:      i2c data address within the chip
 484  * @alen:      length of the i2c data address (1..2 bytes)
 485  * @buffer:    where to write the data
 486  * @len:       how much byte do we want to read
 487  * @return:    0 in case of success
 488  */
 489 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 490 {
 491         u8 addr_bytes[4];
 492
 493         addr_bytes[0] = (addr >> 0) & 0xFF;
 494         addr_bytes[1] = (addr >> 8) & 0xFF;
 495         addr_bytes[2] = (addr >> 16) & 0xFF;
 496         addr_bytes[3] = (addr >> 24) & 0xFF;
 497
 498         return __i2c_read(base_glob, chip, addr_bytes, alen, buffer, len);
 499 }
 500
 501 /*
 502  * i2c_write: -  Write multiple bytes to an i2c device
 503  *
 504  * The higher level routines take into account that this function is only
 505  * called with len < page length of the device (see configuration file)
 506  *
 507  * @chip:       address of the chip which is to be written
 508  * @addr:       i2c data address within the chip
 509  * @alen:       length of the i2c data address (1..2 bytes)
 510  * @buffer:     where to find the data to be written
 511  * @len:        how much byte do we want to read
 512  * @return:     0 in case of success
 513  */
 514 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 515 {
 516         u8 addr_bytes[4];
 517
 518         addr_bytes[0] = (addr >> 0) & 0xFF;
 519         addr_bytes[1] = (addr >> 8) & 0xFF;
 520         addr_bytes[2] = (addr >> 16) & 0xFF;
 521         addr_bytes[3] = (addr >> 24) & 0xFF;
 522
 523         return __i2c_write(base_glob, chip, addr_bytes, alen, buffer, len);
 524 }
 525
 526 #else /* CONFIG_DM_I2C */
 527
 528 struct mv_i2c_priv {
 529         struct mv_i2c *base;
 530 };
 531
 532 static int mv_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
 533 {
 534         struct mv_i2c_priv *i2c = dev_get_priv(bus);
 535         struct i2c_msg *dmsg, *omsg, dummy;
 536
 537         memset(&dummy, 0, sizeof(struct i2c_msg));
 538
 539         /*
 540          * We expect either two messages (one with an offset and one with the
 541          * actual data) or one message (just data or offset/data combined)
 542          */
 543         if (nmsgs > 2 || nmsgs == 0) {
 544                 debug("%s: Only one or two messages are supported.", __func__);
 545                 return -1;
 546         }
 547
 548         omsg = nmsgs == 1 ? &dummy : msg;
 549         dmsg = nmsgs == 1 ? msg : msg + 1;
 550
 551         if (dmsg->flags & I2C_M_RD)
 552                 return __i2c_read(i2c->base, dmsg->addr, omsg->buf,
 553                                   omsg->len, dmsg->buf, dmsg->len);
 554         else
 555                 return __i2c_write(i2c->base, dmsg->addr, omsg->buf,
 556                                    omsg->len, dmsg->buf, dmsg->len);
 557 }
 558
 559 static int mv_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
 560 {
 561         struct mv_i2c_priv *priv = dev_get_priv(bus);
 562         u32 val;
 563
 564         if (speed > 100000)
 565                 val = ICR_FM;
 566         else
 567                 val = ICR_SM;
 568         clrsetbits_le32(&priv->base->icr, ICR_MODE_MASK, val);
 569
 570         return 0;
 571 }
 572
 573 static int mv_i2c_probe(struct udevice *bus)
 574 {
 575         struct mv_i2c_priv *priv = dev_get_priv(bus);
 576
 577         priv->base = (void *)dev_get_addr_ptr(bus);
 578
 579         return 0;
 580 }
 581
 582 static const struct dm_i2c_ops mv_i2c_ops = {
 583         .xfer           = mv_i2c_xfer,
 584         .set_bus_speed  = mv_i2c_set_bus_speed,
 585 };
 586
 587 static const struct udevice_id mv_i2c_ids[] = {
 588         { .compatible = "marvell,armada-3700-i2c" },
 589         { }
 590 };
 591
 592 U_BOOT_DRIVER(i2c_mv) = {
 593         .name   = "i2c_mv",
 594         .id     = UCLASS_I2C,
 595         .of_match = mv_i2c_ids,
 596         .probe  = mv_i2c_probe,
 597         .priv_auto_alloc_size = sizeof(struct mv_i2c_priv),
 598         .ops    = &mv_i2c_ops,
 599 };
 600 #endif /* CONFIG_DM_I2C */