3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
5 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6 * Marius Groeger <mgroeger@sysgo.de>
8 * (C) Copyright 2003 Pengutronix e.K.
9 * Robert Schwebel <r.schwebel@pengutronix.de>
11 * (C) Copyright 2011 Marvell Inc.
12 * Lei Wen <leiwen@marvell.com>
14 * SPDX-License-Identifier: GPL-2.0+
16 * Back ported to the 8xx platform (from the 8260 platform) by
17 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
26 /* All transfers are described by this data structure */
46 static struct mv_i2c *base;
47 static void i2c_board_init(struct mv_i2c *base)
49 #ifdef CONFIG_SYS_I2C_INIT_BOARD
52 * call board specific i2c bus reset routine before accessing the
53 * environment, which might be in a chip on that bus. For details
54 * about this problem see doc/I2C_Edge_Conditions.
56 * disable I2C controller first, otherwhise it thinks we want to
57 * talk to the slave port...
59 icr = readl(&base->icr);
60 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
64 writel(icr, &base->icr);
68 #ifdef CONFIG_I2C_MULTI_BUS
69 static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
70 static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
71 static unsigned int current_bus;
73 int i2c_set_bus_num(unsigned int bus)
75 if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
76 printf("Bad bus: %d\n", bus);
80 base = (struct mv_i2c *)i2c_regs[bus];
83 if (!bus_initialized[current_bus]) {
85 bus_initialized[current_bus] = 1;
91 unsigned int i2c_get_bus_num(void)
98 * i2c_reset: - reset the host controller
101 static void i2c_reset(void)
103 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
104 writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */
106 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
110 writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */
111 writel(I2C_ICR_INIT, &base->icr); /* set control reg values */
112 writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */
113 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */
118 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
119 * are set and cleared
121 * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
123 static int i2c_isr_set_cleared(unsigned long set_mask,
124 unsigned long cleared_mask)
126 int timeout = 1000, isr;
129 isr = readl(&base->isr);
133 } while (((isr & set_mask) != set_mask)
134 || ((isr & cleared_mask) != 0));
140 * i2c_transfer: - Transfer one byte over the i2c bus
142 * This function can tranfer a byte over the i2c bus in both directions.
143 * It is used by the public API functions.
145 * @return: 0: transfer successful
146 * -1: message is empty
147 * -2: transmit timeout
149 * -4: receive timeout
150 * -5: illegal parameters
151 * -6: bus is busy and couldn't be aquired
153 int i2c_transfer(struct mv_i2c_msg *msg)
158 goto transfer_error_msg_empty;
160 switch (msg->direction) {
162 /* check if bus is not busy */
163 if (!i2c_isr_set_cleared(0, ISR_IBB))
164 goto transfer_error_bus_busy;
166 /* start transmission */
167 writel(readl(&base->icr) & ~ICR_START, &base->icr);
168 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
169 writel(msg->data, &base->idbr);
170 if (msg->condition == I2C_COND_START)
171 writel(readl(&base->icr) | ICR_START, &base->icr);
172 if (msg->condition == I2C_COND_STOP)
173 writel(readl(&base->icr) | ICR_STOP, &base->icr);
174 if (msg->acknack == I2C_ACKNAK_SENDNAK)
175 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
176 if (msg->acknack == I2C_ACKNAK_SENDACK)
177 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
178 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
179 writel(readl(&base->icr) | ICR_TB, &base->icr);
181 /* transmit register empty? */
182 if (!i2c_isr_set_cleared(ISR_ITE, 0))
183 goto transfer_error_transmit_timeout;
185 /* clear 'transmit empty' state */
186 writel(readl(&base->isr) | ISR_ITE, &base->isr);
188 /* wait for ACK from slave */
189 if (msg->acknack == I2C_ACKNAK_WAITACK)
190 if (!i2c_isr_set_cleared(0, ISR_ACKNAK))
191 goto transfer_error_ack_missing;
196 /* check if bus is not busy */
197 if (!i2c_isr_set_cleared(0, ISR_IBB))
198 goto transfer_error_bus_busy;
201 writel(readl(&base->icr) & ~ICR_START, &base->icr);
202 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
203 if (msg->condition == I2C_COND_START)
204 writel(readl(&base->icr) | ICR_START, &base->icr);
205 if (msg->condition == I2C_COND_STOP)
206 writel(readl(&base->icr) | ICR_STOP, &base->icr);
207 if (msg->acknack == I2C_ACKNAK_SENDNAK)
208 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
209 if (msg->acknack == I2C_ACKNAK_SENDACK)
210 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
211 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
212 writel(readl(&base->icr) | ICR_TB, &base->icr);
214 /* receive register full? */
215 if (!i2c_isr_set_cleared(ISR_IRF, 0))
216 goto transfer_error_receive_timeout;
218 msg->data = readl(&base->idbr);
220 /* clear 'receive empty' state */
221 writel(readl(&base->isr) | ISR_IRF, &base->isr);
224 goto transfer_error_illegal_param;
229 transfer_error_msg_empty:
230 debug("i2c_transfer: error: 'msg' is empty\n");
232 goto i2c_transfer_finish;
234 transfer_error_transmit_timeout:
235 debug("i2c_transfer: error: transmit timeout\n");
237 goto i2c_transfer_finish;
239 transfer_error_ack_missing:
240 debug("i2c_transfer: error: ACK missing\n");
242 goto i2c_transfer_finish;
244 transfer_error_receive_timeout:
245 debug("i2c_transfer: error: receive timeout\n");
247 goto i2c_transfer_finish;
249 transfer_error_illegal_param:
250 debug("i2c_transfer: error: illegal parameters\n");
252 goto i2c_transfer_finish;
254 transfer_error_bus_busy:
255 debug("i2c_transfer: error: bus is busy\n");
257 goto i2c_transfer_finish;
260 debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr));
265 /* ------------------------------------------------------------------------ */
267 /* ------------------------------------------------------------------------ */
268 void i2c_init(int speed, int slaveaddr)
270 #ifdef CONFIG_I2C_MULTI_BUS
272 base = (struct mv_i2c *)i2c_regs[current_bus];
274 base = (struct mv_i2c *)CONFIG_MV_I2C_REG;
277 i2c_board_init(base);
281 * i2c_probe: - Test if a chip answers for a given i2c address
283 * @chip: address of the chip which is searched for
284 * @return: 0 if a chip was found, -1 otherwhise
286 int i2c_probe(uchar chip)
288 struct mv_i2c_msg msg;
292 msg.condition = I2C_COND_START;
293 msg.acknack = I2C_ACKNAK_WAITACK;
294 msg.direction = I2C_WRITE;
295 msg.data = (chip << 1) + 1;
296 if (i2c_transfer(&msg))
299 msg.condition = I2C_COND_STOP;
300 msg.acknack = I2C_ACKNAK_SENDNAK;
301 msg.direction = I2C_READ;
303 if (i2c_transfer(&msg))
310 * i2c_read: - Read multiple bytes from an i2c device
312 * The higher level routines take into account that this function is only
313 * called with len < page length of the device (see configuration file)
315 * @chip: address of the chip which is to be read
316 * @addr: i2c data address within the chip
317 * @alen: length of the i2c data address (1..2 bytes)
318 * @buffer: where to write the data
319 * @len: how much byte do we want to read
320 * @return: 0 in case of success
322 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
324 struct mv_i2c_msg msg;
325 u8 addr_bytes[3]; /* lowest...highest byte of data address */
327 debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
328 "len=0x%02x)\n", chip, addr, alen, len);
332 /* dummy chip address write */
333 debug("i2c_read: dummy chip address write\n");
334 msg.condition = I2C_COND_START;
335 msg.acknack = I2C_ACKNAK_WAITACK;
336 msg.direction = I2C_WRITE;
337 msg.data = (chip << 1);
339 if (i2c_transfer(&msg))
343 * send memory address bytes;
344 * alen defines how much bytes we have to send.
346 /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */
347 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
348 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
349 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
351 while (--alen >= 0) {
352 debug("i2c_read: send memory word address byte %1d\n", alen);
353 msg.condition = I2C_COND_NORMAL;
354 msg.acknack = I2C_ACKNAK_WAITACK;
355 msg.direction = I2C_WRITE;
356 msg.data = addr_bytes[alen];
357 if (i2c_transfer(&msg))
361 /* start read sequence */
362 debug("i2c_read: start read sequence\n");
363 msg.condition = I2C_COND_START;
364 msg.acknack = I2C_ACKNAK_WAITACK;
365 msg.direction = I2C_WRITE;
366 msg.data = (chip << 1);
368 if (i2c_transfer(&msg))
371 /* read bytes; send NACK at last byte */
374 msg.condition = I2C_COND_STOP;
375 msg.acknack = I2C_ACKNAK_SENDNAK;
377 msg.condition = I2C_COND_NORMAL;
378 msg.acknack = I2C_ACKNAK_SENDACK;
381 msg.direction = I2C_READ;
383 if (i2c_transfer(&msg))
387 debug("i2c_read: reading byte (0x%08x)=0x%02x\n",
388 (unsigned int)buffer, *buffer);
398 * i2c_write: - Write multiple bytes to an i2c device
400 * The higher level routines take into account that this function is only
401 * called with len < page length of the device (see configuration file)
403 * @chip: address of the chip which is to be written
404 * @addr: i2c data address within the chip
405 * @alen: length of the i2c data address (1..2 bytes)
406 * @buffer: where to find the data to be written
407 * @len: how much byte do we want to read
408 * @return: 0 in case of success
410 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
412 struct mv_i2c_msg msg;
413 u8 addr_bytes[3]; /* lowest...highest byte of data address */
415 debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
416 "len=0x%02x)\n", chip, addr, alen, len);
420 /* chip address write */
421 debug("i2c_write: chip address write\n");
422 msg.condition = I2C_COND_START;
423 msg.acknack = I2C_ACKNAK_WAITACK;
424 msg.direction = I2C_WRITE;
425 msg.data = (chip << 1);
427 if (i2c_transfer(&msg))
431 * send memory address bytes;
432 * alen defines how much bytes we have to send.
434 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
435 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
436 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
438 while (--alen >= 0) {
439 debug("i2c_write: send memory word address\n");
440 msg.condition = I2C_COND_NORMAL;
441 msg.acknack = I2C_ACKNAK_WAITACK;
442 msg.direction = I2C_WRITE;
443 msg.data = addr_bytes[alen];
444 if (i2c_transfer(&msg))
448 /* write bytes; send NACK at last byte */
450 debug("i2c_write: writing byte (0x%08x)=0x%02x\n",
451 (unsigned int)buffer, *buffer);
454 msg.condition = I2C_COND_STOP;
456 msg.condition = I2C_COND_NORMAL;
458 msg.acknack = I2C_ACKNAK_WAITACK;
459 msg.direction = I2C_WRITE;
460 msg.data = *(buffer++);
462 if (i2c_transfer(&msg))