2 * Faraday I2C Controller
4 * (C) Copyright 2010 Faraday Technology
5 * Dante Su <dantesu@faraday-tech.com>
7 * SPDX-License-Identifier: GPL-2.0+
16 #ifndef CONFIG_SYS_I2C_SPEED
17 #define CONFIG_SYS_I2C_SPEED 5000
20 #ifndef CONFIG_SYS_I2C_SLAVE
21 #define CONFIG_SYS_I2C_SLAVE 0
24 #ifndef CONFIG_FTI2C010_CLOCK
25 #define CONFIG_FTI2C010_CLOCK clk_get_rate("I2C")
28 #ifndef CONFIG_FTI2C010_TIMEOUT
29 #define CONFIG_FTI2C010_TIMEOUT 10 /* ms */
32 /* 7-bit dev address + 1-bit read/write */
33 #define I2C_RD(dev) ((((dev) << 1) & 0xfe) | 1)
34 #define I2C_WR(dev) (((dev) << 1) & 0xfe)
36 struct fti2c010_chip {
37 struct fti2c010_regs *regs;
40 static struct fti2c010_chip chip_list[] = {
42 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE,
44 #ifdef CONFIG_FTI2C010_BASE1
46 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE1,
49 #ifdef CONFIG_FTI2C010_BASE2
51 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE2,
54 #ifdef CONFIG_FTI2C010_BASE3
56 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE3,
61 static int fti2c010_reset(struct fti2c010_chip *chip)
65 struct fti2c010_regs *regs = chip->regs;
67 writel(CR_I2CRST, ®s->cr);
68 for (ts = get_timer(0); get_timer(ts) < CONFIG_FTI2C010_TIMEOUT; ) {
69 if (!(readl(®s->cr) & CR_I2CRST)) {
76 printf("fti2c010: reset timeout\n");
81 static int fti2c010_wait(struct fti2c010_chip *chip, uint32_t mask)
85 struct fti2c010_regs *regs = chip->regs;
87 for (ts = get_timer(0); get_timer(ts) < CONFIG_FTI2C010_TIMEOUT; ) {
88 stat = readl(®s->sr);
89 if ((stat & mask) == mask) {
98 static unsigned int set_i2c_bus_speed(struct fti2c010_chip *chip,
101 struct fti2c010_regs *regs = chip->regs;
102 unsigned int clk = CONFIG_FTI2C010_CLOCK;
103 unsigned int gsr = 0;
104 unsigned int tsr = 32;
105 unsigned int div, rate;
107 for (div = 0; div < 0x3ffff; ++div) {
108 /* SCLout = PCLK/(2*(COUNT + 2) + GSR) */
109 rate = clk / (2 * (div + 2) + gsr);
114 writel(TGSR_GSR(gsr) | TGSR_TSR(tsr), ®s->tgsr);
115 writel(CDR_DIV(div), ®s->cdr);
121 * Initialization, must be called once on start up, may be called
122 * repeatedly to change the speed and slave addresses.
124 static void fti2c010_init(struct i2c_adapter *adap, int speed, int slaveaddr)
126 struct fti2c010_chip *chip = chip_list + adap->hwadapnr;
131 #ifdef CONFIG_SYS_I2C_INIT_BOARD
132 /* Call board specific i2c bus reset routine before accessing the
133 * environment, which might be in a chip on that bus. For details
134 * about this problem see doc/I2C_Edge_Conditions.
141 fti2c010_reset(chip);
143 set_i2c_bus_speed(chip, speed);
145 /* slave init, don't care */
147 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
148 /* Call board specific i2c bus reset routine AFTER the bus has been
149 * initialized. Use either this callpoint or i2c_init_board;
150 * which is called before fti2c010_init operations.
151 * For details about this problem see doc/I2C_Edge_Conditions.
153 i2c_board_late_init();
158 * Probe the given I2C chip address. Returns 0 if a chip responded,
161 static int fti2c010_probe(struct i2c_adapter *adap, u8 dev)
163 struct fti2c010_chip *chip = chip_list + adap->hwadapnr;
164 struct fti2c010_regs *regs = chip->regs;
167 /* 1. Select slave device (7bits Address + 1bit R/W) */
168 writel(I2C_WR(dev), ®s->dr);
169 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr);
170 ret = fti2c010_wait(chip, SR_DT);
174 /* 2. Select device register */
175 writel(0, ®s->dr);
176 writel(CR_ENABLE | CR_TBEN, ®s->cr);
177 ret = fti2c010_wait(chip, SR_DT);
182 static int fti2c010_read(struct i2c_adapter *adap,
183 u8 dev, uint addr, int alen, uchar *buf, int len)
185 struct fti2c010_chip *chip = chip_list + adap->hwadapnr;
186 struct fti2c010_regs *regs = chip->regs;
190 paddr[0] = (addr >> 0) & 0xFF;
191 paddr[1] = (addr >> 8) & 0xFF;
192 paddr[2] = (addr >> 16) & 0xFF;
193 paddr[3] = (addr >> 24) & 0xFF;
196 * Phase A. Set register address
199 /* A.1 Select slave device (7bits Address + 1bit R/W) */
200 writel(I2C_WR(dev), ®s->dr);
201 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr);
202 ret = fti2c010_wait(chip, SR_DT);
206 /* A.2 Select device register */
207 for (pos = 0; pos < alen; ++pos) {
208 uint32_t ctrl = CR_ENABLE | CR_TBEN;
210 writel(paddr[pos], ®s->dr);
211 writel(ctrl, ®s->cr);
212 ret = fti2c010_wait(chip, SR_DT);
218 * Phase B. Get register data
221 /* B.1 Select slave device (7bits Address + 1bit R/W) */
222 writel(I2C_RD(dev), ®s->dr);
223 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr);
224 ret = fti2c010_wait(chip, SR_DT);
228 /* B.2 Get register data */
229 for (pos = 0; pos < len; ++pos) {
230 uint32_t ctrl = CR_ENABLE | CR_TBEN;
231 uint32_t stat = SR_DR;
233 if (pos == len - 1) {
234 ctrl |= CR_NAK | CR_STOP;
237 writel(ctrl, ®s->cr);
238 ret = fti2c010_wait(chip, stat);
241 buf[pos] = (uchar)(readl(®s->dr) & 0xFF);
247 static int fti2c010_write(struct i2c_adapter *adap,
248 u8 dev, uint addr, int alen, u8 *buf, int len)
250 struct fti2c010_chip *chip = chip_list + adap->hwadapnr;
251 struct fti2c010_regs *regs = chip->regs;
255 paddr[0] = (addr >> 0) & 0xFF;
256 paddr[1] = (addr >> 8) & 0xFF;
257 paddr[2] = (addr >> 16) & 0xFF;
258 paddr[3] = (addr >> 24) & 0xFF;
261 * Phase A. Set register address
263 * A.1 Select slave device (7bits Address + 1bit R/W)
265 writel(I2C_WR(dev), ®s->dr);
266 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr);
267 ret = fti2c010_wait(chip, SR_DT);
271 /* A.2 Select device register */
272 for (pos = 0; pos < alen; ++pos) {
273 uint32_t ctrl = CR_ENABLE | CR_TBEN;
275 writel(paddr[pos], ®s->dr);
276 writel(ctrl, ®s->cr);
277 ret = fti2c010_wait(chip, SR_DT);
283 * Phase B. Set register data
285 for (pos = 0; pos < len; ++pos) {
286 uint32_t ctrl = CR_ENABLE | CR_TBEN;
290 writel(buf[pos], ®s->dr);
291 writel(ctrl, ®s->cr);
292 ret = fti2c010_wait(chip, SR_DT);
300 static unsigned int fti2c010_set_bus_speed(struct i2c_adapter *adap,
303 struct fti2c010_chip *chip = chip_list + adap->hwadapnr;
306 fti2c010_reset(chip);
307 ret = set_i2c_bus_speed(chip, speed);
313 * Register i2c adapters
315 U_BOOT_I2C_ADAP_COMPLETE(i2c_0, fti2c010_init, fti2c010_probe, fti2c010_read,
316 fti2c010_write, fti2c010_set_bus_speed,
317 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
319 #ifdef CONFIG_FTI2C010_BASE1
320 U_BOOT_I2C_ADAP_COMPLETE(i2c_1, fti2c010_init, fti2c010_probe, fti2c010_read,
321 fti2c010_write, fti2c010_set_bus_speed,
322 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
325 #ifdef CONFIG_FTI2C010_BASE2
326 U_BOOT_I2C_ADAP_COMPLETE(i2c_2, fti2c010_init, fti2c010_probe, fti2c010_read,
327 fti2c010_write, fti2c010_set_bus_speed,
328 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
331 #ifdef CONFIG_FTI2C010_BASE3
332 U_BOOT_I2C_ADAP_COMPLETE(i2c_3, fti2c010_init, fti2c010_probe, fti2c010_read,
333 fti2c010_write, fti2c010_set_bus_speed,
334 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,