drivers/i2c/busses/i2c-imx.c

   1 /*
   2  *      Copyright (C) 2002 Motorola GSG-China
   3  *
   4  *      This program is free software; you can redistribute it and/or
   5  *      modify it under the terms of the GNU General Public License
   6  *      as published by the Free Software Foundation; either version 2
   7  *      of the License, or (at your option) any later version.
   8  *
   9  *      This program is distributed in the hope that it will be useful,
  10  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  *      GNU General Public License for more details.
  13  *
  14  * Author:
  15  *      Darius Augulis, Teltonika Inc.
  16  *
  17  * Desc.:
  18  *      Implementation of I2C Adapter/Algorithm Driver
  19  *      for I2C Bus integrated in Freescale i.MX/MXC processors
  20  *
  21  *      Derived from Motorola GSG China I2C example driver
  22  *
  23  *      Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de
  24  *      Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de
  25  *      Copyright (C) 2007 RightHand Technologies, Inc.
  26  *      Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt>
  27  *
  28  *      Copyright 2013 Freescale Semiconductor, Inc.
  29  *
  30  */
  31
  32 /** Includes *******************************************************************
  33 *******************************************************************************/
  34
  35 #include <linux/init.h>
  36 #include <linux/kernel.h>
  37 #include <linux/module.h>
  38 #include <linux/errno.h>
  39 #include <linux/err.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/delay.h>
  42 #include <linux/i2c.h>
  43 #include <linux/io.h>
  44 #include <linux/sched.h>
  45 #include <linux/platform_device.h>
  46 #include <linux/clk.h>
  47 #include <linux/slab.h>
  48 #include <linux/of.h>
  49 #include <linux/of_device.h>
  50 #include <linux/platform_data/i2c-imx.h>
  51
  52 /** Defines ********************************************************************
  53 *******************************************************************************/
  54
  55 /* This will be the driver name the kernel reports */
  56 #define DRIVER_NAME "imx-i2c"
  57
  58 /* Default value */
  59 #define IMX_I2C_BIT_RATE        100000  /* 100kHz */
  60
  61 /* IMX I2C registers:
  62  * the I2C register offset is different between SoCs,
  63  * to provid support for all these chips, split the
  64  * register offset into a fixed base address and a
  65  * variable shift value, then the full register offset
  66  * will be calculated by
  67  * reg_off = ( reg_base_addr << reg_shift)
  68  */
  69 #define IMX_I2C_IADR    0x00    /* i2c slave address */
  70 #define IMX_I2C_IFDR    0x01    /* i2c frequency divider */
  71 #define IMX_I2C_I2CR    0x02    /* i2c control */
  72 #define IMX_I2C_I2SR    0x03    /* i2c status */
  73 #define IMX_I2C_I2DR    0x04    /* i2c transfer data */
  74
  75 #define IMX_I2C_REGSHIFT        2
  76 #define VF610_I2C_REGSHIFT      0
  77
  78 /* Bits of IMX I2C registers */
  79 #define I2SR_RXAK       0x01
  80 #define I2SR_IIF        0x02
  81 #define I2SR_SRW        0x04
  82 #define I2SR_IAL        0x10
  83 #define I2SR_IBB        0x20
  84 #define I2SR_IAAS       0x40
  85 #define I2SR_ICF        0x80
  86 #define I2CR_RSTA       0x04
  87 #define I2CR_TXAK       0x08
  88 #define I2CR_MTX        0x10
  89 #define I2CR_MSTA       0x20
  90 #define I2CR_IIEN       0x40
  91 #define I2CR_IEN        0x80
  92
  93 /* register bits different operating codes definition:
  94  * 1) I2SR: Interrupt flags clear operation differ between SoCs:
  95  * - write zero to clear(w0c) INT flag on i.MX,
  96  * - but write one to clear(w1c) INT flag on Vybrid.
  97  * 2) I2CR: I2C module enable operation also differ between SoCs:
  98  * - set I2CR_IEN bit enable the module on i.MX,
  99  * - but clear I2CR_IEN bit enable the module on Vybrid.
 100  */
 101 #define I2SR_CLR_OPCODE_W0C     0x0
 102 #define I2SR_CLR_OPCODE_W1C     (I2SR_IAL | I2SR_IIF)
 103 #define I2CR_IEN_OPCODE_0       0x0
 104 #define I2CR_IEN_OPCODE_1       I2CR_IEN
 105
 106 /** Variables ******************************************************************
 107 *******************************************************************************/
 108
 109 /*
 110  * sorted list of clock divider, register value pairs
 111  * taken from table 26-5, p.26-9, Freescale i.MX
 112  * Integrated Portable System Processor Reference Manual
 113  * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007
 114  *
 115  * Duplicated divider values removed from list
 116  */
 117 struct imx_i2c_clk_pair {
 118         u16     div;
 119         u16     val;
 120 };
 121
 122 static struct imx_i2c_clk_pair imx_i2c_clk_div[] = {
 123         { 22,   0x20 }, { 24,   0x21 }, { 26,   0x22 }, { 28,   0x23 },
 124         { 30,   0x00 }, { 32,   0x24 }, { 36,   0x25 }, { 40,   0x26 },
 125         { 42,   0x03 }, { 44,   0x27 }, { 48,   0x28 }, { 52,   0x05 },
 126         { 56,   0x29 }, { 60,   0x06 }, { 64,   0x2A }, { 72,   0x2B },
 127         { 80,   0x2C }, { 88,   0x09 }, { 96,   0x2D }, { 104,  0x0A },
 128         { 112,  0x2E }, { 128,  0x2F }, { 144,  0x0C }, { 160,  0x30 },
 129         { 192,  0x31 }, { 224,  0x32 }, { 240,  0x0F }, { 256,  0x33 },
 130         { 288,  0x10 }, { 320,  0x34 }, { 384,  0x35 }, { 448,  0x36 },
 131         { 480,  0x13 }, { 512,  0x37 }, { 576,  0x14 }, { 640,  0x38 },
 132         { 768,  0x39 }, { 896,  0x3A }, { 960,  0x17 }, { 1024, 0x3B },
 133         { 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E },
 134         { 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D },
 135         { 3072, 0x1E }, { 3840, 0x1F }
 136 };
 137
 138 /* Vybrid VF610 clock divider, register value pairs */
 139 static struct imx_i2c_clk_pair vf610_i2c_clk_div[] = {
 140         { 20,   0x00 }, { 22,   0x01 }, { 24,   0x02 }, { 26,   0x03 },
 141         { 28,   0x04 }, { 30,   0x05 }, { 32,   0x09 }, { 34,   0x06 },
 142         { 36,   0x0A }, { 40,   0x07 }, { 44,   0x0C }, { 48,   0x0D },
 143         { 52,   0x43 }, { 56,   0x0E }, { 60,   0x45 }, { 64,   0x12 },
 144         { 68,   0x0F }, { 72,   0x13 }, { 80,   0x14 }, { 88,   0x15 },
 145         { 96,   0x19 }, { 104,  0x16 }, { 112,  0x1A }, { 128,  0x17 },
 146         { 136,  0x4F }, { 144,  0x1C }, { 160,  0x1D }, { 176,  0x55 },
 147         { 192,  0x1E }, { 208,  0x56 }, { 224,  0x22 }, { 228,  0x24 },
 148         { 240,  0x1F }, { 256,  0x23 }, { 288,  0x5C }, { 320,  0x25 },
 149         { 384,  0x26 }, { 448,  0x2A }, { 480,  0x27 }, { 512,  0x2B },
 150         { 576,  0x2C }, { 640,  0x2D }, { 768,  0x31 }, { 896,  0x32 },
 151         { 960,  0x2F }, { 1024, 0x33 }, { 1152, 0x34 }, { 1280, 0x35 },
 152         { 1536, 0x36 }, { 1792, 0x3A }, { 1920, 0x37 }, { 2048, 0x3B },
 153         { 2304, 0x3C }, { 2560, 0x3D }, { 3072, 0x3E }, { 3584, 0x7A },
 154         { 3840, 0x3F }, { 4096, 0x7B }, { 5120, 0x7D }, { 6144, 0x7E },
 155 };
 156
 157 enum imx_i2c_type {
 158         IMX1_I2C,
 159         IMX21_I2C,
 160         VF610_I2C,
 161 };
 162
 163 struct imx_i2c_hwdata {
 164         enum imx_i2c_type       devtype;
 165         unsigned                regshift;
 166         struct imx_i2c_clk_pair *clk_div;
 167         unsigned                ndivs;
 168         unsigned                i2sr_clr_opcode;
 169         unsigned                i2cr_ien_opcode;
 170 };
 171
 172 struct imx_i2c_struct {
 173         struct i2c_adapter      adapter;
 174         struct clk              *clk;
 175         void __iomem            *base;
 176         wait_queue_head_t       queue;
 177         unsigned long           i2csr;
 178         unsigned int            disable_delay;
 179         int                     stopped;
 180         unsigned int            ifdr; /* IMX_I2C_IFDR */
 181         const struct imx_i2c_hwdata     *hwdata;
 182 };
 183
 184 static const struct imx_i2c_hwdata imx1_i2c_hwdata  = {
 185         .devtype                = IMX1_I2C,
 186         .regshift               = IMX_I2C_REGSHIFT,
 187         .clk_div                = imx_i2c_clk_div,
 188         .ndivs                  = ARRAY_SIZE(imx_i2c_clk_div),
 189         .i2sr_clr_opcode        = I2SR_CLR_OPCODE_W0C,
 190         .i2cr_ien_opcode        = I2CR_IEN_OPCODE_1,
 191
 192 };
 193
 194 static const struct imx_i2c_hwdata imx21_i2c_hwdata  = {
 195         .devtype                = IMX21_I2C,
 196         .regshift               = IMX_I2C_REGSHIFT,
 197         .clk_div                = imx_i2c_clk_div,
 198         .ndivs                  = ARRAY_SIZE(imx_i2c_clk_div),
 199         .i2sr_clr_opcode        = I2SR_CLR_OPCODE_W0C,
 200         .i2cr_ien_opcode        = I2CR_IEN_OPCODE_1,
 201
 202 };
 203
 204 static struct imx_i2c_hwdata vf610_i2c_hwdata = {
 205         .devtype                = VF610_I2C,
 206         .regshift               = VF610_I2C_REGSHIFT,
 207         .clk_div                = vf610_i2c_clk_div,
 208         .ndivs                  = ARRAY_SIZE(vf610_i2c_clk_div),
 209         .i2sr_clr_opcode        = I2SR_CLR_OPCODE_W1C,
 210         .i2cr_ien_opcode        = I2CR_IEN_OPCODE_0,
 211
 212 };
 213
 214 static struct platform_device_id imx_i2c_devtype[] = {
 215         {
 216                 .name = "imx1-i2c",
 217                 .driver_data = (kernel_ulong_t)&imx1_i2c_hwdata,
 218         }, {
 219                 .name = "imx21-i2c",
 220                 .driver_data = (kernel_ulong_t)&imx21_i2c_hwdata,
 221         }, {
 222                 /* sentinel */
 223         }
 224 };
 225 MODULE_DEVICE_TABLE(platform, imx_i2c_devtype);
 226
 227 static const struct of_device_id i2c_imx_dt_ids[] = {
 228         { .compatible = "fsl,imx1-i2c", .data = &imx1_i2c_hwdata, },
 229         { .compatible = "fsl,imx21-i2c", .data = &imx21_i2c_hwdata, },
 230         { .compatible = "fsl,vf610-i2c", .data = &vf610_i2c_hwdata, },
 231         { /* sentinel */ }
 232 };
 233 MODULE_DEVICE_TABLE(of, i2c_imx_dt_ids);
 234
 235 static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)
 236 {
 237         return i2c_imx->hwdata->devtype == IMX1_I2C;
 238 }
 239
 240 static inline void imx_i2c_write_reg(unsigned int val,
 241                 struct imx_i2c_struct *i2c_imx, unsigned int reg)
 242 {
 243         writeb(val, i2c_imx->base + (reg << i2c_imx->hwdata->regshift));
 244 }
 245
 246 static inline unsigned char imx_i2c_read_reg(struct imx_i2c_struct *i2c_imx,
 247                 unsigned int reg)
 248 {
 249         return readb(i2c_imx->base + (reg << i2c_imx->hwdata->regshift));
 250 }
 251
 252 /** Functions for IMX I2C adapter driver ***************************************
 253 *******************************************************************************/
 254
 255 static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
 256 {
 257         unsigned long orig_jiffies = jiffies;
 258         unsigned int temp;
 259
 260         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 261
 262         while (1) {
 263                 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
 264                 if (for_busy && (temp & I2SR_IBB))
 265                         break;
 266                 if (!for_busy && !(temp & I2SR_IBB))
 267                         break;
 268                 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
 269                         dev_dbg(&i2c_imx->adapter.dev,
 270                                 "<%s> I2C bus is busy\n", __func__);
 271                         return -ETIMEDOUT;
 272                 }
 273                 schedule();
 274         }
 275
 276         return 0;
 277 }
 278
 279 static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
 280 {
 281         wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10);
 282
 283         if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
 284                 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
 285                 return -ETIMEDOUT;
 286         }
 287         dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__);
 288         i2c_imx->i2csr = 0;
 289         return 0;
 290 }
 291
 292 static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
 293 {
 294         if (imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR) & I2SR_RXAK) {
 295                 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
 296                 return -EIO;  /* No ACK */
 297         }
 298
 299         dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__);
 300         return 0;
 301 }
 302
 303 static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
 304 {
 305         unsigned int temp = 0;
 306         int result;
 307
 308         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 309
 310         result = clk_prepare_enable(i2c_imx->clk);
 311         if (result)
 312                 return result;
 313         imx_i2c_write_reg(i2c_imx->ifdr, i2c_imx, IMX_I2C_IFDR);
 314         /* Enable I2C controller */
 315         imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR);
 316         imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode, i2c_imx, IMX_I2C_I2CR);
 317
 318         /* Wait controller to be stable */
 319         udelay(50);
 320
 321         /* Start I2C transaction */
 322         temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
 323         temp |= I2CR_MSTA;
 324         imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 325         result = i2c_imx_bus_busy(i2c_imx, 1);
 326         if (result)
 327                 return result;
 328         i2c_imx->stopped = 0;
 329
 330         temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK;
 331         imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 332         return result;
 333 }
 334
 335 static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
 336 {
 337         unsigned int temp = 0;
 338
 339         if (!i2c_imx->stopped) {
 340                 /* Stop I2C transaction */
 341                 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 342                 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
 343                 temp &= ~(I2CR_MSTA | I2CR_MTX);
 344                 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 345         }
 346         if (is_imx1_i2c(i2c_imx)) {
 347                 /*
 348                  * This delay caused by an i.MXL hardware bug.
 349                  * If no (or too short) delay, no "STOP" bit will be generated.
 350                  */
 351                 udelay(i2c_imx->disable_delay);
 352         }
 353
 354         if (!i2c_imx->stopped) {
 355                 i2c_imx_bus_busy(i2c_imx, 0);
 356                 i2c_imx->stopped = 1;
 357         }
 358
 359         /* Disable I2C controller */
 360         temp = i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
 361         imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 362         clk_disable_unprepare(i2c_imx->clk);
 363 }
 364
 365 static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
 366                                                         unsigned int rate)
 367 {
 368         struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;
 369         unsigned int i2c_clk_rate;
 370         unsigned int div;
 371         int i;
 372
 373         /* Divider value calculation */
 374         i2c_clk_rate = clk_get_rate(i2c_imx->clk);
 375         div = (i2c_clk_rate + rate - 1) / rate;
 376         if (div < i2c_clk_div[0].div)
 377                 i = 0;
 378         else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div)
 379                 i = i2c_imx->hwdata->ndivs - 1;
 380         else
 381                 for (i = 0; i2c_clk_div[i].div < div; i++);
 382
 383         /* Store divider value */
 384         i2c_imx->ifdr = i2c_clk_div[i].val;
 385
 386         /*
 387          * There dummy delay is calculated.
 388          * It should be about one I2C clock period long.
 389          * This delay is used in I2C bus disable function
 390          * to fix chip hardware bug.
 391          */
 392         i2c_imx->disable_delay = (500000U * i2c_clk_div[i].div
 393                 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
 394
 395         /* dev_dbg() can't be used, because adapter is not yet registered */
 396 #ifdef CONFIG_I2C_DEBUG_BUS
 397         dev_dbg(&i2c_imx->adapter.dev, "<%s> I2C_CLK=%d, REQ DIV=%d\n",
 398                 __func__, i2c_clk_rate, div);
 399         dev_dbg(&i2c_imx->adapter.dev, "<%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
 400                 __func__, i2c_clk_div[i].val, i2c_clk_div[i].div);
 401 #endif
 402 }
 403
 404 static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
 405 {
 406         struct imx_i2c_struct *i2c_imx = dev_id;
 407         unsigned int temp;
 408
 409         temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
 410         if (temp & I2SR_IIF) {
 411                 /* save status register */
 412                 i2c_imx->i2csr = temp;
 413                 temp &= ~I2SR_IIF;
 414                 temp |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IIF);
 415                 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
 416                 wake_up(&i2c_imx->queue);
 417                 return IRQ_HANDLED;
 418         }
 419
 420         return IRQ_NONE;
 421 }
 422
 423 static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
 424 {
 425         int i, result;
 426
 427         dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n",
 428                 __func__, msgs->addr << 1);
 429
 430         /* write slave address */
 431         imx_i2c_write_reg(msgs->addr << 1, i2c_imx, IMX_I2C_I2DR);
 432         result = i2c_imx_trx_complete(i2c_imx);
 433         if (result)
 434                 return result;
 435         result = i2c_imx_acked(i2c_imx);
 436         if (result)
 437                 return result;
 438         dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__);
 439
 440         /* write data */
 441         for (i = 0; i < msgs->len; i++) {
 442                 dev_dbg(&i2c_imx->adapter.dev,
 443                         "<%s> write byte: B%d=0x%X\n",
 444                         __func__, i, msgs->buf[i]);
 445                 imx_i2c_write_reg(msgs->buf[i], i2c_imx, IMX_I2C_I2DR);
 446                 result = i2c_imx_trx_complete(i2c_imx);
 447                 if (result)
 448                         return result;
 449                 result = i2c_imx_acked(i2c_imx);
 450                 if (result)
 451                         return result;
 452         }
 453         return 0;
 454 }
 455
 456 static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
 457 {
 458         int i, result;
 459         unsigned int temp;
 460
 461         dev_dbg(&i2c_imx->adapter.dev,
 462                 "<%s> write slave address: addr=0x%x\n",
 463                 __func__, (msgs->addr << 1) | 0x01);
 464
 465         /* write slave address */
 466         imx_i2c_write_reg((msgs->addr << 1) | 0x01, i2c_imx, IMX_I2C_I2DR);
 467         result = i2c_imx_trx_complete(i2c_imx);
 468         if (result)
 469                 return result;
 470         result = i2c_imx_acked(i2c_imx);
 471         if (result)
 472                 return result;
 473
 474         dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__);
 475
 476         /* setup bus to read data */
 477         temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
 478         temp &= ~I2CR_MTX;
 479         if (msgs->len - 1)
 480                 temp &= ~I2CR_TXAK;
 481         imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 482         imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */
 483
 484         dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);
 485
 486         /* read data */
 487         for (i = 0; i < msgs->len; i++) {
 488                 result = i2c_imx_trx_complete(i2c_imx);
 489                 if (result)
 490                         return result;
 491                 if (i == (msgs->len - 1)) {
 492                         /* It must generate STOP before read I2DR to prevent
 493                            controller from generating another clock cycle */
 494                         dev_dbg(&i2c_imx->adapter.dev,
 495                                 "<%s> clear MSTA\n", __func__);
 496                         temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
 497                         temp &= ~(I2CR_MSTA | I2CR_MTX);
 498                         imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 499                         i2c_imx_bus_busy(i2c_imx, 0);
 500                         i2c_imx->stopped = 1;
 501                 } else if (i == (msgs->len - 2)) {
 502                         dev_dbg(&i2c_imx->adapter.dev,
 503                                 "<%s> set TXAK\n", __func__);
 504                         temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
 505                         temp |= I2CR_TXAK;
 506                         imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 507                 }
 508                 msgs->buf[i] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR);
 509                 dev_dbg(&i2c_imx->adapter.dev,
 510                         "<%s> read byte: B%d=0x%X\n",
 511                         __func__, i, msgs->buf[i]);
 512         }
 513         return 0;
 514 }
 515
 516 static int i2c_imx_xfer(struct i2c_adapter *adapter,
 517                                                 struct i2c_msg *msgs, int num)
 518 {
 519         unsigned int i, temp;
 520         int result;
 521         struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
 522
 523         dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
 524
 525         /* Start I2C transfer */
 526         result = i2c_imx_start(i2c_imx);
 527         if (result)
 528                 goto fail0;
 529
 530         /* read/write data */
 531         for (i = 0; i < num; i++) {
 532                 if (i) {
 533                         dev_dbg(&i2c_imx->adapter.dev,
 534                                 "<%s> repeated start\n", __func__);
 535                         temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
 536                         temp |= I2CR_RSTA;
 537                         imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 538                         result =  i2c_imx_bus_busy(i2c_imx, 1);
 539                         if (result)
 540                                 goto fail0;
 541                 }
 542                 dev_dbg(&i2c_imx->adapter.dev,
 543                         "<%s> transfer message: %d\n", __func__, i);
 544                 /* write/read data */
 545 #ifdef CONFIG_I2C_DEBUG_BUS
 546                 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
 547                 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, "
 548                         "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__,
 549                         (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0),
 550                         (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0),
 551                         (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0));
 552                 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
 553                 dev_dbg(&i2c_imx->adapter.dev,
 554                         "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, "
 555                         "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__,
 556                         (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0),
 557                         (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0),
 558                         (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0),
 559                         (temp & I2SR_RXAK ? 1 : 0));
 560 #endif
 561                 if (msgs[i].flags & I2C_M_RD)
 562                         result = i2c_imx_read(i2c_imx, &msgs[i]);
 563                 else
 564                         result = i2c_imx_write(i2c_imx, &msgs[i]);
 565                 if (result)
 566                         goto fail0;
 567         }
 568
 569 fail0:
 570         /* Stop I2C transfer */
 571         i2c_imx_stop(i2c_imx);
 572
 573         dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
 574                 (result < 0) ? "error" : "success msg",
 575                         (result < 0) ? result : num);
 576         return (result < 0) ? result : num;
 577 }
 578
 579 static u32 i2c_imx_func(struct i2c_adapter *adapter)
 580 {
 581         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 582 }
 583
 584 static struct i2c_algorithm i2c_imx_algo = {
 585         .master_xfer    = i2c_imx_xfer,
 586         .functionality  = i2c_imx_func,
 587 };
 588
 589 static int i2c_imx_probe(struct platform_device *pdev)
 590 {
 591         const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids,
 592                                                            &pdev->dev);
 593         struct imx_i2c_struct *i2c_imx;
 594         struct resource *res;
 595         struct imxi2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
 596         void __iomem *base;
 597         int irq, ret;
 598         u32 bitrate;
 599
 600         dev_dbg(&pdev->dev, "<%s>\n", __func__);
 601
 602         irq = platform_get_irq(pdev, 0);
 603         if (irq < 0) {
 604                 dev_err(&pdev->dev, "can't get irq number\n");
 605                 return irq;
 606         }
 607
 608         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 609         base = devm_ioremap_resource(&pdev->dev, res);
 610         if (IS_ERR(base))
 611                 return PTR_ERR(base);
 612
 613         i2c_imx = devm_kzalloc(&pdev->dev, sizeof(struct imx_i2c_struct),
 614                                 GFP_KERNEL);
 615         if (!i2c_imx)
 616                 return -ENOMEM;
 617
 618         if (of_id)
 619                 i2c_imx->hwdata = of_id->data;
 620         else
 621                 i2c_imx->hwdata = (struct imx_i2c_hwdata *)
 622                                 platform_get_device_id(pdev)->driver_data;
 623
 624         /* Setup i2c_imx driver structure */
 625         strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name));
 626         i2c_imx->adapter.owner          = THIS_MODULE;
 627         i2c_imx->adapter.algo           = &i2c_imx_algo;
 628         i2c_imx->adapter.dev.parent     = &pdev->dev;
 629         i2c_imx->adapter.nr             = pdev->id;
 630         i2c_imx->adapter.dev.of_node    = pdev->dev.of_node;
 631         i2c_imx->base                   = base;
 632
 633         /* Get I2C clock */
 634         i2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
 635         if (IS_ERR(i2c_imx->clk)) {
 636                 dev_err(&pdev->dev, "can't get I2C clock\n");
 637                 return PTR_ERR(i2c_imx->clk);
 638         }
 639
 640         ret = clk_prepare_enable(i2c_imx->clk);
 641         if (ret) {
 642                 dev_err(&pdev->dev, "can't enable I2C clock\n");
 643                 return ret;
 644         }
 645         /* Request IRQ */
 646         ret = devm_request_irq(&pdev->dev, irq, i2c_imx_isr, 0,
 647                                 pdev->name, i2c_imx);
 648         if (ret) {
 649                 dev_err(&pdev->dev, "can't claim irq %d\n", irq);
 650                 return ret;
 651         }
 652
 653         /* Init queue */
 654         init_waitqueue_head(&i2c_imx->queue);
 655
 656         /* Set up adapter data */
 657         i2c_set_adapdata(&i2c_imx->adapter, i2c_imx);
 658
 659         /* Set up clock divider */
 660         bitrate = IMX_I2C_BIT_RATE;
 661         ret = of_property_read_u32(pdev->dev.of_node,
 662                                    "clock-frequency", &bitrate);
 663         if (ret < 0 && pdata && pdata->bitrate)
 664                 bitrate = pdata->bitrate;
 665         i2c_imx_set_clk(i2c_imx, bitrate);
 666
 667         /* Set up chip registers to defaults */
 668         imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
 669                         i2c_imx, IMX_I2C_I2CR);
 670         imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR);
 671
 672         /* Add I2C adapter */
 673         ret = i2c_add_numbered_adapter(&i2c_imx->adapter);
 674         if (ret < 0) {
 675                 dev_err(&pdev->dev, "registration failed\n");
 676                 return ret;
 677         }
 678
 679         /* Set up platform driver data */
 680         platform_set_drvdata(pdev, i2c_imx);
 681         clk_disable_unprepare(i2c_imx->clk);
 682
 683         dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", irq);
 684         dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n",
 685                 res->start, res->end);
 686         dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x\n",
 687                 resource_size(res), res->start);
 688         dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n",
 689                 i2c_imx->adapter.name);
 690         dev_info(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n");
 691
 692         return 0;   /* Return OK */
 693 }
 694
 695 static int i2c_imx_remove(struct platform_device *pdev)
 696 {
 697         struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev);
 698
 699         /* remove adapter */
 700         dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n");
 701         i2c_del_adapter(&i2c_imx->adapter);
 702
 703         /* setup chip registers to defaults */
 704         imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IADR);
 705         imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IFDR);
 706         imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR);
 707         imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR);
 708
 709         return 0;
 710 }
 711
 712 static struct platform_driver i2c_imx_driver = {
 713         .probe = i2c_imx_probe,
 714         .remove = i2c_imx_remove,
 715         .driver = {
 716                 .name   = DRIVER_NAME,
 717                 .owner  = THIS_MODULE,
 718                 .of_match_table = i2c_imx_dt_ids,
 719         },
 720         .id_table       = imx_i2c_devtype,
 721 };
 722
 723 static int __init i2c_adap_imx_init(void)
 724 {
 725         return platform_driver_register(&i2c_imx_driver);
 726 }
 727 subsys_initcall(i2c_adap_imx_init);
 728
 729 static void __exit i2c_adap_imx_exit(void)
 730 {
 731         platform_driver_unregister(&i2c_imx_driver);
 732 }
 733 module_exit(i2c_adap_imx_exit);
 734
 735 MODULE_LICENSE("GPL");
 736 MODULE_AUTHOR("Darius Augulis");
 737 MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus");
 738 MODULE_ALIAS("platform:" DRIVER_NAME);