i2c: designware: Don't set SCL timings and speed mode when in slave mode
[platform/kernel/linux-rpi.git] / drivers / i2c / busses / i2c-designware-platdrv.c
1 /*
2  * Synopsys DesignWare I2C adapter driver.
3  *
4  * Based on the TI DAVINCI I2C adapter driver.
5  *
6  * Copyright (C) 2006 Texas Instruments.
7  * Copyright (C) 2007 MontaVista Software Inc.
8  * Copyright (C) 2009 Provigent Ltd.
9  *
10  * ----------------------------------------------------------------------------
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License as published by
14  * the Free Software Foundation; either version 2 of the License, or
15  * (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  * ----------------------------------------------------------------------------
22  *
23  */
24 #include <linux/acpi.h>
25 #include <linux/clk-provider.h>
26 #include <linux/clk.h>
27 #include <linux/delay.h>
28 #include <linux/dmi.h>
29 #include <linux/err.h>
30 #include <linux/errno.h>
31 #include <linux/i2c.h>
32 #include <linux/interrupt.h>
33 #include <linux/io.h>
34 #include <linux/kernel.h>
35 #include <linux/module.h>
36 #include <linux/of.h>
37 #include <linux/platform_data/i2c-designware.h>
38 #include <linux/platform_device.h>
39 #include <linux/pm.h>
40 #include <linux/pm_runtime.h>
41 #include <linux/property.h>
42 #include <linux/reset.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45
46 #include "i2c-designware-core.h"
47
48 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
49 {
50         return clk_get_rate(dev->clk)/1000;
51 }
52
53 #ifdef CONFIG_ACPI
54 /*
55  * The HCNT/LCNT information coming from ACPI should be the most accurate
56  * for given platform. However, some systems get it wrong. On such systems
57  * we get better results by calculating those based on the input clock.
58  */
59 static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
60         {
61                 .ident = "Dell Inspiron 7348",
62                 .matches = {
63                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
64                         DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
65                 },
66         },
67         { }
68 };
69
70 static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
71                                u16 *hcnt, u16 *lcnt, u32 *sda_hold)
72 {
73         struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
74         acpi_handle handle = ACPI_HANDLE(&pdev->dev);
75         union acpi_object *obj;
76
77         if (dmi_check_system(dw_i2c_no_acpi_params))
78                 return;
79
80         if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
81                 return;
82
83         obj = (union acpi_object *)buf.pointer;
84         if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
85                 const union acpi_object *objs = obj->package.elements;
86
87                 *hcnt = (u16)objs[0].integer.value;
88                 *lcnt = (u16)objs[1].integer.value;
89                 *sda_hold = (u32)objs[2].integer.value;
90         }
91
92         kfree(buf.pointer);
93 }
94
95 static int dw_i2c_acpi_configure(struct platform_device *pdev)
96 {
97         struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
98         u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
99         acpi_handle handle = ACPI_HANDLE(&pdev->dev);
100         const struct acpi_device_id *id;
101         struct acpi_device *adev;
102         const char *uid;
103
104         dev->adapter.nr = -1;
105         dev->tx_fifo_depth = 32;
106         dev->rx_fifo_depth = 32;
107
108         /*
109          * Try to get SDA hold time and *CNT values from an ACPI method for
110          * selected speed modes.
111          */
112         dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
113         dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
114         dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
115         dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
116
117         switch (dev->clk_freq) {
118         case 100000:
119                 dev->sda_hold_time = ss_ht;
120                 break;
121         case 1000000:
122                 dev->sda_hold_time = fp_ht;
123                 break;
124         case 3400000:
125                 dev->sda_hold_time = hs_ht;
126                 break;
127         case 400000:
128         default:
129                 dev->sda_hold_time = fs_ht;
130                 break;
131         }
132
133         id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
134         if (id && id->driver_data)
135                 dev->flags |= (u32)id->driver_data;
136
137         if (acpi_bus_get_device(handle, &adev))
138                 return -ENODEV;
139
140         /*
141          * Cherrytrail I2C7 gets used for the PMIC which gets accessed
142          * through ACPI opregions during late suspend / early resume
143          * disable pm for it.
144          */
145         uid = adev->pnp.unique_id;
146         if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
147                 dev->pm_disabled = true;
148
149         return 0;
150 }
151
152 static const struct acpi_device_id dw_i2c_acpi_match[] = {
153         { "INT33C2", 0 },
154         { "INT33C3", 0 },
155         { "INT3432", 0 },
156         { "INT3433", 0 },
157         { "80860F41", 0 },
158         { "808622C1", MODEL_CHERRYTRAIL },
159         { "AMD0010", ACCESS_INTR_MASK },
160         { "AMDI0010", ACCESS_INTR_MASK },
161         { "AMDI0510", 0 },
162         { "APMC0D0F", 0 },
163         { "HISI02A1", 0 },
164         { "HISI02A2", 0 },
165         { }
166 };
167 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
168 #else
169 static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
170 {
171         return -ENODEV;
172 }
173 #endif
174
175 static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
176 {
177         dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
178
179         dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
180                           DW_IC_CON_RESTART_EN;
181
182         dev->mode = DW_IC_MASTER;
183
184         switch (dev->clk_freq) {
185         case 100000:
186                 dev->master_cfg |= DW_IC_CON_SPEED_STD;
187                 break;
188         case 3400000:
189                 dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
190                 break;
191         default:
192                 dev->master_cfg |= DW_IC_CON_SPEED_FAST;
193         }
194 }
195
196 static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
197 {
198         dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
199
200         dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
201                          DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
202
203         dev->mode = DW_IC_SLAVE;
204 }
205
206 static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
207 {
208         if (IS_ERR(i_dev->clk))
209                 return PTR_ERR(i_dev->clk);
210
211         if (prepare)
212                 return clk_prepare_enable(i_dev->clk);
213
214         clk_disable_unprepare(i_dev->clk);
215         return 0;
216 }
217
218 static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
219 {
220         u32 param, tx_fifo_depth, rx_fifo_depth;
221
222         /*
223          * Try to detect the FIFO depth if not set by interface driver,
224          * the depth could be from 2 to 256 from HW spec.
225          */
226         param = i2c_dw_read_comp_param(dev);
227         tx_fifo_depth = ((param >> 16) & 0xff) + 1;
228         rx_fifo_depth = ((param >> 8)  & 0xff) + 1;
229         if (!dev->tx_fifo_depth) {
230                 dev->tx_fifo_depth = tx_fifo_depth;
231                 dev->rx_fifo_depth = rx_fifo_depth;
232                 dev->adapter.nr = id;
233         } else if (tx_fifo_depth >= 2) {
234                 dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
235                                 tx_fifo_depth);
236                 dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
237                                 rx_fifo_depth);
238         }
239 }
240
241 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
242 {
243         pm_runtime_disable(dev->dev);
244
245         if (dev->pm_disabled)
246                 pm_runtime_put_noidle(dev->dev);
247 }
248
249 static int dw_i2c_plat_probe(struct platform_device *pdev)
250 {
251         struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
252         struct i2c_adapter *adap;
253         struct dw_i2c_dev *dev;
254         u32 acpi_speed, ht = 0;
255         struct resource *mem;
256         int i, irq, ret;
257         static const int supported_speeds[] = {
258                 0, 100000, 400000, 1000000, 3400000
259         };
260
261         irq = platform_get_irq(pdev, 0);
262         if (irq < 0)
263                 return irq;
264
265         dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
266         if (!dev)
267                 return -ENOMEM;
268
269         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
270         dev->base = devm_ioremap_resource(&pdev->dev, mem);
271         if (IS_ERR(dev->base))
272                 return PTR_ERR(dev->base);
273
274         dev->dev = &pdev->dev;
275         dev->irq = irq;
276         platform_set_drvdata(pdev, dev);
277
278         dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
279         if (IS_ERR(dev->rst)) {
280                 if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
281                         return -EPROBE_DEFER;
282         } else {
283                 reset_control_deassert(dev->rst);
284         }
285
286         if (pdata) {
287                 dev->clk_freq = pdata->i2c_scl_freq;
288         } else {
289                 device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
290                                          &ht);
291                 device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
292                                          &dev->sda_falling_time);
293                 device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
294                                          &dev->scl_falling_time);
295                 device_property_read_u32(&pdev->dev, "clock-frequency",
296                                          &dev->clk_freq);
297         }
298
299         acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
300         /*
301          * Some DSTDs use a non standard speed, round down to the lowest
302          * standard speed.
303          */
304         for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
305                 if (acpi_speed < supported_speeds[i])
306                         break;
307         }
308         acpi_speed = supported_speeds[i - 1];
309
310         /*
311          * Find bus speed from the "clock-frequency" device property, ACPI
312          * or by using fast mode if neither is set.
313          */
314         if (acpi_speed && dev->clk_freq)
315                 dev->clk_freq = min(dev->clk_freq, acpi_speed);
316         else if (acpi_speed || dev->clk_freq)
317                 dev->clk_freq = max(dev->clk_freq, acpi_speed);
318         else
319                 dev->clk_freq = 400000;
320
321         if (has_acpi_companion(&pdev->dev))
322                 dw_i2c_acpi_configure(pdev);
323
324         /*
325          * Only standard mode at 100kHz, fast mode at 400kHz,
326          * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
327          */
328         if (dev->clk_freq != 100000 && dev->clk_freq != 400000
329             && dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
330                 dev_err(&pdev->dev,
331                         "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
332                         dev->clk_freq);
333                 ret = -EINVAL;
334                 goto exit_reset;
335         }
336
337         ret = i2c_dw_probe_lock_support(dev);
338         if (ret)
339                 goto exit_reset;
340
341         if (i2c_detect_slave_mode(&pdev->dev))
342                 i2c_dw_configure_slave(dev);
343         else
344                 i2c_dw_configure_master(dev);
345
346         dev->clk = devm_clk_get(&pdev->dev, NULL);
347         if (!i2c_dw_plat_prepare_clk(dev, true)) {
348                 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
349
350                 if (!dev->sda_hold_time && ht)
351                         dev->sda_hold_time = div_u64(
352                                 (u64)dev->get_clk_rate_khz(dev) * ht + 500000,
353                                 1000000);
354         }
355
356         dw_i2c_set_fifo_size(dev, pdev->id);
357
358         adap = &dev->adapter;
359         adap->owner = THIS_MODULE;
360         adap->class = I2C_CLASS_DEPRECATED;
361         ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
362         adap->dev.of_node = pdev->dev.of_node;
363
364         /* The code below assumes runtime PM to be disabled. */
365         WARN_ON(pm_runtime_enabled(&pdev->dev));
366
367         pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
368         pm_runtime_use_autosuspend(&pdev->dev);
369         pm_runtime_set_active(&pdev->dev);
370
371         if (dev->pm_disabled)
372                 pm_runtime_get_noresume(&pdev->dev);
373
374         pm_runtime_enable(&pdev->dev);
375
376         if (dev->mode == DW_IC_SLAVE)
377                 ret = i2c_dw_probe_slave(dev);
378         else
379                 ret = i2c_dw_probe(dev);
380
381         if (ret)
382                 goto exit_probe;
383
384         return ret;
385
386 exit_probe:
387         dw_i2c_plat_pm_cleanup(dev);
388 exit_reset:
389         if (!IS_ERR_OR_NULL(dev->rst))
390                 reset_control_assert(dev->rst);
391         return ret;
392 }
393
394 static int dw_i2c_plat_remove(struct platform_device *pdev)
395 {
396         struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
397
398         pm_runtime_get_sync(&pdev->dev);
399
400         i2c_del_adapter(&dev->adapter);
401
402         dev->disable(dev);
403
404         pm_runtime_dont_use_autosuspend(&pdev->dev);
405         pm_runtime_put_sync(&pdev->dev);
406         dw_i2c_plat_pm_cleanup(dev);
407
408         if (!IS_ERR_OR_NULL(dev->rst))
409                 reset_control_assert(dev->rst);
410
411         i2c_dw_remove_lock_support(dev);
412
413         return 0;
414 }
415
416 #ifdef CONFIG_OF
417 static const struct of_device_id dw_i2c_of_match[] = {
418         { .compatible = "snps,designware-i2c", },
419         {},
420 };
421 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
422 #endif
423
424 #ifdef CONFIG_PM_SLEEP
425 static int dw_i2c_plat_prepare(struct device *dev)
426 {
427         return pm_runtime_suspended(dev);
428 }
429
430 static void dw_i2c_plat_complete(struct device *dev)
431 {
432         if (dev->power.direct_complete)
433                 pm_request_resume(dev);
434 }
435 #else
436 #define dw_i2c_plat_prepare     NULL
437 #define dw_i2c_plat_complete    NULL
438 #endif
439
440 #ifdef CONFIG_PM
441 static int dw_i2c_plat_suspend(struct device *dev)
442 {
443         struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
444
445         if (i_dev->suspended) {
446                 i_dev->skip_resume = true;
447                 return 0;
448         }
449
450         i_dev->disable(i_dev);
451         i2c_dw_plat_prepare_clk(i_dev, false);
452
453         i_dev->suspended = true;
454
455         return 0;
456 }
457
458 static int dw_i2c_plat_resume(struct device *dev)
459 {
460         struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
461
462         if (!i_dev->suspended)
463                 return 0;
464
465         if (i_dev->skip_resume) {
466                 i_dev->skip_resume = false;
467                 return 0;
468         }
469
470         i2c_dw_plat_prepare_clk(i_dev, true);
471         i_dev->init(i_dev);
472
473         i_dev->suspended = false;
474
475         return 0;
476 }
477
478 static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
479         .prepare = dw_i2c_plat_prepare,
480         .complete = dw_i2c_plat_complete,
481         SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
482         SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
483 };
484
485 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
486 #else
487 #define DW_I2C_DEV_PMOPS NULL
488 #endif
489
490 /* Work with hotplug and coldplug */
491 MODULE_ALIAS("platform:i2c_designware");
492
493 static struct platform_driver dw_i2c_driver = {
494         .probe = dw_i2c_plat_probe,
495         .remove = dw_i2c_plat_remove,
496         .driver         = {
497                 .name   = "i2c_designware",
498                 .of_match_table = of_match_ptr(dw_i2c_of_match),
499                 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
500                 .pm     = DW_I2C_DEV_PMOPS,
501         },
502 };
503
504 static int __init dw_i2c_init_driver(void)
505 {
506         return platform_driver_register(&dw_i2c_driver);
507 }
508 subsys_initcall(dw_i2c_init_driver);
509
510 static void __exit dw_i2c_exit_driver(void)
511 {
512         platform_driver_unregister(&dw_i2c_driver);
513 }
514 module_exit(dw_i2c_exit_driver);
515
516 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
517 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
518 MODULE_LICENSE("GPL");