drivers/i2c/busses/i2c-designware-pcidrv.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Synopsys DesignWare I2C adapter driver (master only).
   4  *
   5  * Based on the TI DAVINCI I2C adapter driver.
   6  *
   7  * Copyright (C) 2006 Texas Instruments.
   8  * Copyright (C) 2007 MontaVista Software Inc.
   9  * Copyright (C) 2009 Provigent Ltd.
  10  * Copyright (C) 2011, 2015, 2016 Intel Corporation.
  11  */
  12 #include <linux/acpi.h>
  13 #include <linux/delay.h>
  14 #include <linux/err.h>
  15 #include <linux/errno.h>
  16 #include <linux/i2c.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/io.h>
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/pci.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/sched.h>
  24 #include <linux/slab.h>
  25
  26 #include "i2c-designware-core.h"
  27
  28 #define DRIVER_NAME "i2c-designware-pci"
  29 #define AMD_CLK_RATE_HZ 100000
  30
  31 enum dw_pci_ctl_id_t {
  32         medfield,
  33         merrifield,
  34         baytrail,
  35         cherrytrail,
  36         haswell,
  37         elkhartlake,
  38         navi_amd,
  39 };
  40
  41 struct dw_scl_sda_cfg {
  42         u32 ss_hcnt;
  43         u32 fs_hcnt;
  44         u32 fp_hcnt;
  45         u32 hs_hcnt;
  46         u32 ss_lcnt;
  47         u32 fs_lcnt;
  48         u32 fp_lcnt;
  49         u32 hs_lcnt;
  50         u32 sda_hold;
  51 };
  52
  53 struct dw_pci_controller {
  54         u32 bus_num;
  55         u32 flags;
  56         struct dw_scl_sda_cfg *scl_sda_cfg;
  57         int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
  58         u32 (*get_clk_rate_khz)(struct dw_i2c_dev *dev);
  59 };
  60
  61 /* Merrifield HCNT/LCNT/SDA hold time */
  62 static struct dw_scl_sda_cfg mrfld_config = {
  63         .ss_hcnt = 0x2f8,
  64         .fs_hcnt = 0x87,
  65         .ss_lcnt = 0x37b,
  66         .fs_lcnt = 0x10a,
  67 };
  68
  69 /* BayTrail HCNT/LCNT/SDA hold time */
  70 static struct dw_scl_sda_cfg byt_config = {
  71         .ss_hcnt = 0x200,
  72         .fs_hcnt = 0x55,
  73         .ss_lcnt = 0x200,
  74         .fs_lcnt = 0x99,
  75         .sda_hold = 0x6,
  76 };
  77
  78 /* Haswell HCNT/LCNT/SDA hold time */
  79 static struct dw_scl_sda_cfg hsw_config = {
  80         .ss_hcnt = 0x01b0,
  81         .fs_hcnt = 0x48,
  82         .ss_lcnt = 0x01fb,
  83         .fs_lcnt = 0xa0,
  84         .sda_hold = 0x9,
  85 };
  86
  87 /* Elkhart Lake HCNT/LCNT/SDA hold time */
  88 static struct dw_scl_sda_cfg ehl_config = {
  89         .ss_hcnt = 0x190,
  90         .fs_hcnt = 0x4E,
  91         .fp_hcnt = 0x1A,
  92         .hs_hcnt = 0x1F,
  93         .ss_lcnt = 0x1d6,
  94         .fs_lcnt = 0x96,
  95         .fp_lcnt = 0x32,
  96         .hs_lcnt = 0x36,
  97         .sda_hold = 0x1E,
  98 };
  99
 100 /* NAVI-AMD HCNT/LCNT/SDA hold time */
 101 static struct dw_scl_sda_cfg navi_amd_config = {
 102         .ss_hcnt = 0x1ae,
 103         .ss_lcnt = 0x23a,
 104         .sda_hold = 0x9,
 105 };
 106
 107 static u32 mfld_get_clk_rate_khz(struct dw_i2c_dev *dev)
 108 {
 109         return 25000;
 110 }
 111
 112 static u32 navi_amd_get_clk_rate_khz(struct dw_i2c_dev *dev)
 113 {
 114         return AMD_CLK_RATE_HZ;
 115 }
 116
 117 static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
 118 {
 119         struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
 120
 121         switch (pdev->device) {
 122         case 0x0817:
 123                 dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
 124                 fallthrough;
 125         case 0x0818:
 126         case 0x0819:
 127                 c->bus_num = pdev->device - 0x817 + 3;
 128                 return 0;
 129         case 0x082C:
 130         case 0x082D:
 131         case 0x082E:
 132                 c->bus_num = pdev->device - 0x82C + 0;
 133                 return 0;
 134         }
 135         return -ENODEV;
 136 }
 137
 138  /*
 139   * TODO find a better way how to deduplicate instantiation
 140   * of USB PD slave device from nVidia GPU driver.
 141   */
 142 static int navi_amd_register_client(struct dw_i2c_dev *dev)
 143 {
 144         struct i2c_board_info   info;
 145
 146         memset(&info, 0, sizeof(struct i2c_board_info));
 147         strscpy(info.type, "ccgx-ucsi", I2C_NAME_SIZE);
 148         info.addr = 0x08;
 149         info.irq = dev->irq;
 150
 151         dev->slave = i2c_new_client_device(&dev->adapter, &info);
 152         if (IS_ERR(dev->slave))
 153                 return PTR_ERR(dev->slave);
 154
 155         return 0;
 156 }
 157
 158 static int navi_amd_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
 159 {
 160         struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
 161
 162         dev->flags |= MODEL_AMD_NAVI_GPU;
 163         dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
 164         return 0;
 165 }
 166
 167 static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
 168 {
 169         /*
 170          * On Intel Merrifield the user visible i2c buses are enumerated
 171          * [1..7]. So, we add 1 to shift the default range. Besides that the
 172          * first PCI slot provides 4 functions, that's why we have to add 0 to
 173          * the first slot and 4 to the next one.
 174          */
 175         switch (PCI_SLOT(pdev->devfn)) {
 176         case 8:
 177                 c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1;
 178                 return 0;
 179         case 9:
 180                 c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1;
 181                 return 0;
 182         }
 183         return -ENODEV;
 184 }
 185
 186 static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev)
 187 {
 188         return 100000;
 189 }
 190
 191 static struct dw_pci_controller dw_pci_controllers[] = {
 192         [medfield] = {
 193                 .bus_num = -1,
 194                 .setup = mfld_setup,
 195                 .get_clk_rate_khz = mfld_get_clk_rate_khz,
 196         },
 197         [merrifield] = {
 198                 .bus_num = -1,
 199                 .scl_sda_cfg = &mrfld_config,
 200                 .setup = mrfld_setup,
 201         },
 202         [baytrail] = {
 203                 .bus_num = -1,
 204                 .scl_sda_cfg = &byt_config,
 205         },
 206         [haswell] = {
 207                 .bus_num = -1,
 208                 .scl_sda_cfg = &hsw_config,
 209         },
 210         [cherrytrail] = {
 211                 .bus_num = -1,
 212                 .scl_sda_cfg = &byt_config,
 213         },
 214         [elkhartlake] = {
 215                 .bus_num = -1,
 216                 .scl_sda_cfg = &ehl_config,
 217                 .get_clk_rate_khz = ehl_get_clk_rate_khz,
 218         },
 219         [navi_amd] = {
 220                 .bus_num = -1,
 221                 .scl_sda_cfg = &navi_amd_config,
 222                 .setup =  navi_amd_setup,
 223                 .get_clk_rate_khz = navi_amd_get_clk_rate_khz,
 224         },
 225 };
 226
 227 #ifdef CONFIG_PM
 228 static int i2c_dw_pci_suspend(struct device *dev)
 229 {
 230         struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
 231
 232         i_dev->suspended = true;
 233         i_dev->disable(i_dev);
 234
 235         return 0;
 236 }
 237
 238 static int i2c_dw_pci_resume(struct device *dev)
 239 {
 240         struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
 241         int ret;
 242
 243         ret = i_dev->init(i_dev);
 244         i_dev->suspended = false;
 245
 246         return ret;
 247 }
 248 #endif
 249
 250 static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend,
 251                             i2c_dw_pci_resume, NULL);
 252
 253 static int i2c_dw_pci_probe(struct pci_dev *pdev,
 254                             const struct pci_device_id *id)
 255 {
 256         struct dw_i2c_dev *dev;
 257         struct i2c_adapter *adap;
 258         int r;
 259         struct dw_pci_controller *controller;
 260         struct dw_scl_sda_cfg *cfg;
 261
 262         if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
 263                 dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__,
 264                         id->driver_data);
 265                 return -EINVAL;
 266         }
 267
 268         controller = &dw_pci_controllers[id->driver_data];
 269
 270         r = pcim_enable_device(pdev);
 271         if (r) {
 272                 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
 273                         r);
 274                 return r;
 275         }
 276
 277         pci_set_master(pdev);
 278
 279         r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
 280         if (r) {
 281                 dev_err(&pdev->dev, "I/O memory remapping failed\n");
 282                 return r;
 283         }
 284
 285         dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
 286         if (!dev)
 287                 return -ENOMEM;
 288
 289         r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
 290         if (r < 0)
 291                 return r;
 292
 293         dev->get_clk_rate_khz = controller->get_clk_rate_khz;
 294         dev->timings.bus_freq_hz = I2C_MAX_FAST_MODE_FREQ;
 295         dev->base = pcim_iomap_table(pdev)[0];
 296         dev->dev = &pdev->dev;
 297         dev->irq = pci_irq_vector(pdev, 0);
 298         dev->flags |= controller->flags;
 299
 300         pci_set_drvdata(pdev, dev);
 301
 302         if (controller->setup) {
 303                 r = controller->setup(pdev, controller);
 304                 if (r) {
 305                         pci_free_irq_vectors(pdev);
 306                         return r;
 307                 }
 308         }
 309
 310         i2c_dw_adjust_bus_speed(dev);
 311
 312         if (has_acpi_companion(&pdev->dev))
 313                 i2c_dw_acpi_configure(&pdev->dev);
 314
 315         r = i2c_dw_validate_speed(dev);
 316         if (r) {
 317                 pci_free_irq_vectors(pdev);
 318                 return r;
 319         }
 320
 321         i2c_dw_configure(dev);
 322
 323         if (controller->scl_sda_cfg) {
 324                 cfg = controller->scl_sda_cfg;
 325                 dev->ss_hcnt = cfg->ss_hcnt;
 326                 dev->fs_hcnt = cfg->fs_hcnt;
 327                 dev->fp_hcnt = cfg->fp_hcnt;
 328                 dev->hs_hcnt = cfg->hs_hcnt;
 329                 dev->ss_lcnt = cfg->ss_lcnt;
 330                 dev->fs_lcnt = cfg->fs_lcnt;
 331                 dev->fp_lcnt = cfg->fp_lcnt;
 332                 dev->hs_lcnt = cfg->hs_lcnt;
 333                 dev->sda_hold_time = cfg->sda_hold;
 334         }
 335
 336         adap = &dev->adapter;
 337         adap->owner = THIS_MODULE;
 338         adap->class = 0;
 339         ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
 340         adap->nr = controller->bus_num;
 341
 342         r = i2c_dw_probe(dev);
 343         if (r) {
 344                 pci_free_irq_vectors(pdev);
 345                 return r;
 346         }
 347
 348         if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU) {
 349                 r = navi_amd_register_client(dev);
 350                 if (r) {
 351                         dev_err(dev->dev, "register client failed with %d\n", r);
 352                         return r;
 353                 }
 354         }
 355
 356         pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
 357         pm_runtime_use_autosuspend(&pdev->dev);
 358         pm_runtime_put_autosuspend(&pdev->dev);
 359         pm_runtime_allow(&pdev->dev);
 360
 361         return 0;
 362 }
 363
 364 static void i2c_dw_pci_remove(struct pci_dev *pdev)
 365 {
 366         struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
 367
 368         dev->disable(dev);
 369         pm_runtime_forbid(&pdev->dev);
 370         pm_runtime_get_noresume(&pdev->dev);
 371
 372         i2c_del_adapter(&dev->adapter);
 373         devm_free_irq(&pdev->dev, dev->irq, dev);
 374         pci_free_irq_vectors(pdev);
 375 }
 376
 377 /* work with hotplug and coldplug */
 378 MODULE_ALIAS("i2c_designware-pci");
 379
 380 static const struct pci_device_id i2_designware_pci_ids[] = {
 381         /* Medfield */
 382         { PCI_VDEVICE(INTEL, 0x0817), medfield },
 383         { PCI_VDEVICE(INTEL, 0x0818), medfield },
 384         { PCI_VDEVICE(INTEL, 0x0819), medfield },
 385         { PCI_VDEVICE(INTEL, 0x082C), medfield },
 386         { PCI_VDEVICE(INTEL, 0x082D), medfield },
 387         { PCI_VDEVICE(INTEL, 0x082E), medfield },
 388         /* Merrifield */
 389         { PCI_VDEVICE(INTEL, 0x1195), merrifield },
 390         { PCI_VDEVICE(INTEL, 0x1196), merrifield },
 391         /* Baytrail */
 392         { PCI_VDEVICE(INTEL, 0x0F41), baytrail },
 393         { PCI_VDEVICE(INTEL, 0x0F42), baytrail },
 394         { PCI_VDEVICE(INTEL, 0x0F43), baytrail },
 395         { PCI_VDEVICE(INTEL, 0x0F44), baytrail },
 396         { PCI_VDEVICE(INTEL, 0x0F45), baytrail },
 397         { PCI_VDEVICE(INTEL, 0x0F46), baytrail },
 398         { PCI_VDEVICE(INTEL, 0x0F47), baytrail },
 399         /* Haswell */
 400         { PCI_VDEVICE(INTEL, 0x9c61), haswell },
 401         { PCI_VDEVICE(INTEL, 0x9c62), haswell },
 402         /* Braswell / Cherrytrail */
 403         { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail },
 404         { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail },
 405         { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail },
 406         { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail },
 407         { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail },
 408         { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail },
 409         { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail },
 410         /* Elkhart Lake (PSE I2C) */
 411         { PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake },
 412         { PCI_VDEVICE(INTEL, 0x4bba), elkhartlake },
 413         { PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake },
 414         { PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake },
 415         { PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake },
 416         { PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake },
 417         { PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake },
 418         { PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake },
 419         { PCI_VDEVICE(ATI,  0x7314), navi_amd },
 420         { PCI_VDEVICE(ATI,  0x73a4), navi_amd },
 421         { PCI_VDEVICE(ATI,  0x73e4), navi_amd },
 422         { PCI_VDEVICE(ATI,  0x73c4), navi_amd },
 423         { 0,}
 424 };
 425 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
 426
 427 static struct pci_driver dw_i2c_driver = {
 428         .name           = DRIVER_NAME,
 429         .id_table       = i2_designware_pci_ids,
 430         .probe          = i2c_dw_pci_probe,
 431         .remove         = i2c_dw_pci_remove,
 432         .driver         = {
 433                 .pm     = &i2c_dw_pm_ops,
 434         },
 435 };
 436
 437 module_pci_driver(dw_i2c_driver);
 438
 439 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
 440 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
 441 MODULE_LICENSE("GPL");