drivers/i2c/busses/i2c-designware-pcidrv.c

   1 /*
   2  * Synopsys DesignWare I2C adapter driver (master only).
   3  *
   4  * Based on the TI DAVINCI I2C adapter driver.
   5  *
   6  * Copyright (C) 2006 Texas Instruments.
   7  * Copyright (C) 2007 MontaVista Software Inc.
   8  * Copyright (C) 2009 Provigent Ltd.
   9  * Copyright (C) 2011 Intel corporation.
  10  *
  11  * ----------------------------------------------------------------------------
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License as published by
  15  * the Free Software Foundation; either version 2 of the License, or
  16  * (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  * ----------------------------------------------------------------------------
  23  *
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/delay.h>
  29 #include <linux/i2c.h>
  30 #include <linux/errno.h>
  31 #include <linux/sched.h>
  32 #include <linux/err.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/io.h>
  35 #include <linux/slab.h>
  36 #include <linux/pci.h>
  37 #include <linux/pm_runtime.h>
  38 #include "i2c-designware-core.h"
  39
  40 #define DRIVER_NAME "i2c-designware-pci"
  41
  42 enum dw_pci_ctl_id_t {
  43         moorestown_0,
  44         moorestown_1,
  45         moorestown_2,
  46
  47         medfield_0,
  48         medfield_1,
  49         medfield_2,
  50         medfield_3,
  51         medfield_4,
  52         medfield_5,
  53 };
  54
  55 struct dw_pci_controller {
  56         u32 bus_num;
  57         u32 bus_cfg;
  58         u32 tx_fifo_depth;
  59         u32 rx_fifo_depth;
  60         u32 clk_khz;
  61 };
  62
  63 #define INTEL_MID_STD_CFG  (DW_IC_CON_MASTER |                  \
  64                                 DW_IC_CON_SLAVE_DISABLE |       \
  65                                 DW_IC_CON_RESTART_EN)
  66
  67 static struct  dw_pci_controller  dw_pci_controllers[] = {
  68         [moorestown_0] = {
  69                 .bus_num     = 0,
  70                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  71                 .tx_fifo_depth = 32,
  72                 .rx_fifo_depth = 32,
  73                 .clk_khz      = 25000,
  74         },
  75         [moorestown_1] = {
  76                 .bus_num     = 1,
  77                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  78                 .tx_fifo_depth = 32,
  79                 .rx_fifo_depth = 32,
  80                 .clk_khz      = 25000,
  81         },
  82         [moorestown_2] = {
  83                 .bus_num     = 2,
  84                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  85                 .tx_fifo_depth = 32,
  86                 .rx_fifo_depth = 32,
  87                 .clk_khz      = 25000,
  88         },
  89         [medfield_0] = {
  90                 .bus_num     = 0,
  91                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  92                 .tx_fifo_depth = 32,
  93                 .rx_fifo_depth = 32,
  94                 .clk_khz      = 25000,
  95         },
  96         [medfield_1] = {
  97                 .bus_num     = 1,
  98                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  99                 .tx_fifo_depth = 32,
 100                 .rx_fifo_depth = 32,
 101                 .clk_khz      = 25000,
 102         },
 103         [medfield_2] = {
 104                 .bus_num     = 2,
 105                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 106                 .tx_fifo_depth = 32,
 107                 .rx_fifo_depth = 32,
 108                 .clk_khz      = 25000,
 109         },
 110         [medfield_3] = {
 111                 .bus_num     = 3,
 112                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
 113                 .tx_fifo_depth = 32,
 114                 .rx_fifo_depth = 32,
 115                 .clk_khz      = 25000,
 116         },
 117         [medfield_4] = {
 118                 .bus_num     = 4,
 119                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 120                 .tx_fifo_depth = 32,
 121                 .rx_fifo_depth = 32,
 122                 .clk_khz      = 25000,
 123         },
 124         [medfield_5] = {
 125                 .bus_num     = 5,
 126                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 127                 .tx_fifo_depth = 32,
 128                 .rx_fifo_depth = 32,
 129                 .clk_khz      = 25000,
 130         },
 131 };
 132 static struct i2c_algorithm i2c_dw_algo = {
 133         .master_xfer    = i2c_dw_xfer,
 134         .functionality  = i2c_dw_func,
 135 };
 136
 137 static int i2c_dw_pci_suspend(struct device *dev)
 138 {
 139         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
 140         struct dw_i2c_dev *i2c = pci_get_drvdata(pdev);
 141         int err;
 142
 143
 144         i2c_dw_disable(i2c);
 145
 146         err = pci_save_state(pdev);
 147         if (err) {
 148                 dev_err(&pdev->dev, "pci_save_state failed\n");
 149                 return err;
 150         }
 151
 152         err = pci_set_power_state(pdev, PCI_D3hot);
 153         if (err) {
 154                 dev_err(&pdev->dev, "pci_set_power_state failed\n");
 155                 return err;
 156         }
 157
 158         return 0;
 159 }
 160
 161 static int i2c_dw_pci_resume(struct device *dev)
 162 {
 163         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
 164         struct dw_i2c_dev *i2c = pci_get_drvdata(pdev);
 165         int err;
 166         u32 enabled;
 167
 168         enabled = i2c_dw_is_enabled(i2c);
 169         if (enabled)
 170                 return 0;
 171
 172         err = pci_set_power_state(pdev, PCI_D0);
 173         if (err) {
 174                 dev_err(&pdev->dev, "pci_set_power_state() failed\n");
 175                 return err;
 176         }
 177
 178         pci_restore_state(pdev);
 179
 180         i2c_dw_init(i2c);
 181         return 0;
 182 }
 183
 184 static int i2c_dw_pci_runtime_idle(struct device *dev)
 185 {
 186         int err = pm_schedule_suspend(dev, 500);
 187         dev_dbg(dev, "runtime_idle called\n");
 188
 189         if (err != 0)
 190                 return 0;
 191         return -EBUSY;
 192 }
 193
 194 static const struct dev_pm_ops i2c_dw_pm_ops = {
 195         .resume         = i2c_dw_pci_resume,
 196         .suspend        = i2c_dw_pci_suspend,
 197         SET_RUNTIME_PM_OPS(i2c_dw_pci_suspend, i2c_dw_pci_resume,
 198                            i2c_dw_pci_runtime_idle)
 199 };
 200
 201 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
 202 {
 203         return dev->controller->clk_khz;
 204 }
 205
 206 static int i2c_dw_pci_probe(struct pci_dev *pdev,
 207                             const struct pci_device_id *id)
 208 {
 209         struct dw_i2c_dev *dev;
 210         struct i2c_adapter *adap;
 211         int r;
 212         struct  dw_pci_controller *controller;
 213
 214         if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
 215                 dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__,
 216                         id->driver_data);
 217                 return -EINVAL;
 218         }
 219
 220         controller = &dw_pci_controllers[id->driver_data];
 221
 222         r = pcim_enable_device(pdev);
 223         if (r) {
 224                 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
 225                         r);
 226                 return r;
 227         }
 228
 229         r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
 230         if (r) {
 231                 dev_err(&pdev->dev, "I/O memory remapping failed\n");
 232                 return r;
 233         }
 234
 235         dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
 236         if (!dev)
 237                 return -ENOMEM;
 238
 239         init_completion(&dev->cmd_complete);
 240         mutex_init(&dev->lock);
 241         dev->clk = NULL;
 242         dev->controller = controller;
 243         dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
 244         dev->base = pcim_iomap_table(pdev)[0];
 245         dev->dev = &pdev->dev;
 246         dev->functionality =
 247                 I2C_FUNC_I2C |
 248                 I2C_FUNC_SMBUS_BYTE |
 249                 I2C_FUNC_SMBUS_BYTE_DATA |
 250                 I2C_FUNC_SMBUS_WORD_DATA |
 251                 I2C_FUNC_SMBUS_I2C_BLOCK;
 252         dev->master_cfg =  controller->bus_cfg;
 253
 254         pci_set_drvdata(pdev, dev);
 255
 256         dev->tx_fifo_depth = controller->tx_fifo_depth;
 257         dev->rx_fifo_depth = controller->rx_fifo_depth;
 258         r = i2c_dw_init(dev);
 259         if (r)
 260                 return r;
 261
 262         adap = &dev->adapter;
 263         i2c_set_adapdata(adap, dev);
 264         adap->owner = THIS_MODULE;
 265         adap->class = 0;
 266         adap->algo = &i2c_dw_algo;
 267         adap->dev.parent = &pdev->dev;
 268         adap->nr = controller->bus_num;
 269         snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci-%d",
 270                 adap->nr);
 271
 272         r = devm_request_irq(&pdev->dev, pdev->irq, i2c_dw_isr, IRQF_SHARED,
 273                         adap->name, dev);
 274         if (r) {
 275                 dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
 276                 return r;
 277         }
 278
 279         i2c_dw_disable_int(dev);
 280         i2c_dw_clear_int(dev);
 281         r = i2c_add_numbered_adapter(adap);
 282         if (r) {
 283                 dev_err(&pdev->dev, "failure adding adapter\n");
 284                 return r;
 285         }
 286
 287         pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
 288         pm_runtime_use_autosuspend(&pdev->dev);
 289         pm_runtime_allow(&pdev->dev);
 290
 291         return 0;
 292 }
 293
 294 static void i2c_dw_pci_remove(struct pci_dev *pdev)
 295 {
 296         struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
 297
 298         i2c_dw_disable(dev);
 299         pm_runtime_forbid(&pdev->dev);
 300         pm_runtime_get_noresume(&pdev->dev);
 301
 302         i2c_del_adapter(&dev->adapter);
 303 }
 304
 305 /* work with hotplug and coldplug */
 306 MODULE_ALIAS("i2c_designware-pci");
 307
 308 static const struct pci_device_id i2_designware_pci_ids[] = {
 309         /* Moorestown */
 310         { PCI_VDEVICE(INTEL, 0x0802), moorestown_0 },
 311         { PCI_VDEVICE(INTEL, 0x0803), moorestown_1 },
 312         { PCI_VDEVICE(INTEL, 0x0804), moorestown_2 },
 313         /* Medfield */
 314         { PCI_VDEVICE(INTEL, 0x0817), medfield_3,},
 315         { PCI_VDEVICE(INTEL, 0x0818), medfield_4 },
 316         { PCI_VDEVICE(INTEL, 0x0819), medfield_5 },
 317         { PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
 318         { PCI_VDEVICE(INTEL, 0x082D), medfield_1 },
 319         { PCI_VDEVICE(INTEL, 0x082E), medfield_2 },
 320         { 0,}
 321 };
 322 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
 323
 324 static struct pci_driver dw_i2c_driver = {
 325         .name           = DRIVER_NAME,
 326         .id_table       = i2_designware_pci_ids,
 327         .probe          = i2c_dw_pci_probe,
 328         .remove         = i2c_dw_pci_remove,
 329         .driver         = {
 330                 .pm     = &i2c_dw_pm_ops,
 331         },
 332 };
 333
 334 module_pci_driver(dw_i2c_driver);
 335
 336 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
 337 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
 338 MODULE_LICENSE("GPL");