174938fc7a7eecd52901a2a1c04eda76829b9ead
[platform/kernel/linux-starfive.git] / drivers / i2c / busses / i2c-designware-pcidrv.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Synopsys DesignWare I2C adapter driver (master only).
4  *
5  * Based on the TI DAVINCI I2C adapter driver.
6  *
7  * Copyright (C) 2006 Texas Instruments.
8  * Copyright (C) 2007 MontaVista Software Inc.
9  * Copyright (C) 2009 Provigent Ltd.
10  * Copyright (C) 2011, 2015, 2016 Intel Corporation.
11  */
12 #include <linux/acpi.h>
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/errno.h>
16 #include <linux/i2c.h>
17 #include <linux/interrupt.h>
18 #include <linux/io.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/sched.h>
24 #include <linux/slab.h>
25
26 #include "i2c-designware-core.h"
27
28 #define DRIVER_NAME "i2c-designware-pci"
29 #define AMD_CLK_RATE_HZ 100000
30
31 enum dw_pci_ctl_id_t {
32         medfield,
33         merrifield,
34         baytrail,
35         cherrytrail,
36         haswell,
37         elkhartlake,
38         navi_amd,
39 };
40
41 struct dw_scl_sda_cfg {
42         u32 ss_hcnt;
43         u32 fs_hcnt;
44         u32 fp_hcnt;
45         u32 hs_hcnt;
46         u32 ss_lcnt;
47         u32 fs_lcnt;
48         u32 fp_lcnt;
49         u32 hs_lcnt;
50         u32 sda_hold;
51 };
52
53 struct dw_pci_controller {
54         u32 bus_num;
55         u32 flags;
56         struct dw_scl_sda_cfg *scl_sda_cfg;
57         int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
58         u32 (*get_clk_rate_khz)(struct dw_i2c_dev *dev);
59 };
60
61 /* Merrifield HCNT/LCNT/SDA hold time */
62 static struct dw_scl_sda_cfg mrfld_config = {
63         .ss_hcnt = 0x2f8,
64         .fs_hcnt = 0x87,
65         .ss_lcnt = 0x37b,
66         .fs_lcnt = 0x10a,
67 };
68
69 /* BayTrail HCNT/LCNT/SDA hold time */
70 static struct dw_scl_sda_cfg byt_config = {
71         .ss_hcnt = 0x200,
72         .fs_hcnt = 0x55,
73         .ss_lcnt = 0x200,
74         .fs_lcnt = 0x99,
75         .sda_hold = 0x6,
76 };
77
78 /* Haswell HCNT/LCNT/SDA hold time */
79 static struct dw_scl_sda_cfg hsw_config = {
80         .ss_hcnt = 0x01b0,
81         .fs_hcnt = 0x48,
82         .ss_lcnt = 0x01fb,
83         .fs_lcnt = 0xa0,
84         .sda_hold = 0x9,
85 };
86
87 /* NAVI-AMD HCNT/LCNT/SDA hold time */
88 static struct dw_scl_sda_cfg navi_amd_config = {
89         .ss_hcnt = 0x1ae,
90         .ss_lcnt = 0x23a,
91         .sda_hold = 0x9,
92 };
93
94 static u32 mfld_get_clk_rate_khz(struct dw_i2c_dev *dev)
95 {
96         return 25000;
97 }
98
99 static u32 navi_amd_get_clk_rate_khz(struct dw_i2c_dev *dev)
100 {
101         return AMD_CLK_RATE_HZ;
102 }
103
104 static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
105 {
106         struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
107
108         switch (pdev->device) {
109         case 0x0817:
110                 dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
111                 fallthrough;
112         case 0x0818:
113         case 0x0819:
114                 c->bus_num = pdev->device - 0x817 + 3;
115                 return 0;
116         case 0x082C:
117         case 0x082D:
118         case 0x082E:
119                 c->bus_num = pdev->device - 0x82C + 0;
120                 return 0;
121         }
122         return -ENODEV;
123 }
124
125  /*
126   * TODO find a better way how to deduplicate instantiation
127   * of USB PD slave device from nVidia GPU driver.
128   */
129 static int navi_amd_register_client(struct dw_i2c_dev *dev)
130 {
131         struct i2c_board_info   info;
132
133         memset(&info, 0, sizeof(struct i2c_board_info));
134         strscpy(info.type, "ccgx-ucsi", I2C_NAME_SIZE);
135         info.addr = 0x08;
136         info.irq = dev->irq;
137
138         dev->slave = i2c_new_client_device(&dev->adapter, &info);
139         if (IS_ERR(dev->slave))
140                 return PTR_ERR(dev->slave);
141
142         return 0;
143 }
144
145 static int navi_amd_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
146 {
147         struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
148
149         dev->flags |= MODEL_AMD_NAVI_GPU;
150         dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
151         return 0;
152 }
153
154 static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
155 {
156         /*
157          * On Intel Merrifield the user visible i2c buses are enumerated
158          * [1..7]. So, we add 1 to shift the default range. Besides that the
159          * first PCI slot provides 4 functions, that's why we have to add 0 to
160          * the first slot and 4 to the next one.
161          */
162         switch (PCI_SLOT(pdev->devfn)) {
163         case 8:
164                 c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1;
165                 return 0;
166         case 9:
167                 c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1;
168                 return 0;
169         }
170         return -ENODEV;
171 }
172
173 static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev)
174 {
175         return 100000;
176 }
177
178 static struct dw_pci_controller dw_pci_controllers[] = {
179         [medfield] = {
180                 .bus_num = -1,
181                 .setup = mfld_setup,
182                 .get_clk_rate_khz = mfld_get_clk_rate_khz,
183         },
184         [merrifield] = {
185                 .bus_num = -1,
186                 .scl_sda_cfg = &mrfld_config,
187                 .setup = mrfld_setup,
188         },
189         [baytrail] = {
190                 .bus_num = -1,
191                 .scl_sda_cfg = &byt_config,
192         },
193         [haswell] = {
194                 .bus_num = -1,
195                 .scl_sda_cfg = &hsw_config,
196         },
197         [cherrytrail] = {
198                 .bus_num = -1,
199                 .scl_sda_cfg = &byt_config,
200         },
201         [elkhartlake] = {
202                 .bus_num = -1,
203                 .get_clk_rate_khz = ehl_get_clk_rate_khz,
204         },
205         [navi_amd] = {
206                 .bus_num = -1,
207                 .scl_sda_cfg = &navi_amd_config,
208                 .setup =  navi_amd_setup,
209                 .get_clk_rate_khz = navi_amd_get_clk_rate_khz,
210         },
211 };
212
213 #ifdef CONFIG_PM
214 static int i2c_dw_pci_suspend(struct device *dev)
215 {
216         struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
217
218         i_dev->suspended = true;
219         i_dev->disable(i_dev);
220
221         return 0;
222 }
223
224 static int i2c_dw_pci_resume(struct device *dev)
225 {
226         struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
227         int ret;
228
229         ret = i_dev->init(i_dev);
230         i_dev->suspended = false;
231
232         return ret;
233 }
234 #endif
235
236 static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend,
237                             i2c_dw_pci_resume, NULL);
238
239 static int i2c_dw_pci_probe(struct pci_dev *pdev,
240                             const struct pci_device_id *id)
241 {
242         struct dw_i2c_dev *dev;
243         struct i2c_adapter *adap;
244         int r;
245         struct dw_pci_controller *controller;
246         struct dw_scl_sda_cfg *cfg;
247
248         if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
249                 dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__,
250                         id->driver_data);
251                 return -EINVAL;
252         }
253
254         controller = &dw_pci_controllers[id->driver_data];
255
256         r = pcim_enable_device(pdev);
257         if (r) {
258                 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
259                         r);
260                 return r;
261         }
262
263         pci_set_master(pdev);
264
265         r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
266         if (r) {
267                 dev_err(&pdev->dev, "I/O memory remapping failed\n");
268                 return r;
269         }
270
271         dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
272         if (!dev)
273                 return -ENOMEM;
274
275         r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
276         if (r < 0)
277                 return r;
278
279         dev->get_clk_rate_khz = controller->get_clk_rate_khz;
280         dev->timings.bus_freq_hz = I2C_MAX_FAST_MODE_FREQ;
281         dev->base = pcim_iomap_table(pdev)[0];
282         dev->dev = &pdev->dev;
283         dev->irq = pci_irq_vector(pdev, 0);
284         dev->flags |= controller->flags;
285
286         pci_set_drvdata(pdev, dev);
287
288         if (controller->setup) {
289                 r = controller->setup(pdev, controller);
290                 if (r) {
291                         pci_free_irq_vectors(pdev);
292                         return r;
293                 }
294         }
295
296         i2c_dw_adjust_bus_speed(dev);
297
298         if (has_acpi_companion(&pdev->dev))
299                 i2c_dw_acpi_configure(&pdev->dev);
300
301         r = i2c_dw_validate_speed(dev);
302         if (r) {
303                 pci_free_irq_vectors(pdev);
304                 return r;
305         }
306
307         i2c_dw_configure(dev);
308
309         if (controller->scl_sda_cfg) {
310                 cfg = controller->scl_sda_cfg;
311                 dev->ss_hcnt = cfg->ss_hcnt;
312                 dev->fs_hcnt = cfg->fs_hcnt;
313                 dev->fp_hcnt = cfg->fp_hcnt;
314                 dev->hs_hcnt = cfg->hs_hcnt;
315                 dev->ss_lcnt = cfg->ss_lcnt;
316                 dev->fs_lcnt = cfg->fs_lcnt;
317                 dev->fp_lcnt = cfg->fp_lcnt;
318                 dev->hs_lcnt = cfg->hs_lcnt;
319                 dev->sda_hold_time = cfg->sda_hold;
320         }
321
322         adap = &dev->adapter;
323         adap->owner = THIS_MODULE;
324         adap->class = 0;
325         ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
326         adap->nr = controller->bus_num;
327
328         r = i2c_dw_probe(dev);
329         if (r) {
330                 pci_free_irq_vectors(pdev);
331                 return r;
332         }
333
334         if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU) {
335                 r = navi_amd_register_client(dev);
336                 if (r) {
337                         dev_err(dev->dev, "register client failed with %d\n", r);
338                         return r;
339                 }
340         }
341
342         pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
343         pm_runtime_use_autosuspend(&pdev->dev);
344         pm_runtime_put_autosuspend(&pdev->dev);
345         pm_runtime_allow(&pdev->dev);
346
347         return 0;
348 }
349
350 static void i2c_dw_pci_remove(struct pci_dev *pdev)
351 {
352         struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
353
354         dev->disable(dev);
355         pm_runtime_forbid(&pdev->dev);
356         pm_runtime_get_noresume(&pdev->dev);
357
358         i2c_del_adapter(&dev->adapter);
359         devm_free_irq(&pdev->dev, dev->irq, dev);
360         pci_free_irq_vectors(pdev);
361 }
362
363 /* work with hotplug and coldplug */
364 MODULE_ALIAS("i2c_designware-pci");
365
366 static const struct pci_device_id i2_designware_pci_ids[] = {
367         /* Medfield */
368         { PCI_VDEVICE(INTEL, 0x0817), medfield },
369         { PCI_VDEVICE(INTEL, 0x0818), medfield },
370         { PCI_VDEVICE(INTEL, 0x0819), medfield },
371         { PCI_VDEVICE(INTEL, 0x082C), medfield },
372         { PCI_VDEVICE(INTEL, 0x082D), medfield },
373         { PCI_VDEVICE(INTEL, 0x082E), medfield },
374         /* Merrifield */
375         { PCI_VDEVICE(INTEL, 0x1195), merrifield },
376         { PCI_VDEVICE(INTEL, 0x1196), merrifield },
377         /* Baytrail */
378         { PCI_VDEVICE(INTEL, 0x0F41), baytrail },
379         { PCI_VDEVICE(INTEL, 0x0F42), baytrail },
380         { PCI_VDEVICE(INTEL, 0x0F43), baytrail },
381         { PCI_VDEVICE(INTEL, 0x0F44), baytrail },
382         { PCI_VDEVICE(INTEL, 0x0F45), baytrail },
383         { PCI_VDEVICE(INTEL, 0x0F46), baytrail },
384         { PCI_VDEVICE(INTEL, 0x0F47), baytrail },
385         /* Haswell */
386         { PCI_VDEVICE(INTEL, 0x9c61), haswell },
387         { PCI_VDEVICE(INTEL, 0x9c62), haswell },
388         /* Braswell / Cherrytrail */
389         { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail },
390         { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail },
391         { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail },
392         { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail },
393         { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail },
394         { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail },
395         { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail },
396         /* Elkhart Lake (PSE I2C) */
397         { PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake },
398         { PCI_VDEVICE(INTEL, 0x4bba), elkhartlake },
399         { PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake },
400         { PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake },
401         { PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake },
402         { PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake },
403         { PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake },
404         { PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake },
405         { PCI_VDEVICE(ATI,  0x7314), navi_amd },
406         { PCI_VDEVICE(ATI,  0x73a4), navi_amd },
407         { PCI_VDEVICE(ATI,  0x73e4), navi_amd },
408         { PCI_VDEVICE(ATI,  0x73c4), navi_amd },
409         { 0,}
410 };
411 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
412
413 static struct pci_driver dw_i2c_driver = {
414         .name           = DRIVER_NAME,
415         .id_table       = i2_designware_pci_ids,
416         .probe          = i2c_dw_pci_probe,
417         .remove         = i2c_dw_pci_remove,
418         .driver         = {
419                 .pm     = &i2c_dw_pm_ops,
420         },
421 };
422
423 module_pci_driver(dw_i2c_driver);
424
425 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
426 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
427 MODULE_LICENSE("GPL");