2 # I2C subsystem configuration
8 bool "Enable Driver Model for I2C drivers"
11 Enable driver model for I2C. The I2C uclass interface: probe, read,
12 write and speed, is implemented with the bus drivers operations,
13 which provide methods for bus setting and data transfer. Each chip
14 device (bus child) info is kept as parent platdata. The interface
15 is defined in include/i2c.h.
17 config I2C_CROS_EC_TUNNEL
18 tristate "Chrome OS EC tunnel I2C bus"
21 This provides an I2C bus that will tunnel i2c commands through to
22 the other side of the Chrome OS EC to the I2C bus connected there.
23 This will work whatever the interface used to talk to the EC (SPI,
24 I2C or LPC). Some Chromebooks use this when the hardware design
25 does not allow direct access to the main PMIC from the AP.
27 config I2C_CROS_EC_LDO
28 bool "Provide access to LDOs on the Chrome OS EC"
31 On many Chromebooks the main PMIC is inaccessible to the AP. This is
32 often dealt with by using an I2C pass-through interface provided by
33 the EC. On some unfortunate models (e.g. Spring) the pass-through
34 is not available, and an LDO message is available instead. This
35 option enables a driver which provides very basic access to those
36 regulators, via the EC. We implement this as an I2C bus which
37 emulates just the TPS65090 messages we know about. This is done to
38 avoid duplicating the logic in the TPS65090 regulator driver for
39 enabling/disabling an LDO.
41 config I2C_SET_DEFAULT_BUS_NUM
42 bool "Set default I2C bus number"
45 Set default number of I2C bus to be accessed. This option provides
46 behaviour similar to old (i.e. pre DM) I2C bus driver.
48 config I2C_DEFAULT_BUS_NUMBER
49 hex "I2C default bus number"
50 depends on I2C_SET_DEFAULT_BUS_NUM
53 Number of default I2C bus to use
56 bool "Enable Driver Model for software emulated I2C bus driver"
57 depends on DM_I2C && DM_GPIO
59 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
60 configuration is given by the device tree. Kernel-style device tree
61 bindings are supported.
62 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
65 bool "Atmel I2C driver"
66 depends on DM_I2C && ARCH_AT91
68 Add support for the Atmel I2C driver. A serious problem is that there
69 is no documented way to issue repeated START conditions for more than
70 two messages, as needed to support combined I2C messages. Use the
71 i2c-gpio driver unless your system can cope with this limitation.
72 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
75 bool "Broadcom I2C driver"
79 Add support for Broadcom I2C driver.
80 Say yes here to to enable the Broadco I2C driver.
83 bool "Freescale I2C bus driver"
86 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
89 config SYS_I2C_CADENCE
90 tristate "Cadence I2C Controller"
91 depends on DM_I2C && (ARCH_ZYNQ || ARM64)
93 Say yes here to select Cadence I2C Host Controller. This controller is
94 e.g. used by Xilinx Zynq.
97 tristate "Cortina-Access I2C Controller"
98 depends on DM_I2C && CORTINA_PLATFORM
101 Add support for the Cortina Access I2C host controller.
102 Say yes here to select Cortina-Access I2C Host Controller.
104 config SYS_I2C_DAVINCI
105 bool "Davinci I2C Controller"
106 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
108 Say yes here to add support for Davinci and Keystone I2C controller
111 bool "Designware I2C Controller"
114 Say yes here to select the Designware I2C Host Controller. This
115 controller is used in various SoCs, e.g. the ST SPEAr, Altera
116 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
118 config SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
119 bool "DW I2C Enable Status Register not supported"
120 depends on SYS_I2C_DW && (TARGET_SPEAR300 || TARGET_SPEAR310 || \
121 TARGET_SPEAR320 || TARGET_SPEAR600 || TARGET_X600)
124 Some versions of the Designware I2C controller do not support the
125 enable status register. This config option can be enabled in such
128 config SYS_I2C_ASPEED
129 bool "Aspeed I2C Controller"
130 depends on DM_I2C && ARCH_ASPEED
132 Say yes here to select Aspeed I2C Host Controller. The driver
133 supports AST2500 and AST2400 controllers, but is very limited.
134 Only single master mode is supported and only byte-by-byte
135 synchronous reads and writes are supported, no Pool Buffers or DMA.
138 bool "Intel I2C/SMBUS driver"
141 Add support for the Intel SMBUS driver. So far this driver is just
142 a stub which perhaps some basic init. There is no implementation of
143 the I2C API meaning that any I2C operations will immediately fail
146 config SYS_I2C_IMX_LPI2C
147 bool "NXP i.MX LPI2C driver"
149 Add support for the NXP i.MX LPI2C driver.
152 bool "Amlogic Meson I2C driver"
153 depends on DM_I2C && ARCH_MESON
155 Add support for the I2C controller available in Amlogic Meson
156 SoCs. The controller supports programmable bus speed including
157 standard (100kbits/s) and fast (400kbit/s) speed and allows the
158 software to define a flexible format of the bit streams. It has an
159 internal buffer holding up to 8 bytes for transfers and supports
160 both 7-bit and 10-bit addresses.
163 bool "NXP MXC I2C driver"
165 Add support for the NXP I2C driver. This supports up to four bus
166 channels and operating on standard mode up to 100 kbits/s and fast
167 mode up to 400 kbits/s.
169 # These settings are not used with DM_I2C, however SPL doesn't use
170 # DM_I2C even if DM_I2C is enabled, and so might use these settings even
171 # when main u-boot does not!
172 if SYS_I2C_MXC && (!DM_I2C || SPL)
173 config SYS_I2C_MXC_I2C1
176 Add support for NXP MXC I2C Controller 1.
177 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
179 config SYS_I2C_MXC_I2C2
182 Add support for NXP MXC I2C Controller 2.
183 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
185 config SYS_I2C_MXC_I2C3
188 Add support for NXP MXC I2C Controller 3.
189 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
191 config SYS_I2C_MXC_I2C4
194 Add support for NXP MXC I2C Controller 4.
195 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
197 config SYS_I2C_MXC_I2C5
200 Add support for NXP MXC I2C Controller 5.
201 Required for SoCs which have I2C MXC controller 5 eg LX2160A
203 config SYS_I2C_MXC_I2C6
206 Add support for NXP MXC I2C Controller 6.
207 Required for SoCs which have I2C MXC controller 6 eg LX2160A
209 config SYS_I2C_MXC_I2C7
212 Add support for NXP MXC I2C Controller 7.
213 Required for SoCs which have I2C MXC controller 7 eg LX2160A
215 config SYS_I2C_MXC_I2C8
218 Add support for NXP MXC I2C Controller 8.
219 Required for SoCs which have I2C MXC controller 8 eg LX2160A
223 config SYS_MXC_I2C1_SPEED
224 int "I2C Channel 1 speed"
225 default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
228 MXC I2C Channel 1 speed
230 config SYS_MXC_I2C1_SLAVE
238 config SYS_MXC_I2C2_SPEED
239 int "I2C Channel 2 speed"
240 default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
243 MXC I2C Channel 2 speed
245 config SYS_MXC_I2C2_SLAVE
253 config SYS_MXC_I2C3_SPEED
254 int "I2C Channel 3 speed"
257 MXC I2C Channel 3 speed
259 config SYS_MXC_I2C3_SLAVE
267 config SYS_MXC_I2C4_SPEED
268 int "I2C Channel 4 speed"
271 MXC I2C Channel 4 speed
273 config SYS_MXC_I2C4_SLAVE
281 config SYS_MXC_I2C5_SPEED
282 int "I2C Channel 5 speed"
285 MXC I2C Channel 5 speed
287 config SYS_MXC_I2C5_SLAVE
295 config SYS_MXC_I2C6_SPEED
296 int "I2C Channel 6 speed"
299 MXC I2C Channel 6 speed
301 config SYS_MXC_I2C6_SLAVE
309 config SYS_MXC_I2C7_SPEED
310 int "I2C Channel 7 speed"
313 MXC I2C Channel 7 speed
315 config SYS_MXC_I2C7_SLAVE
323 config SYS_MXC_I2C8_SPEED
324 int "I2C Channel 8 speed"
327 MXC I2C Channel 8 speed
329 config SYS_MXC_I2C8_SLAVE
336 config SYS_I2C_OMAP24XX
337 bool "TI OMAP2+ I2C driver"
338 depends on ARCH_OMAP2PLUS || ARCH_K3
340 Add support for the OMAP2+ I2C driver.
343 config SYS_OMAP24_I2C_SLAVE
344 int "I2C Slave addr channel 0"
347 OMAP24xx I2C Slave address channel 0
349 config SYS_OMAP24_I2C_SPEED
350 int "I2C Slave channel 0 speed"
353 OMAP24xx Slave speed channel 0
356 config SYS_I2C_RCAR_I2C
357 bool "Renesas RCar I2C driver"
358 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
360 Support for Renesas RCar I2C controller.
362 config SYS_I2C_RCAR_IIC
363 bool "Renesas RCar Gen3 IIC driver"
364 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
366 Support for Renesas RCar Gen3 IIC controller.
368 config SYS_I2C_ROCKCHIP
369 bool "Rockchip I2C driver"
372 Add support for the Rockchip I2C driver. This is used with various
373 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
374 have several I2C ports and all are provided, controlled by the
377 config SYS_I2C_SANDBOX
378 bool "Sandbox I2C driver"
379 depends on SANDBOX && DM_I2C
381 Enable I2C support for sandbox. This is an emulation of a real I2C
382 bus. Devices can be attached to the bus using the device tree
383 which specifies the driver to use. See sandbox.dts as an example.
385 config SYS_I2C_OCTEON
386 bool "Octeon II/III/TX/TX2 I2C driver"
387 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
390 Add support for the Marvell Octeon I2C driver. This is used with
391 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
392 chips have several I2C ports and all are provided, controlled by
395 config SYS_I2C_S3C24X0
396 bool "Samsung I2C driver"
397 depends on ARCH_EXYNOS4 && DM_I2C
399 Support for Samsung I2C controller as Samsung SoCs.
401 config SYS_I2C_STM32F7
402 bool "STMicroelectronics STM32F7 I2C support"
403 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
405 Enable this option to add support for STM32 I2C controller
406 introduced with STM32F7/H7 SoCs. This I2C controller supports :
407 _ Slave and master modes
408 _ Multimaster capability
409 _ Standard-mode (up to 100 kHz)
410 _ Fast-mode (up to 400 kHz)
411 _ Fast-mode Plus (up to 1 MHz)
412 _ 7-bit and 10-bit addressing mode
413 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
414 _ All 7-bit addresses acknowledge mode
416 _ Programmable setup and hold times
417 _ Easy to use event management
418 _ Optional clock stretching
422 bool "NVIDIA Tegra internal I2C controller"
423 depends on ARCH_TEGRA
425 Support for NVIDIA I2C controller available in Tegra SoCs.
427 config SYS_I2C_UNIPHIER
428 bool "UniPhier I2C driver"
429 depends on ARCH_UNIPHIER && DM_I2C
432 Support for UniPhier I2C controller driver. This I2C controller
433 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
435 config SYS_I2C_UNIPHIER_F
436 bool "UniPhier FIFO-builtin I2C driver"
437 depends on ARCH_UNIPHIER && DM_I2C
440 Support for UniPhier FIFO-builtin I2C controller driver.
441 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
443 config SYS_I2C_VERSATILE
444 bool "Arm Ltd Versatile I2C bus driver"
445 depends on DM_I2C && (TARGET_VEXPRESS_CA15_TC2 || TARGET_VEXPRESS64_JUNO)
447 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
448 controller is present in the development boards manufactured by Arm Ltd.
450 config SYS_I2C_MVTWSI
451 bool "Marvell I2C driver"
454 Support for Marvell I2C controllers as used on the orion5x and
455 kirkwood SoC families.
457 config TEGRA186_BPMP_I2C
458 bool "Enable Tegra186 BPMP-based I2C driver"
459 depends on TEGRA186_BPMP
461 Support for Tegra I2C controllers managed by the BPMP (Boot and
462 Power Management Processor). On Tegra186, some I2C controllers are
463 directly controlled by the main CPU, whereas others are controlled
464 by the BPMP, and can only be accessed by the main CPU via IPC
465 requests to the BPMP. This driver covers the latter case.
467 config SYS_I2C_BUS_MAX
469 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
471 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
472 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
473 default 5 if OMAP54XX
475 Define the maximum number of available I2C buses.
477 config SYS_I2C_XILINX_XIIC
478 bool "Xilinx AXI I2C driver"
481 Support for Xilinx AXI I2C controller.
484 bool "gdsys IHS I2C driver"
487 Support for gdsys IHS I2C driver on FPGA bus.
489 source "drivers/i2c/muxes/Kconfig"