2 # I2C subsystem configuration
8 bool "Enable Driver Model for I2C drivers"
11 Enable driver model for I2C. The I2C uclass interface: probe, read,
12 write and speed, is implemented with the bus drivers operations,
13 which provide methods for bus setting and data transfer. Each chip
14 device (bus child) info is kept as parent plat. The interface
15 is defined in include/i2c.h.
18 bool "Enable Driver Model for I2C drivers in SPL"
19 depends on SPL_DM && DM_I2C
22 Enable driver model for I2C. The I2C uclass interface: probe, read,
23 write and speed, is implemented with the bus drivers operations,
24 which provide methods for bus setting and data transfer. Each chip
25 device (bus child) info is kept as parent platdata. The interface
26 is defined in include/i2c.h.
28 config I2C_CROS_EC_TUNNEL
29 tristate "Chrome OS EC tunnel I2C bus"
32 This provides an I2C bus that will tunnel i2c commands through to
33 the other side of the Chrome OS EC to the I2C bus connected there.
34 This will work whatever the interface used to talk to the EC (SPI,
35 I2C or LPC). Some Chromebooks use this when the hardware design
36 does not allow direct access to the main PMIC from the AP.
38 config I2C_CROS_EC_LDO
39 bool "Provide access to LDOs on the Chrome OS EC"
42 On many Chromebooks the main PMIC is inaccessible to the AP. This is
43 often dealt with by using an I2C pass-through interface provided by
44 the EC. On some unfortunate models (e.g. Spring) the pass-through
45 is not available, and an LDO message is available instead. This
46 option enables a driver which provides very basic access to those
47 regulators, via the EC. We implement this as an I2C bus which
48 emulates just the TPS65090 messages we know about. This is done to
49 avoid duplicating the logic in the TPS65090 regulator driver for
50 enabling/disabling an LDO.
52 config I2C_SET_DEFAULT_BUS_NUM
53 bool "Set default I2C bus number"
56 Set default number of I2C bus to be accessed. This option provides
57 behaviour similar to old (i.e. pre DM) I2C bus driver.
59 config I2C_DEFAULT_BUS_NUMBER
60 hex "I2C default bus number"
61 depends on I2C_SET_DEFAULT_BUS_NUM
64 Number of default I2C bus to use
67 bool "Enable Driver Model for software emulated I2C bus driver"
68 depends on DM_I2C && DM_GPIO
70 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
71 configuration is given by the device tree. Kernel-style device tree
72 bindings are supported.
73 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
75 config SPL_DM_I2C_GPIO
76 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
77 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO_SUPPORT
80 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
81 configuration is given by the device tree. Kernel-style device tree
82 bindings are supported.
83 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
86 bool "Atmel I2C driver"
87 depends on DM_I2C && ARCH_AT91
89 Add support for the Atmel I2C driver. A serious problem is that there
90 is no documented way to issue repeated START conditions for more than
91 two messages, as needed to support combined I2C messages. Use the
92 i2c-gpio driver unless your system can cope with this limitation.
93 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
96 bool "Broadcom I2C driver"
100 Add support for Broadcom I2C driver.
101 Say yes here to to enable the Broadco I2C driver.
104 bool "Freescale I2C bus driver"
107 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
110 config SYS_I2C_CADENCE
111 tristate "Cadence I2C Controller"
114 Say yes here to select Cadence I2C Host Controller. This controller is
115 e.g. used by Xilinx Zynq.
118 tristate "Cortina-Access I2C Controller"
119 depends on DM_I2C && CORTINA_PLATFORM
122 Add support for the Cortina Access I2C host controller.
123 Say yes here to select Cortina-Access I2C Host Controller.
125 config SYS_I2C_DAVINCI
126 bool "Davinci I2C Controller"
127 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
129 Say yes here to add support for Davinci and Keystone I2C controller
132 bool "Designware I2C Controller"
135 Say yes here to select the Designware I2C Host Controller. This
136 controller is used in various SoCs, e.g. the ST SPEAr, Altera
137 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
139 config SYS_I2C_ASPEED
140 bool "Aspeed I2C Controller"
141 depends on DM_I2C && ARCH_ASPEED
143 Say yes here to select Aspeed I2C Host Controller. The driver
144 supports AST2500 and AST2400 controllers, but is very limited.
145 Only single master mode is supported and only byte-by-byte
146 synchronous reads and writes are supported, no Pool Buffers or DMA.
149 bool "Intel I2C/SMBUS driver"
152 Add support for the Intel SMBUS driver. So far this driver is just
153 a stub which perhaps some basic init. There is no implementation of
154 the I2C API meaning that any I2C operations will immediately fail
157 config SYS_I2C_IMX_LPI2C
158 bool "NXP i.MX LPI2C driver"
160 Add support for the NXP i.MX LPI2C driver.
162 config SYS_I2C_LPC32XX
163 bool "LPC32XX I2C driver"
164 depends on ARCH_LPC32XX
166 Enable support for the LPC32xx I2C driver.
169 bool "Amlogic Meson I2C driver"
170 depends on DM_I2C && ARCH_MESON
172 Add support for the I2C controller available in Amlogic Meson
173 SoCs. The controller supports programmable bus speed including
174 standard (100kbits/s) and fast (400kbit/s) speed and allows the
175 software to define a flexible format of the bit streams. It has an
176 internal buffer holding up to 8 bytes for transfers and supports
177 both 7-bit and 10-bit addresses.
180 bool "NXP MXC I2C driver"
182 Add support for the NXP I2C driver. This supports up to four bus
183 channels and operating on standard mode up to 100 kbits/s and fast
184 mode up to 400 kbits/s.
186 # These settings are not used with DM_I2C, however SPL doesn't use
187 # DM_I2C even if DM_I2C is enabled, and so might use these settings even
188 # when main u-boot does not!
189 if SYS_I2C_MXC && (!DM_I2C || SPL)
190 config SYS_I2C_MXC_I2C1
193 Add support for NXP MXC I2C Controller 1.
194 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
196 config SYS_I2C_MXC_I2C2
199 Add support for NXP MXC I2C Controller 2.
200 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
202 config SYS_I2C_MXC_I2C3
205 Add support for NXP MXC I2C Controller 3.
206 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
208 config SYS_I2C_MXC_I2C4
211 Add support for NXP MXC I2C Controller 4.
212 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
214 config SYS_I2C_MXC_I2C5
217 Add support for NXP MXC I2C Controller 5.
218 Required for SoCs which have I2C MXC controller 5 eg LX2160A
220 config SYS_I2C_MXC_I2C6
223 Add support for NXP MXC I2C Controller 6.
224 Required for SoCs which have I2C MXC controller 6 eg LX2160A
226 config SYS_I2C_MXC_I2C7
229 Add support for NXP MXC I2C Controller 7.
230 Required for SoCs which have I2C MXC controller 7 eg LX2160A
232 config SYS_I2C_MXC_I2C8
235 Add support for NXP MXC I2C Controller 8.
236 Required for SoCs which have I2C MXC controller 8 eg LX2160A
240 config SYS_MXC_I2C1_SPEED
241 int "I2C Channel 1 speed"
242 default 40000000 if TARGET_LS2080A_EMU
245 MXC I2C Channel 1 speed
247 config SYS_MXC_I2C1_SLAVE
255 config SYS_MXC_I2C2_SPEED
256 int "I2C Channel 2 speed"
257 default 40000000 if TARGET_LS2080A_EMU
260 MXC I2C Channel 2 speed
262 config SYS_MXC_I2C2_SLAVE
270 config SYS_MXC_I2C3_SPEED
271 int "I2C Channel 3 speed"
274 MXC I2C Channel 3 speed
276 config SYS_MXC_I2C3_SLAVE
284 config SYS_MXC_I2C4_SPEED
285 int "I2C Channel 4 speed"
288 MXC I2C Channel 4 speed
290 config SYS_MXC_I2C4_SLAVE
298 config SYS_MXC_I2C5_SPEED
299 int "I2C Channel 5 speed"
302 MXC I2C Channel 5 speed
304 config SYS_MXC_I2C5_SLAVE
312 config SYS_MXC_I2C6_SPEED
313 int "I2C Channel 6 speed"
316 MXC I2C Channel 6 speed
318 config SYS_MXC_I2C6_SLAVE
326 config SYS_MXC_I2C7_SPEED
327 int "I2C Channel 7 speed"
330 MXC I2C Channel 7 speed
332 config SYS_MXC_I2C7_SLAVE
340 config SYS_MXC_I2C8_SPEED
341 int "I2C Channel 8 speed"
344 MXC I2C Channel 8 speed
346 config SYS_MXC_I2C8_SLAVE
353 config SYS_I2C_NEXELL
354 bool "Nexell I2C driver"
357 Add support for the Nexell I2C driver. This is used with various
358 Nexell parts such as S5Pxx18 series SoCs. All chips
359 have several I2C ports and all are provided, controlled by the
362 config SYS_I2C_OCORES
363 bool "ocores I2C driver"
366 Add support for ocores I2C controller. For details see
367 https://opencores.org/projects/i2c
369 config SYS_I2C_OMAP24XX
370 bool "TI OMAP2+ I2C driver"
371 depends on ARCH_OMAP2PLUS || ARCH_K3
373 Add support for the OMAP2+ I2C driver.
376 config SYS_OMAP24_I2C_SLAVE
377 int "I2C Slave addr channel 0"
380 OMAP24xx I2C Slave address channel 0
382 config SYS_OMAP24_I2C_SPEED
383 int "I2C Slave channel 0 speed"
386 OMAP24xx Slave speed channel 0
389 config SYS_I2C_RCAR_I2C
390 bool "Renesas RCar I2C driver"
391 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
393 Support for Renesas RCar I2C controller.
395 config SYS_I2C_RCAR_IIC
396 bool "Renesas RCar Gen3 IIC driver"
397 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
399 Support for Renesas RCar Gen3 IIC controller.
401 config SYS_I2C_ROCKCHIP
402 bool "Rockchip I2C driver"
405 Add support for the Rockchip I2C driver. This is used with various
406 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
407 have several I2C ports and all are provided, controlled by the
410 config SYS_I2C_SANDBOX
411 bool "Sandbox I2C driver"
412 depends on SANDBOX && DM_I2C
414 Enable I2C support for sandbox. This is an emulation of a real I2C
415 bus. Devices can be attached to the bus using the device tree
416 which specifies the driver to use. See sandbox.dts as an example.
418 config SYS_I2C_OCTEON
419 bool "Octeon II/III/TX/TX2 I2C driver"
420 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
423 Add support for the Marvell Octeon I2C driver. This is used with
424 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
425 chips have several I2C ports and all are provided, controlled by
428 config SYS_I2C_S3C24X0
429 bool "Samsung I2C driver"
430 depends on ARCH_EXYNOS4 && DM_I2C
432 Support for Samsung I2C controller as Samsung SoCs.
434 config SYS_I2C_STM32F7
435 bool "STMicroelectronics STM32F7 I2C support"
436 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
438 Enable this option to add support for STM32 I2C controller
439 introduced with STM32F7/H7 SoCs. This I2C controller supports :
440 _ Slave and master modes
441 _ Multimaster capability
442 _ Standard-mode (up to 100 kHz)
443 _ Fast-mode (up to 400 kHz)
444 _ Fast-mode Plus (up to 1 MHz)
445 _ 7-bit and 10-bit addressing mode
446 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
447 _ All 7-bit addresses acknowledge mode
449 _ Programmable setup and hold times
450 _ Easy to use event management
451 _ Optional clock stretching
454 config SYS_I2C_SYNQUACER
455 bool "Socionext SynQuacer I2C controller"
456 depends on ARCH_SYNQUACER && DM_I2C
458 Support for Socionext Synquacer I2C controller. This I2C controller
459 will be used for RTC and LS-connector on DeveloperBox.
462 bool "NVIDIA Tegra internal I2C controller"
463 depends on ARCH_TEGRA
465 Support for NVIDIA I2C controller available in Tegra SoCs.
467 config SYS_I2C_UNIPHIER
468 bool "UniPhier I2C driver"
469 depends on ARCH_UNIPHIER && DM_I2C
472 Support for UniPhier I2C controller driver. This I2C controller
473 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
475 config SYS_I2C_UNIPHIER_F
476 bool "UniPhier FIFO-builtin I2C driver"
477 depends on ARCH_UNIPHIER && DM_I2C
480 Support for UniPhier FIFO-builtin I2C controller driver.
481 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
483 config SYS_I2C_VERSATILE
484 bool "Arm Ltd Versatile I2C bus driver"
485 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
487 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
488 controller is present in the development boards manufactured by Arm Ltd.
490 config SYS_I2C_MVTWSI
491 bool "Marvell I2C driver"
494 Support for Marvell I2C controllers as used on the orion5x and
495 kirkwood SoC families.
497 config TEGRA186_BPMP_I2C
498 bool "Enable Tegra186 BPMP-based I2C driver"
499 depends on TEGRA186_BPMP
501 Support for Tegra I2C controllers managed by the BPMP (Boot and
502 Power Management Processor). On Tegra186, some I2C controllers are
503 directly controlled by the main CPU, whereas others are controlled
504 by the BPMP, and can only be accessed by the main CPU via IPC
505 requests to the BPMP. This driver covers the latter case.
507 config SYS_I2C_BUS_MAX
509 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
511 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
512 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
513 default 5 if OMAP54XX
515 Define the maximum number of available I2C buses.
517 config SYS_I2C_XILINX_XIIC
518 bool "Xilinx AXI I2C driver"
521 Support for Xilinx AXI I2C controller.
524 bool "gdsys IHS I2C driver"
527 Support for gdsys IHS I2C driver on FPGA bus.
529 source "drivers/i2c/muxes/Kconfig"