2 # I2C subsystem configuration
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
15 So at present there is no need to ever disable this option.
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
30 bool "Enable Driver Model for I2C drivers"
33 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
36 device (bus child) info is kept as parent plat. The interface
37 is defined in include/i2c.h.
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
51 bool "Enable legacy I2C subsystem and drivers"
54 Enable the legacy I2C subsystem and drivers. While this is
55 deprecated in U-Boot itself, this can be useful in some situations
58 config SPL_SYS_I2C_LEGACY
59 bool "Enable legacy I2C subsystem and drivers in SPL"
60 depends on SUPPORT_SPL && !SPL_DM_I2C
62 Enable the legacy I2C subsystem and drivers in SPL. This is useful
63 in some size constrained situations.
65 config TPL_SYS_I2C_LEGACY
66 bool "Enable legacy I2C subsystem and drivers in TPL"
67 depends on SUPPORT_TPL && !SPL_DM_I2C
69 Enable the legacy I2C subsystem and drivers in TPL. This is useful
70 in some size constrained situations.
72 config SYS_I2C_EARLY_INIT
73 bool "Enable legacy I2C subsystem early in boot"
74 depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
76 Add the function prototype for i2c_early_init_f which is called in
79 config I2C_CROS_EC_TUNNEL
80 tristate "Chrome OS EC tunnel I2C bus"
83 This provides an I2C bus that will tunnel i2c commands through to
84 the other side of the Chrome OS EC to the I2C bus connected there.
85 This will work whatever the interface used to talk to the EC (SPI,
86 I2C or LPC). Some Chromebooks use this when the hardware design
87 does not allow direct access to the main PMIC from the AP.
89 config I2C_CROS_EC_LDO
90 bool "Provide access to LDOs on the Chrome OS EC"
93 On many Chromebooks the main PMIC is inaccessible to the AP. This is
94 often dealt with by using an I2C pass-through interface provided by
95 the EC. On some unfortunate models (e.g. Spring) the pass-through
96 is not available, and an LDO message is available instead. This
97 option enables a driver which provides very basic access to those
98 regulators, via the EC. We implement this as an I2C bus which
99 emulates just the TPS65090 messages we know about. This is done to
100 avoid duplicating the logic in the TPS65090 regulator driver for
101 enabling/disabling an LDO.
103 config I2C_SET_DEFAULT_BUS_NUM
104 bool "Set default I2C bus number"
107 Set default number of I2C bus to be accessed. This option provides
108 behaviour similar to old (i.e. pre DM) I2C bus driver.
110 config I2C_DEFAULT_BUS_NUMBER
111 hex "I2C default bus number"
112 depends on I2C_SET_DEFAULT_BUS_NUM
115 Number of default I2C bus to use
118 bool "Enable Driver Model for software emulated I2C bus driver"
119 depends on DM_I2C && DM_GPIO
121 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
122 configuration is given by the device tree. Kernel-style device tree
123 bindings are supported.
124 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
126 config SPL_DM_I2C_GPIO
127 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
128 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
131 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
132 configuration is given by the device tree. Kernel-style device tree
133 bindings are supported.
134 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
137 bool "Atmel I2C driver"
138 depends on DM_I2C && ARCH_AT91
140 Add support for the Atmel I2C driver. A serious problem is that there
141 is no documented way to issue repeated START conditions for more than
142 two messages, as needed to support combined I2C messages. Use the
143 i2c-gpio driver unless your system can cope with this limitation.
144 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
147 bool "Broadcom I2C driver"
151 Add support for Broadcom I2C driver.
152 Say yes here to to enable the Broadco I2C driver.
155 bool "Freescale I2C bus driver"
157 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
160 if SYS_I2C_FSL && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
161 config SYS_FSL_I2C_OFFSET
162 hex "Offset from the IMMR of the address of the first I2C controller"
164 config SYS_FSL_HAS_I2C2_OFFSET
165 bool "Support a second I2C controller"
167 config SYS_FSL_I2C2_OFFSET
168 hex "Offset from the IMMR of the address of the second I2C controller"
169 depends on SYS_FSL_HAS_I2C2_OFFSET
171 config SYS_FSL_HAS_I2C3_OFFSET
172 bool "Support a third I2C controller"
174 config SYS_FSL_I2C3_OFFSET
175 hex "Offset from the IMMR of the address of the third I2C controller"
176 depends on SYS_FSL_HAS_I2C3_OFFSET
178 config SYS_FSL_HAS_I2C4_OFFSET
179 bool "Support a fourth I2C controller"
181 config SYS_FSL_I2C4_OFFSET
182 hex "Offset from the IMMR of the address of the fourth I2C controller"
183 depends on SYS_FSL_HAS_I2C4_OFFSET
186 config SYS_I2C_CADENCE
187 tristate "Cadence I2C Controller"
190 Say yes here to select Cadence I2C Host Controller. This controller is
191 e.g. used by Xilinx Zynq.
194 tristate "Cortina-Access I2C Controller"
195 depends on DM_I2C && CORTINA_PLATFORM
197 Add support for the Cortina Access I2C host controller.
198 Say yes here to select Cortina-Access I2C Host Controller.
200 config SYS_I2C_DAVINCI
201 bool "Davinci I2C Controller"
202 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
204 Say yes here to add support for Davinci and Keystone I2C controller
207 bool "Designware I2C Controller"
209 Say yes here to select the Designware I2C Host Controller. This
210 controller is used in various SoCs, e.g. the ST SPEAr, Altera
211 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
213 config SYS_I2C_ASPEED
214 bool "Aspeed I2C Controller"
215 depends on DM_I2C && ARCH_ASPEED
217 Say yes here to select Aspeed I2C Host Controller. The driver
218 supports AST2500 and AST2400 controllers, but is very limited.
219 Only single master mode is supported and only byte-by-byte
220 synchronous reads and writes are supported, no Pool Buffers or DMA.
223 bool "Intel I2C/SMBUS driver"
226 Add support for the Intel SMBUS driver. So far this driver is just
227 a stub which perhaps some basic init. There is no implementation of
228 the I2C API meaning that any I2C operations will immediately fail
231 config SYS_I2C_IMX_LPI2C
232 bool "NXP i.MX LPI2C driver"
234 Add support for the NXP i.MX LPI2C driver.
236 config SYS_I2C_LPC32XX
237 bool "LPC32XX I2C driver"
238 depends on ARCH_LPC32XX
240 Enable support for the LPC32xx I2C driver.
243 bool "Amlogic Meson I2C driver"
244 depends on DM_I2C && ARCH_MESON
246 Add support for the I2C controller available in Amlogic Meson
247 SoCs. The controller supports programmable bus speed including
248 standard (100kbits/s) and fast (400kbit/s) speed and allows the
249 software to define a flexible format of the bit streams. It has an
250 internal buffer holding up to 8 bytes for transfers and supports
251 both 7-bit and 10-bit addresses.
254 bool "NXP MXC I2C driver"
256 Add support for the NXP I2C driver. This supports up to four bus
257 channels and operating on standard mode up to 100 kbits/s and fast
258 mode up to 400 kbits/s.
260 if SYS_I2C_MXC && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
261 config SYS_I2C_MXC_I2C1
264 Add support for NXP MXC I2C Controller 1.
265 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
267 config SYS_I2C_MXC_I2C2
270 Add support for NXP MXC I2C Controller 2.
271 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
273 config SYS_I2C_MXC_I2C3
276 Add support for NXP MXC I2C Controller 3.
277 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
279 config SYS_I2C_MXC_I2C4
282 Add support for NXP MXC I2C Controller 4.
283 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
285 config SYS_I2C_MXC_I2C5
288 Add support for NXP MXC I2C Controller 5.
289 Required for SoCs which have I2C MXC controller 5 eg LX2160A
291 config SYS_I2C_MXC_I2C6
294 Add support for NXP MXC I2C Controller 6.
295 Required for SoCs which have I2C MXC controller 6 eg LX2160A
297 config SYS_I2C_MXC_I2C7
300 Add support for NXP MXC I2C Controller 7.
301 Required for SoCs which have I2C MXC controller 7 eg LX2160A
303 config SYS_I2C_MXC_I2C8
306 Add support for NXP MXC I2C Controller 8.
307 Required for SoCs which have I2C MXC controller 8 eg LX2160A
311 config SYS_MXC_I2C1_SPEED
312 int "I2C Channel 1 speed"
313 default 40000000 if TARGET_LS2080A_EMU
316 MXC I2C Channel 1 speed
318 config SYS_MXC_I2C1_SLAVE
326 config SYS_MXC_I2C2_SPEED
327 int "I2C Channel 2 speed"
328 default 40000000 if TARGET_LS2080A_EMU
331 MXC I2C Channel 2 speed
333 config SYS_MXC_I2C2_SLAVE
341 config SYS_MXC_I2C3_SPEED
342 int "I2C Channel 3 speed"
345 MXC I2C Channel 3 speed
347 config SYS_MXC_I2C3_SLAVE
355 config SYS_MXC_I2C4_SPEED
356 int "I2C Channel 4 speed"
359 MXC I2C Channel 4 speed
361 config SYS_MXC_I2C4_SLAVE
369 config SYS_MXC_I2C5_SPEED
370 int "I2C Channel 5 speed"
373 MXC I2C Channel 5 speed
375 config SYS_MXC_I2C5_SLAVE
383 config SYS_MXC_I2C6_SPEED
384 int "I2C Channel 6 speed"
387 MXC I2C Channel 6 speed
389 config SYS_MXC_I2C6_SLAVE
397 config SYS_MXC_I2C7_SPEED
398 int "I2C Channel 7 speed"
401 MXC I2C Channel 7 speed
403 config SYS_MXC_I2C7_SLAVE
411 config SYS_MXC_I2C8_SPEED
412 int "I2C Channel 8 speed"
415 MXC I2C Channel 8 speed
417 config SYS_MXC_I2C8_SLAVE
424 config SYS_I2C_NEXELL
425 bool "Nexell I2C driver"
428 Add support for the Nexell I2C driver. This is used with various
429 Nexell parts such as S5Pxx18 series SoCs. All chips
430 have several I2C ports and all are provided, controlled by the
433 config SYS_I2C_OCORES
434 bool "ocores I2C driver"
437 Add support for ocores I2C controller. For details see
438 https://opencores.org/projects/i2c
440 config SYS_I2C_OMAP24XX
441 bool "TI OMAP2+ I2C driver"
442 depends on ARCH_OMAP2PLUS || ARCH_K3
444 Add support for the OMAP2+ I2C driver.
446 config SYS_I2C_RCAR_I2C
447 bool "Renesas RCar I2C driver"
448 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
450 Support for Renesas RCar I2C controller.
452 config SYS_I2C_RCAR_IIC
453 bool "Renesas RCar Gen3 IIC driver"
454 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
456 Support for Renesas RCar Gen3 IIC controller.
458 config SYS_I2C_ROCKCHIP
459 bool "Rockchip I2C driver"
462 Add support for the Rockchip I2C driver. This is used with various
463 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
464 have several I2C ports and all are provided, controlled by the
467 config SYS_I2C_SANDBOX
468 bool "Sandbox I2C driver"
469 depends on SANDBOX && DM_I2C
471 Enable I2C support for sandbox. This is an emulation of a real I2C
472 bus. Devices can be attached to the bus using the device tree
473 which specifies the driver to use. See sandbox.dts as an example.
476 bool "Legacy SuperH I2C interface"
477 depends on ARCH_RMOBILE && SYS_I2C_LEGACY
479 Enable the legacy SuperH I2C interface.
482 config SYS_I2C_SH_NUM_CONTROLLERS
486 config SYS_I2C_SH_BASE0
490 config SYS_I2C_SH_BASE1
494 config SYS_I2C_SH_BASE2
498 config SYS_I2C_SH_BASE3
502 config SYS_I2C_SH_BASE4
510 config SH_I2C_DATA_HIGH
514 config SH_I2C_DATA_LOW
524 bool "Legacy software I2C interface"
526 Enable the legacy software defined I2C interface
528 config SYS_I2C_SOFT_SPEED
529 int "Software I2C bus speed"
530 depends on SYS_I2C_SOFT
533 Speed of the software I2C bus
535 config SYS_I2C_SOFT_SLAVE
536 hex "Software I2C slave address"
537 depends on SYS_I2C_SOFT
540 Slave address of the software I2C bus
542 config SYS_I2C_OCTEON
543 bool "Octeon II/III/TX/TX2 I2C driver"
544 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
547 Add support for the Marvell Octeon I2C driver. This is used with
548 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
549 chips have several I2C ports and all are provided, controlled by
552 config SYS_I2C_S3C24X0
553 bool "Samsung I2C driver"
554 depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
556 Support for Samsung I2C controller as Samsung SoCs.
558 config SYS_I2C_STM32F7
559 bool "STMicroelectronics STM32F7 I2C support"
560 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
562 Enable this option to add support for STM32 I2C controller
563 introduced with STM32F7/H7 SoCs. This I2C controller supports :
564 _ Slave and master modes
565 _ Multimaster capability
566 _ Standard-mode (up to 100 kHz)
567 _ Fast-mode (up to 400 kHz)
568 _ Fast-mode Plus (up to 1 MHz)
569 _ 7-bit and 10-bit addressing mode
570 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
571 _ All 7-bit addresses acknowledge mode
573 _ Programmable setup and hold times
574 _ Easy to use event management
575 _ Optional clock stretching
578 config SYS_I2C_SUN6I_P2WI
579 bool "Allwinner sun6i P2WI controller"
580 depends on ARCH_SUNXI
582 Support for the P2WI (Push/Pull 2 Wire Interface) controller embedded
583 in the Allwinner A31 and A31s SOCs. This interface is used to connect
584 to specific devices like the X-Powers AXP221 PMIC.
586 config SYS_I2C_SUN8I_RSB
587 bool "Allwinner sun8i Reduced Serial Bus controller"
588 depends on ARCH_SUNXI
590 Support for Allwinner's Reduced Serial Bus (RSB) controller. This
591 controller is responsible for communicating with various RSB based
592 devices, such as X-Powers AXPxxx PMICs and AC100/AC200 CODEC ICs.
594 config SYS_I2C_SYNQUACER
595 bool "Socionext SynQuacer I2C controller"
596 depends on ARCH_SYNQUACER && DM_I2C
598 Support for Socionext Synquacer I2C controller. This I2C controller
599 will be used for RTC and LS-connector on DeveloperBox.
602 bool "NVIDIA Tegra internal I2C controller"
603 depends on ARCH_TEGRA
605 Support for NVIDIA I2C controller available in Tegra SoCs.
607 config SYS_I2C_UNIPHIER
608 bool "UniPhier I2C driver"
609 depends on ARCH_UNIPHIER && DM_I2C
612 Support for UniPhier I2C controller driver. This I2C controller
613 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
615 config SYS_I2C_UNIPHIER_F
616 bool "UniPhier FIFO-builtin I2C driver"
617 depends on ARCH_UNIPHIER && DM_I2C
620 Support for UniPhier FIFO-builtin I2C controller driver.
621 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
623 config SYS_I2C_VERSATILE
624 bool "Arm Ltd Versatile I2C bus driver"
625 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
627 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
628 controller is present in the development boards manufactured by Arm Ltd.
630 config SYS_I2C_MVTWSI
631 bool "Marvell I2C driver"
633 Support for Marvell I2C controllers as used on the orion5x and
634 kirkwood SoC families.
636 config TEGRA186_BPMP_I2C
637 bool "Enable Tegra186 BPMP-based I2C driver"
638 depends on TEGRA186_BPMP
640 Support for Tegra I2C controllers managed by the BPMP (Boot and
641 Power Management Processor). On Tegra186, some I2C controllers are
642 directly controlled by the main CPU, whereas others are controlled
643 by the BPMP, and can only be accessed by the main CPU via IPC
644 requests to the BPMP. This driver covers the latter case.
647 hex "I2C Slave address channel (all buses)"
648 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
651 I2C Slave address channel 0 for all buses in the legacy drivers.
652 Many boards/controllers/drivers don't support an I2C slave
653 interface so provide a default slave address for them for use in
654 common code. A real value for CONFIG_SYS_I2C_SLAVE should be
655 defined for any board which does support a slave interface and
656 this default used otherwise.
659 int "I2C Slave channel 0 speed (all buses)"
660 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
663 I2C Slave speed channel 0 for all buses in the legacy drivers.
665 config SYS_I2C_BUS_MAX
667 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
669 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
670 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
671 default 5 if OMAP54XX
673 Define the maximum number of available I2C buses.
675 config SYS_I2C_XILINX_XIIC
676 bool "Xilinx AXI I2C driver"
679 Support for Xilinx AXI I2C controller.
682 bool "gdsys IHS I2C driver"
685 Support for gdsys IHS I2C driver on FPGA bus.
687 source "drivers/i2c/muxes/Kconfig"