2 # I2C subsystem configuration
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
15 So at present there is no need to ever disable this option.
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
30 bool "Enable Driver Model for I2C drivers"
33 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
36 device (bus child) info is kept as parent plat. The interface
37 is defined in include/i2c.h.
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
51 bool "Enable legacy I2C subsystem and drivers"
54 Enable the legacy I2C subsystem and drivers. While this is
55 deprecated in U-Boot itself, this can be useful in some situations
58 config SPL_SYS_I2C_LEGACY
59 bool "Enable legacy I2C subsystem and drivers in SPL"
60 depends on SUPPORT_SPL && !SPL_DM_I2C
62 Enable the legacy I2C subsystem and drivers in SPL. This is useful
63 in some size constrained situations.
65 config TPL_SYS_I2C_LEGACY
66 bool "Enable legacy I2C subsystem and drivers in TPL"
67 depends on SUPPORT_TPL && !SPL_DM_I2C
69 Enable the legacy I2C subsystem and drivers in TPL. This is useful
70 in some size constrained situations.
72 config SYS_I2C_EARLY_INIT
73 bool "Enable legacy I2C subsystem early in boot"
74 depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
76 Add the function prototype for i2c_early_init_f which is called in
79 config I2C_CROS_EC_TUNNEL
80 tristate "Chrome OS EC tunnel I2C bus"
83 This provides an I2C bus that will tunnel i2c commands through to
84 the other side of the Chrome OS EC to the I2C bus connected there.
85 This will work whatever the interface used to talk to the EC (SPI,
86 I2C or LPC). Some Chromebooks use this when the hardware design
87 does not allow direct access to the main PMIC from the AP.
89 config I2C_CROS_EC_LDO
90 bool "Provide access to LDOs on the Chrome OS EC"
93 On many Chromebooks the main PMIC is inaccessible to the AP. This is
94 often dealt with by using an I2C pass-through interface provided by
95 the EC. On some unfortunate models (e.g. Spring) the pass-through
96 is not available, and an LDO message is available instead. This
97 option enables a driver which provides very basic access to those
98 regulators, via the EC. We implement this as an I2C bus which
99 emulates just the TPS65090 messages we know about. This is done to
100 avoid duplicating the logic in the TPS65090 regulator driver for
101 enabling/disabling an LDO.
103 config I2C_SET_DEFAULT_BUS_NUM
104 bool "Set default I2C bus number"
107 Set default number of I2C bus to be accessed. This option provides
108 behaviour similar to old (i.e. pre DM) I2C bus driver.
110 config I2C_DEFAULT_BUS_NUMBER
111 hex "I2C default bus number"
112 depends on I2C_SET_DEFAULT_BUS_NUM
115 Number of default I2C bus to use
118 bool "Enable Driver Model for software emulated I2C bus driver"
119 depends on DM_I2C && DM_GPIO
121 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
122 configuration is given by the device tree. Kernel-style device tree
123 bindings are supported.
124 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
126 config SPL_DM_I2C_GPIO
127 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
128 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
131 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
132 configuration is given by the device tree. Kernel-style device tree
133 bindings are supported.
134 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
137 bool "Atmel I2C driver"
138 depends on DM_I2C && ARCH_AT91
140 Add support for the Atmel I2C driver. A serious problem is that there
141 is no documented way to issue repeated START conditions for more than
142 two messages, as needed to support combined I2C messages. Use the
143 i2c-gpio driver unless your system can cope with this limitation.
144 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
147 bool "Broadcom I2C driver"
151 Add support for Broadcom I2C driver.
152 Say yes here to to enable the Broadco I2C driver.
155 bool "Freescale I2C bus driver"
158 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
161 config SYS_I2C_CADENCE
162 tristate "Cadence I2C Controller"
165 Say yes here to select Cadence I2C Host Controller. This controller is
166 e.g. used by Xilinx Zynq.
169 tristate "Cortina-Access I2C Controller"
170 depends on DM_I2C && CORTINA_PLATFORM
173 Add support for the Cortina Access I2C host controller.
174 Say yes here to select Cortina-Access I2C Host Controller.
176 config SYS_I2C_DAVINCI
177 bool "Davinci I2C Controller"
178 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
180 Say yes here to add support for Davinci and Keystone I2C controller
183 bool "Designware I2C Controller"
186 Say yes here to select the Designware I2C Host Controller. This
187 controller is used in various SoCs, e.g. the ST SPEAr, Altera
188 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
190 config SYS_I2C_ASPEED
191 bool "Aspeed I2C Controller"
192 depends on DM_I2C && ARCH_ASPEED
194 Say yes here to select Aspeed I2C Host Controller. The driver
195 supports AST2500 and AST2400 controllers, but is very limited.
196 Only single master mode is supported and only byte-by-byte
197 synchronous reads and writes are supported, no Pool Buffers or DMA.
200 bool "Intel I2C/SMBUS driver"
203 Add support for the Intel SMBUS driver. So far this driver is just
204 a stub which perhaps some basic init. There is no implementation of
205 the I2C API meaning that any I2C operations will immediately fail
208 config SYS_I2C_IMX_LPI2C
209 bool "NXP i.MX LPI2C driver"
211 Add support for the NXP i.MX LPI2C driver.
213 config SYS_I2C_LPC32XX
214 bool "LPC32XX I2C driver"
215 depends on ARCH_LPC32XX
217 Enable support for the LPC32xx I2C driver.
220 bool "Amlogic Meson I2C driver"
221 depends on DM_I2C && ARCH_MESON
223 Add support for the I2C controller available in Amlogic Meson
224 SoCs. The controller supports programmable bus speed including
225 standard (100kbits/s) and fast (400kbit/s) speed and allows the
226 software to define a flexible format of the bit streams. It has an
227 internal buffer holding up to 8 bytes for transfers and supports
228 both 7-bit and 10-bit addresses.
231 bool "NXP MXC I2C driver"
233 Add support for the NXP I2C driver. This supports up to four bus
234 channels and operating on standard mode up to 100 kbits/s and fast
235 mode up to 400 kbits/s.
237 # These settings are not used with DM_I2C, however SPL doesn't use
238 # DM_I2C even if DM_I2C is enabled, and so might use these settings even
239 # when main u-boot does not!
240 if SYS_I2C_MXC && (!DM_I2C || SPL)
241 config SYS_I2C_MXC_I2C1
244 Add support for NXP MXC I2C Controller 1.
245 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
247 config SYS_I2C_MXC_I2C2
250 Add support for NXP MXC I2C Controller 2.
251 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
253 config SYS_I2C_MXC_I2C3
256 Add support for NXP MXC I2C Controller 3.
257 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
259 config SYS_I2C_MXC_I2C4
262 Add support for NXP MXC I2C Controller 4.
263 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
265 config SYS_I2C_MXC_I2C5
268 Add support for NXP MXC I2C Controller 5.
269 Required for SoCs which have I2C MXC controller 5 eg LX2160A
271 config SYS_I2C_MXC_I2C6
274 Add support for NXP MXC I2C Controller 6.
275 Required for SoCs which have I2C MXC controller 6 eg LX2160A
277 config SYS_I2C_MXC_I2C7
280 Add support for NXP MXC I2C Controller 7.
281 Required for SoCs which have I2C MXC controller 7 eg LX2160A
283 config SYS_I2C_MXC_I2C8
286 Add support for NXP MXC I2C Controller 8.
287 Required for SoCs which have I2C MXC controller 8 eg LX2160A
291 config SYS_MXC_I2C1_SPEED
292 int "I2C Channel 1 speed"
293 default 40000000 if TARGET_LS2080A_EMU
296 MXC I2C Channel 1 speed
298 config SYS_MXC_I2C1_SLAVE
306 config SYS_MXC_I2C2_SPEED
307 int "I2C Channel 2 speed"
308 default 40000000 if TARGET_LS2080A_EMU
311 MXC I2C Channel 2 speed
313 config SYS_MXC_I2C2_SLAVE
321 config SYS_MXC_I2C3_SPEED
322 int "I2C Channel 3 speed"
325 MXC I2C Channel 3 speed
327 config SYS_MXC_I2C3_SLAVE
335 config SYS_MXC_I2C4_SPEED
336 int "I2C Channel 4 speed"
339 MXC I2C Channel 4 speed
341 config SYS_MXC_I2C4_SLAVE
349 config SYS_MXC_I2C5_SPEED
350 int "I2C Channel 5 speed"
353 MXC I2C Channel 5 speed
355 config SYS_MXC_I2C5_SLAVE
363 config SYS_MXC_I2C6_SPEED
364 int "I2C Channel 6 speed"
367 MXC I2C Channel 6 speed
369 config SYS_MXC_I2C6_SLAVE
377 config SYS_MXC_I2C7_SPEED
378 int "I2C Channel 7 speed"
381 MXC I2C Channel 7 speed
383 config SYS_MXC_I2C7_SLAVE
391 config SYS_MXC_I2C8_SPEED
392 int "I2C Channel 8 speed"
395 MXC I2C Channel 8 speed
397 config SYS_MXC_I2C8_SLAVE
404 config SYS_I2C_NEXELL
405 bool "Nexell I2C driver"
408 Add support for the Nexell I2C driver. This is used with various
409 Nexell parts such as S5Pxx18 series SoCs. All chips
410 have several I2C ports and all are provided, controlled by the
413 config SYS_I2C_OCORES
414 bool "ocores I2C driver"
417 Add support for ocores I2C controller. For details see
418 https://opencores.org/projects/i2c
420 config SYS_I2C_OMAP24XX
421 bool "TI OMAP2+ I2C driver"
422 depends on ARCH_OMAP2PLUS || ARCH_K3
424 Add support for the OMAP2+ I2C driver.
428 int "I2C Slave addr channel 0"
431 OMAP24xx I2C Slave address channel 0
434 int "I2C Slave channel 0 speed"
437 OMAP24xx Slave speed channel 0
440 config SYS_I2C_RCAR_I2C
441 bool "Renesas RCar I2C driver"
442 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
444 Support for Renesas RCar I2C controller.
446 config SYS_I2C_RCAR_IIC
447 bool "Renesas RCar Gen3 IIC driver"
448 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
450 Support for Renesas RCar Gen3 IIC controller.
452 config SYS_I2C_ROCKCHIP
453 bool "Rockchip I2C driver"
456 Add support for the Rockchip I2C driver. This is used with various
457 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
458 have several I2C ports and all are provided, controlled by the
461 config SYS_I2C_SANDBOX
462 bool "Sandbox I2C driver"
463 depends on SANDBOX && DM_I2C
465 Enable I2C support for sandbox. This is an emulation of a real I2C
466 bus. Devices can be attached to the bus using the device tree
467 which specifies the driver to use. See sandbox.dts as an example.
470 bool "Legacy software I2C interface"
472 Enable the legacy software defined I2C interface
474 config SYS_I2C_SOFT_SPEED
475 int "Software I2C bus speed"
476 depends on SYS_I2C_SOFT
479 Speed of the software I2C bus
481 config SYS_I2C_SOFT_SLAVE
482 hex "Software I2C slave address"
483 depends on SYS_I2C_SOFT
486 Slave address of the software I2C bus
488 config SYS_I2C_OCTEON
489 bool "Octeon II/III/TX/TX2 I2C driver"
490 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
493 Add support for the Marvell Octeon I2C driver. This is used with
494 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
495 chips have several I2C ports and all are provided, controlled by
498 config SYS_I2C_S3C24X0
499 bool "Samsung I2C driver"
500 depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
502 Support for Samsung I2C controller as Samsung SoCs.
504 config SYS_I2C_STM32F7
505 bool "STMicroelectronics STM32F7 I2C support"
506 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
508 Enable this option to add support for STM32 I2C controller
509 introduced with STM32F7/H7 SoCs. This I2C controller supports :
510 _ Slave and master modes
511 _ Multimaster capability
512 _ Standard-mode (up to 100 kHz)
513 _ Fast-mode (up to 400 kHz)
514 _ Fast-mode Plus (up to 1 MHz)
515 _ 7-bit and 10-bit addressing mode
516 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
517 _ All 7-bit addresses acknowledge mode
519 _ Programmable setup and hold times
520 _ Easy to use event management
521 _ Optional clock stretching
524 config SYS_I2C_SYNQUACER
525 bool "Socionext SynQuacer I2C controller"
526 depends on ARCH_SYNQUACER && DM_I2C
528 Support for Socionext Synquacer I2C controller. This I2C controller
529 will be used for RTC and LS-connector on DeveloperBox.
532 bool "NVIDIA Tegra internal I2C controller"
533 depends on ARCH_TEGRA
535 Support for NVIDIA I2C controller available in Tegra SoCs.
537 config SYS_I2C_UNIPHIER
538 bool "UniPhier I2C driver"
539 depends on ARCH_UNIPHIER && DM_I2C
542 Support for UniPhier I2C controller driver. This I2C controller
543 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
545 config SYS_I2C_UNIPHIER_F
546 bool "UniPhier FIFO-builtin I2C driver"
547 depends on ARCH_UNIPHIER && DM_I2C
550 Support for UniPhier FIFO-builtin I2C controller driver.
551 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
553 config SYS_I2C_VERSATILE
554 bool "Arm Ltd Versatile I2C bus driver"
555 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
557 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
558 controller is present in the development boards manufactured by Arm Ltd.
560 config SYS_I2C_MVTWSI
561 bool "Marvell I2C driver"
563 Support for Marvell I2C controllers as used on the orion5x and
564 kirkwood SoC families.
566 config TEGRA186_BPMP_I2C
567 bool "Enable Tegra186 BPMP-based I2C driver"
568 depends on TEGRA186_BPMP
570 Support for Tegra I2C controllers managed by the BPMP (Boot and
571 Power Management Processor). On Tegra186, some I2C controllers are
572 directly controlled by the main CPU, whereas others are controlled
573 by the BPMP, and can only be accessed by the main CPU via IPC
574 requests to the BPMP. This driver covers the latter case.
576 config SYS_I2C_BUS_MAX
578 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
580 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
581 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
582 default 5 if OMAP54XX
584 Define the maximum number of available I2C buses.
586 config SYS_I2C_XILINX_XIIC
587 bool "Xilinx AXI I2C driver"
590 Support for Xilinx AXI I2C controller.
593 bool "gdsys IHS I2C driver"
596 Support for gdsys IHS I2C driver on FPGA bus.
598 source "drivers/i2c/muxes/Kconfig"