1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
7 #include <linux/coresight.h>
8 #include <linux/coresight-pmu.h>
9 #include <linux/cpumask.h>
10 #include <linux/device.h>
11 #include <linux/list.h>
13 #include <linux/init.h>
14 #include <linux/perf_event.h>
15 #include <linux/percpu-defs.h>
16 #include <linux/slab.h>
17 #include <linux/stringhash.h>
18 #include <linux/types.h>
19 #include <linux/workqueue.h>
21 #include "coresight-config.h"
22 #include "coresight-etm-perf.h"
23 #include "coresight-priv.h"
24 #include "coresight-syscfg.h"
26 static struct pmu etm_pmu;
27 static bool etm_perf_up;
30 * An ETM context for a running event includes the perf aux handle
31 * and aux_data. For ETM, the aux_data (etm_event_data), consists of
32 * the trace path and the sink configuration. The event data is accessible
33 * via perf_get_aux(handle). However, a sink could "end" a perf output
34 * handle via the IRQ handler. And if the "sink" encounters a failure
35 * to "begin" another session (e.g due to lack of space in the buffer),
36 * the handle will be cleared. Thus, the event_data may not be accessible
37 * from the handle when we get to the etm_event_stop(), which is required
38 * for stopping the trace path. The event_data is guaranteed to stay alive
39 * until "free_aux()", which cannot happen as long as the event is active on
40 * the ETM. Thus the event_data for the session must be part of the ETM context
41 * to make sure we can disable the trace path.
44 struct perf_output_handle handle;
45 struct etm_event_data *event_data;
48 static DEFINE_PER_CPU(struct etm_ctxt, etm_ctxt);
49 static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
52 * The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config';
53 * now take them as general formats and apply on all ETMs.
55 PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
56 /* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
57 PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID));
58 /* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */
59 PMU_FORMAT_ATTR(contextid2, "config:" __stringify(ETM_OPT_CTXTID2));
60 PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
61 PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
62 /* preset - if sink ID is used as a configuration selector */
63 PMU_FORMAT_ATTR(preset, "config:0-3");
64 /* Sink ID - same for all ETMs */
65 PMU_FORMAT_ATTR(sinkid, "config2:0-31");
66 /* config ID - set if a system configuration is selected */
67 PMU_FORMAT_ATTR(configid, "config2:32-63");
71 * contextid always traces the "PID". The PID is in CONTEXTIDR_EL1
72 * when the kernel is running at EL1; when the kernel is at EL2,
73 * the PID is in CONTEXTIDR_EL2.
75 static ssize_t format_attr_contextid_show(struct device *dev,
76 struct device_attribute *attr,
79 int pid_fmt = ETM_OPT_CTXTID;
81 #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X)
82 pid_fmt = is_kernel_in_hyp_mode() ? ETM_OPT_CTXTID2 : ETM_OPT_CTXTID;
84 return sprintf(page, "config:%d\n", pid_fmt);
87 static struct device_attribute format_attr_contextid =
88 __ATTR(contextid, 0444, format_attr_contextid_show, NULL);
90 static struct attribute *etm_config_formats_attr[] = {
91 &format_attr_cycacc.attr,
92 &format_attr_contextid.attr,
93 &format_attr_contextid1.attr,
94 &format_attr_contextid2.attr,
95 &format_attr_timestamp.attr,
96 &format_attr_retstack.attr,
97 &format_attr_sinkid.attr,
98 &format_attr_preset.attr,
99 &format_attr_configid.attr,
103 static const struct attribute_group etm_pmu_format_group = {
105 .attrs = etm_config_formats_attr,
108 static struct attribute *etm_config_sinks_attr[] = {
112 static const struct attribute_group etm_pmu_sinks_group = {
114 .attrs = etm_config_sinks_attr,
117 static struct attribute *etm_config_events_attr[] = {
121 static const struct attribute_group etm_pmu_events_group = {
123 .attrs = etm_config_events_attr,
126 static const struct attribute_group *etm_pmu_attr_groups[] = {
127 &etm_pmu_format_group,
128 &etm_pmu_sinks_group,
129 &etm_pmu_events_group,
133 static inline struct list_head **
134 etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
136 return per_cpu_ptr(data->path, cpu);
139 static inline struct list_head *
140 etm_event_cpu_path(struct etm_event_data *data, int cpu)
142 return *etm_event_cpu_path_ptr(data, cpu);
145 static void etm_event_read(struct perf_event *event) {}
147 static int etm_addr_filters_alloc(struct perf_event *event)
149 struct etm_filters *filters;
150 int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
152 filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
157 memcpy(filters, event->parent->hw.addr_filters,
160 event->hw.addr_filters = filters;
165 static void etm_event_destroy(struct perf_event *event)
167 kfree(event->hw.addr_filters);
168 event->hw.addr_filters = NULL;
171 static int etm_event_init(struct perf_event *event)
175 if (event->attr.type != etm_pmu.type) {
180 ret = etm_addr_filters_alloc(event);
184 event->destroy = etm_event_destroy;
189 static void free_sink_buffer(struct etm_event_data *event_data)
192 cpumask_t *mask = &event_data->mask;
193 struct coresight_device *sink;
195 if (!event_data->snk_config)
198 if (WARN_ON(cpumask_empty(mask)))
201 cpu = cpumask_first(mask);
202 sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
203 sink_ops(sink)->free_buffer(event_data->snk_config);
206 static void free_event_data(struct work_struct *work)
210 struct etm_event_data *event_data;
212 event_data = container_of(work, struct etm_event_data, work);
213 mask = &event_data->mask;
215 /* Free the sink buffers, if there are any */
216 free_sink_buffer(event_data);
218 /* clear any configuration we were using */
219 if (event_data->cfg_hash)
220 cscfg_deactivate_config(event_data->cfg_hash);
222 for_each_cpu(cpu, mask) {
223 struct list_head **ppath;
225 ppath = etm_event_cpu_path_ptr(event_data, cpu);
226 if (!(IS_ERR_OR_NULL(*ppath)))
227 coresight_release_path(*ppath);
231 free_percpu(event_data->path);
235 static void *alloc_event_data(int cpu)
238 struct etm_event_data *event_data;
240 /* First get memory for the session's data */
241 event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
246 mask = &event_data->mask;
248 cpumask_set_cpu(cpu, mask);
250 cpumask_copy(mask, cpu_present_mask);
253 * Each CPU has a single path between source and destination. As such
254 * allocate an array using CPU numbers as indexes. That way a path
255 * for any CPU can easily be accessed at any given time. We proceed
256 * the same way for sessions involving a single CPU. The cost of
257 * unused memory when dealing with single CPU trace scenarios is small
258 * compared to the cost of searching through an optimized array.
260 event_data->path = alloc_percpu(struct list_head *);
262 if (!event_data->path) {
270 static void etm_free_aux(void *data)
272 struct etm_event_data *event_data = data;
274 schedule_work(&event_data->work);
278 * Check if two given sinks are compatible with each other,
279 * so that they can use the same sink buffers, when an event
282 static bool sinks_compatible(struct coresight_device *a,
283 struct coresight_device *b)
288 * If the sinks are of the same subtype and driven
289 * by the same driver, we can use the same buffer
292 return (a->subtype.sink_subtype == b->subtype.sink_subtype) &&
293 (sink_ops(a) == sink_ops(b));
296 static void *etm_setup_aux(struct perf_event *event, void **pages,
297 int nr_pages, bool overwrite)
300 int cpu = event->cpu;
302 struct coresight_device *sink = NULL;
303 struct coresight_device *user_sink = NULL, *last_sink = NULL;
304 struct etm_event_data *event_data = NULL;
306 event_data = alloc_event_data(cpu);
309 INIT_WORK(&event_data->work, free_event_data);
311 /* First get the selected sink from user space. */
312 if (event->attr.config2 & GENMASK_ULL(31, 0)) {
313 id = (u32)event->attr.config2;
314 sink = user_sink = coresight_get_sink_by_id(id);
317 /* check if user wants a coresight configuration selected */
318 cfg_hash = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32);
320 if (cscfg_activate_config(cfg_hash))
322 event_data->cfg_hash = cfg_hash;
325 mask = &event_data->mask;
328 * Setup the path for each CPU in a trace session. We try to build
329 * trace path for each CPU in the mask. If we don't find an ETM
330 * for the CPU or fail to build a path, we clear the CPU from the
331 * mask and continue with the rest. If ever we try to trace on those
332 * CPUs, we can handle it and fail the session.
334 for_each_cpu(cpu, mask) {
335 struct list_head *path;
336 struct coresight_device *csdev;
338 csdev = per_cpu(csdev_src, cpu);
340 * If there is no ETM associated with this CPU clear it from
341 * the mask and continue with the rest. If ever we try to trace
342 * on this CPU, we handle it accordingly.
345 cpumask_clear_cpu(cpu, mask);
350 * No sink provided - look for a default sink for all the ETMs,
351 * where this event can be scheduled.
352 * We allocate the sink specific buffers only once for this
353 * event. If the ETMs have different default sink devices, we
354 * can only use a single "type" of sink as the event can carry
355 * only one sink specific buffer. Thus we have to make sure
356 * that the sinks are of the same type and driven by the same
357 * driver, as the one we allocate the buffer for. As such
358 * we choose the first sink and check if the remaining ETMs
359 * have a compatible default sink. We don't trace on a CPU
360 * if the sink is not compatible.
363 /* Find the default sink for this ETM */
364 sink = coresight_find_default_sink(csdev);
366 cpumask_clear_cpu(cpu, mask);
370 /* Check if this sink compatible with the last sink */
371 if (last_sink && !sinks_compatible(last_sink, sink)) {
372 cpumask_clear_cpu(cpu, mask);
379 * Building a path doesn't enable it, it simply builds a
380 * list of devices from source to sink that can be
381 * referenced later when the path is actually needed.
383 path = coresight_build_path(csdev, sink);
385 cpumask_clear_cpu(cpu, mask);
389 *etm_event_cpu_path_ptr(event_data, cpu) = path;
392 /* no sink found for any CPU - cannot trace */
396 /* If we don't have any CPUs ready for tracing, abort */
397 cpu = cpumask_first(mask);
398 if (cpu >= nr_cpu_ids)
401 if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer)
405 * Allocate the sink buffer for this session. All the sinks
406 * where this event can be scheduled are ensured to be of the
407 * same type. Thus the same sink configuration is used by the
410 event_data->snk_config =
411 sink_ops(sink)->alloc_buffer(sink, event, pages,
412 nr_pages, overwrite);
413 if (!event_data->snk_config)
420 etm_free_aux(event_data);
425 static void etm_event_start(struct perf_event *event, int flags)
427 int cpu = smp_processor_id();
428 struct etm_event_data *event_data;
429 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
430 struct perf_output_handle *handle = &ctxt->handle;
431 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
432 struct list_head *path;
437 /* Have we messed up our tracking ? */
438 if (WARN_ON(ctxt->event_data))
442 * Deal with the ring buffer API and get a handle on the
443 * session's information.
445 event_data = perf_aux_output_begin(handle, event);
450 * Check if this ETM is allowed to trace, as decided
451 * at etm_setup_aux(). This could be due to an unreachable
452 * sink from this ETM. We can't do much in this case if
453 * the sink was specified or hinted to the driver. For
454 * now, simply don't record anything on this ETM.
456 if (!cpumask_test_cpu(cpu, &event_data->mask))
459 path = etm_event_cpu_path(event_data, cpu);
460 /* We need a sink, no need to continue without one */
461 sink = coresight_get_sink(path);
462 if (WARN_ON_ONCE(!sink))
465 /* Nothing will happen without a path */
466 if (coresight_enable_path(path, CS_MODE_PERF, handle))
469 /* Tell the perf core the event is alive */
472 /* Finally enable the tracer */
473 if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
474 goto fail_disable_path;
476 /* Save the event_data for this ETM */
477 ctxt->event_data = event_data;
482 coresight_disable_path(path);
484 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
485 perf_aux_output_end(handle, 0);
487 event->hw.state = PERF_HES_STOPPED;
491 static void etm_event_stop(struct perf_event *event, int mode)
493 int cpu = smp_processor_id();
495 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
496 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
497 struct perf_output_handle *handle = &ctxt->handle;
498 struct etm_event_data *event_data;
499 struct list_head *path;
502 * If we still have access to the event_data via handle,
503 * confirm that we haven't messed up the tracking.
506 WARN_ON(perf_get_aux(handle) != ctxt->event_data))
509 event_data = ctxt->event_data;
510 /* Clear the event_data as this ETM is stopping the trace. */
511 ctxt->event_data = NULL;
513 if (event->hw.state == PERF_HES_STOPPED)
516 /* We must have a valid event_data for a running event */
517 if (WARN_ON(!event_data))
523 path = etm_event_cpu_path(event_data, cpu);
527 sink = coresight_get_sink(path);
532 source_ops(csdev)->disable(csdev, event);
535 event->hw.state = PERF_HES_STOPPED;
538 * If the handle is not bound to an event anymore
539 * (e.g, the sink driver was unable to restart the
540 * handle due to lack of buffer space), we don't
541 * have to do anything here.
543 if (handle->event && (mode & PERF_EF_UPDATE)) {
544 if (WARN_ON_ONCE(handle->event != event))
547 /* update trace information */
548 if (!sink_ops(sink)->update_buffer)
551 size = sink_ops(sink)->update_buffer(sink, handle,
552 event_data->snk_config);
553 perf_aux_output_end(handle, size);
556 /* Disabling the path make its elements available to other sessions */
557 coresight_disable_path(path);
560 static int etm_event_add(struct perf_event *event, int mode)
563 struct hw_perf_event *hwc = &event->hw;
565 if (mode & PERF_EF_START) {
566 etm_event_start(event, 0);
567 if (hwc->state & PERF_HES_STOPPED)
570 hwc->state = PERF_HES_STOPPED;
576 static void etm_event_del(struct perf_event *event, int mode)
578 etm_event_stop(event, PERF_EF_UPDATE);
581 static int etm_addr_filters_validate(struct list_head *filters)
583 bool range = false, address = false;
585 struct perf_addr_filter *filter;
587 list_for_each_entry(filter, filters, entry) {
589 * No need to go further if there's no more
592 if (++index > ETM_ADDR_CMP_MAX)
595 /* filter::size==0 means single address trigger */
598 * The existing code relies on START/STOP filters
599 * being address filters.
601 if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
602 filter->action == PERF_ADDR_FILTER_ACTION_STOP)
610 * At this time we don't allow range and start/stop filtering
611 * to cohabitate, they have to be mutually exclusive.
613 if (range && address)
620 static void etm_addr_filters_sync(struct perf_event *event)
622 struct perf_addr_filters_head *head = perf_event_addr_filters(event);
623 unsigned long start, stop;
624 struct perf_addr_filter_range *fr = event->addr_filter_ranges;
625 struct etm_filters *filters = event->hw.addr_filters;
626 struct etm_filter *etm_filter;
627 struct perf_addr_filter *filter;
630 list_for_each_entry(filter, &head->list, entry) {
632 stop = start + fr[i].size;
633 etm_filter = &filters->etm_filter[i];
635 switch (filter->action) {
636 case PERF_ADDR_FILTER_ACTION_FILTER:
637 etm_filter->start_addr = start;
638 etm_filter->stop_addr = stop;
639 etm_filter->type = ETM_ADDR_TYPE_RANGE;
641 case PERF_ADDR_FILTER_ACTION_START:
642 etm_filter->start_addr = start;
643 etm_filter->type = ETM_ADDR_TYPE_START;
645 case PERF_ADDR_FILTER_ACTION_STOP:
646 etm_filter->stop_addr = stop;
647 etm_filter->type = ETM_ADDR_TYPE_STOP;
653 filters->nr_filters = i;
656 int etm_perf_symlink(struct coresight_device *csdev, bool link)
658 char entry[sizeof("cpu9999999")];
659 int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
660 struct device *pmu_dev = etm_pmu.dev;
661 struct device *cs_dev = &csdev->dev;
663 sprintf(entry, "cpu%d", cpu);
666 return -EPROBE_DEFER;
669 ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
672 per_cpu(csdev_src, cpu) = csdev;
674 sysfs_remove_link(&pmu_dev->kobj, entry);
675 per_cpu(csdev_src, cpu) = NULL;
680 EXPORT_SYMBOL_GPL(etm_perf_symlink);
682 static ssize_t etm_perf_sink_name_show(struct device *dev,
683 struct device_attribute *dattr,
686 struct dev_ext_attribute *ea;
688 ea = container_of(dattr, struct dev_ext_attribute, attr);
689 return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
692 static struct dev_ext_attribute *
693 etm_perf_add_symlink_group(struct device *dev, const char *name, const char *group_name)
695 struct dev_ext_attribute *ea;
698 struct device *pmu_dev = etm_pmu.dev;
701 return ERR_PTR(-EPROBE_DEFER);
703 ea = devm_kzalloc(dev, sizeof(*ea), GFP_KERNEL);
705 return ERR_PTR(-ENOMEM);
708 * If this function is called adding a sink then the hash is used for
709 * sink selection - see function coresight_get_sink_by_id().
710 * If adding a configuration then the hash is used for selection in
711 * cscfg_activate_config()
713 hash = hashlen_hash(hashlen_string(NULL, name));
715 sysfs_attr_init(&ea->attr.attr);
716 ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL);
717 if (!ea->attr.attr.name)
718 return ERR_PTR(-ENOMEM);
720 ea->attr.attr.mode = 0444;
721 ea->var = (unsigned long *)hash;
723 ret = sysfs_add_file_to_group(&pmu_dev->kobj,
724 &ea->attr.attr, group_name);
726 return ret ? ERR_PTR(ret) : ea;
729 int etm_perf_add_symlink_sink(struct coresight_device *csdev)
732 struct device *dev = &csdev->dev;
735 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
736 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
739 if (csdev->ea != NULL)
742 name = dev_name(dev);
743 csdev->ea = etm_perf_add_symlink_group(dev, name, "sinks");
744 if (IS_ERR(csdev->ea)) {
745 err = PTR_ERR(csdev->ea);
748 csdev->ea->attr.show = etm_perf_sink_name_show;
753 static void etm_perf_del_symlink_group(struct dev_ext_attribute *ea, const char *group_name)
755 struct device *pmu_dev = etm_pmu.dev;
757 sysfs_remove_file_from_group(&pmu_dev->kobj,
758 &ea->attr.attr, group_name);
761 void etm_perf_del_symlink_sink(struct coresight_device *csdev)
763 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
764 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
770 etm_perf_del_symlink_group(csdev->ea, "sinks");
774 static ssize_t etm_perf_cscfg_event_show(struct device *dev,
775 struct device_attribute *dattr,
778 struct dev_ext_attribute *ea;
780 ea = container_of(dattr, struct dev_ext_attribute, attr);
781 return scnprintf(buf, PAGE_SIZE, "configid=0x%lx\n", (unsigned long)(ea->var));
784 int etm_perf_add_symlink_cscfg(struct device *dev, struct cscfg_config_desc *config_desc)
788 if (config_desc->event_ea != NULL)
791 config_desc->event_ea = etm_perf_add_symlink_group(dev, config_desc->name, "events");
793 /* set the show function to the custom cscfg event */
794 if (!IS_ERR(config_desc->event_ea))
795 config_desc->event_ea->attr.show = etm_perf_cscfg_event_show;
797 err = PTR_ERR(config_desc->event_ea);
798 config_desc->event_ea = NULL;
804 void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc)
806 if (!config_desc->event_ea)
809 etm_perf_del_symlink_group(config_desc->event_ea, "events");
810 config_desc->event_ea = NULL;
813 int __init etm_perf_init(void)
817 etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
818 PERF_PMU_CAP_ITRACE);
820 etm_pmu.attr_groups = etm_pmu_attr_groups;
821 etm_pmu.task_ctx_nr = perf_sw_context;
822 etm_pmu.read = etm_event_read;
823 etm_pmu.event_init = etm_event_init;
824 etm_pmu.setup_aux = etm_setup_aux;
825 etm_pmu.free_aux = etm_free_aux;
826 etm_pmu.start = etm_event_start;
827 etm_pmu.stop = etm_event_stop;
828 etm_pmu.add = etm_event_add;
829 etm_pmu.del = etm_event_del;
830 etm_pmu.addr_filters_sync = etm_addr_filters_sync;
831 etm_pmu.addr_filters_validate = etm_addr_filters_validate;
832 etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
834 ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
841 void etm_perf_exit(void)
843 perf_pmu_unregister(&etm_pmu);