1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
8 * Semiconductor. It reports up to two temperatures (its own plus up to
9 * one external one) with a 0.125 deg resolution (1 deg for local
10 * temperature) and a 3-4 deg accuracy.
12 * This driver also supports the LM89 and LM99, two other sensor chips
13 * made by National Semiconductor. Both have an increased remote
14 * temperature measurement accuracy (1 degree), and the LM99
15 * additionally shifts remote temperatures (measured and limits) by 16
16 * degrees, which allows for higher temperatures measurement.
17 * Note that there is no way to differentiate between both chips.
18 * When device is auto-detected, the driver will assume an LM99.
20 * This driver also supports the LM86, another sensor chip made by
21 * National Semiconductor. It is exactly similar to the LM90 except it
22 * has a higher accuracy.
24 * This driver also supports the ADM1032, a sensor chip made by Analog
25 * Devices. That chip is similar to the LM90, with a few differences
26 * that are not handled by this driver. Among others, it has a higher
27 * accuracy than the LM90, much like the LM86 does.
29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
30 * chips made by Maxim. These chips are similar to the LM86.
31 * Note that there is no easy way to differentiate between the three
32 * variants. We use the device address to detect MAX6659, which will result
33 * in a detection as max6657 if it is on address 0x4c. The extra address
34 * and features of the MAX6659 are only supported if the chip is configured
35 * explicitly as max6659, or if its address is not 0x4c.
36 * These chips lack the remote temperature offset feature.
38 * This driver also supports the MAX6654 chip made by Maxim. This chip can be
39 * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar
40 * to MAX6657/MAX6658/MAX6659, but does not support critical temperature
41 * limits. Extended range is available by setting the configuration register
42 * accordingly, and is done during initialization. Extended precision is only
43 * available at conversion rates of 1 Hz and slower. Note that extended
44 * precision is not enabled by default, as this driver initializes all chips
45 * to 2 Hz by design. The driver also supports MAX6690, which is practically
46 * identical to MAX6654.
48 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
49 * MAX6692 chips made by Maxim. These are again similar to the LM86,
50 * but they use unsigned temperature values and can report temperatures
51 * from 0 to 145 degrees.
53 * This driver also supports the MAX6680 and MAX6681, two other sensor
54 * chips made by Maxim. These are quite similar to the other Maxim
55 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
56 * be treated identically.
58 * This driver also supports the MAX6695 and MAX6696, two other sensor
59 * chips made by Maxim. These are also quite similar to other Maxim
60 * chips, but support three temperature sensors instead of two. MAX6695
61 * and MAX6696 only differ in the pinout so they can be treated identically.
63 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
64 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
65 * and extended mode. They are mostly compatible with LM90 except for a data
66 * format difference for the temperature value registers.
68 * This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices
69 * / ON Semiconductor. The chips are similar to ADT7461 but support two external
70 * temperature sensors.
72 * This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor.
73 * The chips are similar to ADT7461/ADT7461A but have full PEC support
76 * This driver also supports the SA56004 from Philips. This device is
77 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
79 * This driver also supports the G781 from GMT. This device is compatible
82 * This driver also supports TMP451 and TMP461 from Texas Instruments.
83 * Those devices are supported in both compatibility and extended mode.
84 * They are mostly compatible with ADT7461 except for local temperature
85 * low byte register and max conversion rate.
87 * This driver also supports MAX1617 and various clones such as G767
88 * and NE1617. Such clones will be detected as MAX1617.
90 * This driver also supports NE1618 from Philips. It is similar to NE1617
91 * but supports 11 bit external temperature values.
93 * Since the LM90 was the first chipset supported by this driver, most
94 * comments will refer to this chipset, but are actually general and
95 * concern all supported chipsets, unless mentioned otherwise.
98 #include <linux/bits.h>
99 #include <linux/device.h>
100 #include <linux/err.h>
101 #include <linux/i2c.h>
102 #include <linux/init.h>
103 #include <linux/interrupt.h>
104 #include <linux/jiffies.h>
105 #include <linux/hwmon.h>
106 #include <linux/kstrtox.h>
107 #include <linux/module.h>
108 #include <linux/mutex.h>
109 #include <linux/of_device.h>
110 #include <linux/regulator/consumer.h>
111 #include <linux/slab.h>
112 #include <linux/workqueue.h>
114 /* The maximum number of channels currently supported */
115 #define MAX_CHANNELS 3
119 * Address is fully defined internally and cannot be changed except for
120 * MAX6659, MAX6680 and MAX6681.
121 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
122 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
123 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
125 * MAX6647 has address 0x4e.
126 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
127 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
128 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
129 * SA56004 can have address 0x48 through 0x4F.
132 static const unsigned short normal_i2c[] = {
133 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
134 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
136 enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481,
137 g781, lm84, lm90, lm99,
138 max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696,
139 nct210, nct72, ne1618, sa56004, tmp451, tmp461, w83l771,
146 #define LM90_REG_MAN_ID 0xFE
147 #define LM90_REG_CHIP_ID 0xFF
148 #define LM90_REG_CONFIG1 0x03
149 #define LM90_REG_CONFIG2 0xBF
150 #define LM90_REG_CONVRATE 0x04
151 #define LM90_REG_STATUS 0x02
152 #define LM90_REG_LOCAL_TEMP 0x00
153 #define LM90_REG_LOCAL_HIGH 0x05
154 #define LM90_REG_LOCAL_LOW 0x06
155 #define LM90_REG_LOCAL_CRIT 0x20
156 #define LM90_REG_REMOTE_TEMPH 0x01
157 #define LM90_REG_REMOTE_TEMPL 0x10
158 #define LM90_REG_REMOTE_OFFSH 0x11
159 #define LM90_REG_REMOTE_OFFSL 0x12
160 #define LM90_REG_REMOTE_HIGHH 0x07
161 #define LM90_REG_REMOTE_HIGHL 0x13
162 #define LM90_REG_REMOTE_LOWH 0x08
163 #define LM90_REG_REMOTE_LOWL 0x14
164 #define LM90_REG_REMOTE_CRIT 0x19
165 #define LM90_REG_TCRIT_HYST 0x21
167 /* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
169 #define MAX6657_REG_LOCAL_TEMPL 0x11
170 #define MAX6696_REG_STATUS2 0x12
171 #define MAX6659_REG_REMOTE_EMERG 0x16
172 #define MAX6659_REG_LOCAL_EMERG 0x17
174 /* SA56004 registers */
176 #define SA56004_REG_LOCAL_TEMPL 0x22
178 #define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
180 /* TMP451/TMP461 registers */
181 #define TMP451_REG_LOCAL_TEMPL 0x15
182 #define TMP451_REG_CONALERT 0x22
184 #define TMP461_REG_CHEN 0x16
185 #define TMP461_REG_DFC 0x24
187 /* ADT7481 registers */
188 #define ADT7481_REG_STATUS2 0x23
189 #define ADT7481_REG_CONFIG2 0x24
191 #define ADT7481_REG_MAN_ID 0x3e
192 #define ADT7481_REG_CHIP_ID 0x3d
194 /* Device features */
195 #define LM90_HAVE_EXTENDED_TEMP BIT(0) /* extended temperature support */
196 #define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */
197 #define LM90_HAVE_UNSIGNED_TEMP BIT(2) /* temperatures are unsigned */
198 #define LM90_HAVE_REM_LIMIT_EXT BIT(3) /* extended remote limit */
199 #define LM90_HAVE_EMERGENCY BIT(4) /* 3rd upper (emergency) limit */
200 #define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm */
201 #define LM90_HAVE_TEMP3 BIT(6) /* 3rd temperature sensor */
202 #define LM90_HAVE_BROKEN_ALERT BIT(7) /* Broken alert */
203 #define LM90_PAUSE_FOR_CONFIG BIT(8) /* Pause conversion for config */
204 #define LM90_HAVE_CRIT BIT(9) /* Chip supports CRIT/OVERT register */
205 #define LM90_HAVE_CRIT_ALRM_SWP BIT(10) /* critical alarm bits swapped */
206 #define LM90_HAVE_PEC BIT(11) /* Chip supports PEC */
207 #define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/
208 #define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */
209 #define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/
210 #define LM90_HAVE_LOW BIT(15) /* low limits */
211 #define LM90_HAVE_CONVRATE BIT(16) /* conversion rate */
212 #define LM90_HAVE_REMOTE_EXT BIT(17) /* extended remote temperature */
213 #define LM90_HAVE_FAULTQUEUE BIT(18) /* configurable samples count */
216 #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */
217 #define LM90_STATUS_RTHRM BIT(1) /* remote THERM limit tripped */
218 #define LM90_STATUS_ROPEN BIT(2) /* remote is an open circuit */
219 #define LM90_STATUS_RLOW BIT(3) /* remote low temp limit tripped */
220 #define LM90_STATUS_RHIGH BIT(4) /* remote high temp limit tripped */
221 #define LM90_STATUS_LLOW BIT(5) /* local low temp limit tripped */
222 #define LM90_STATUS_LHIGH BIT(6) /* local high temp limit tripped */
223 #define LM90_STATUS_BUSY BIT(7) /* conversion is ongoing */
225 /* MAX6695/6696 and ADT7481 2nd status register */
226 #define MAX6696_STATUS2_R2THRM BIT(1) /* remote2 THERM limit tripped */
227 #define MAX6696_STATUS2_R2OPEN BIT(2) /* remote2 is an open circuit */
228 #define MAX6696_STATUS2_R2LOW BIT(3) /* remote2 low temp limit tripped */
229 #define MAX6696_STATUS2_R2HIGH BIT(4) /* remote2 high temp limit tripped */
230 #define MAX6696_STATUS2_ROT2 BIT(5) /* remote emergency limit tripped */
231 #define MAX6696_STATUS2_R2OT2 BIT(6) /* remote2 emergency limit tripped */
232 #define MAX6696_STATUS2_LOT2 BIT(7) /* local emergency limit tripped */
235 * Driver data (common to all clients)
238 static const struct i2c_device_id lm90_id[] = {
239 { "adm1020", max1617 },
240 { "adm1021", max1617 },
241 { "adm1023", adm1023 },
242 { "adm1032", adm1032 },
243 { "adt7421", adt7461a },
244 { "adt7461", adt7461 },
245 { "adt7461a", adt7461a },
246 { "adt7481", adt7481 },
247 { "adt7482", adt7481 },
248 { "adt7483a", adt7481 },
250 { "gl523sm", max1617 },
256 { "max1617", max1617 },
257 { "max6642", max6642 },
258 { "max6646", max6646 },
259 { "max6647", max6646 },
260 { "max6648", max6648 },
261 { "max6649", max6646 },
262 { "max6654", max6654 },
263 { "max6657", max6657 },
264 { "max6658", max6657 },
265 { "max6659", max6659 },
266 { "max6680", max6680 },
267 { "max6681", max6680 },
268 { "max6690", max6654 },
269 { "max6692", max6648 },
270 { "max6695", max6696 },
271 { "max6696", max6696 },
272 { "mc1066", max1617 },
273 { "nct1008", adt7461a },
274 { "nct210", nct210 },
278 { "ne1618", ne1618 },
279 { "w83l771", w83l771 },
280 { "sa56004", sa56004 },
281 { "thmc10", max1617 },
282 { "tmp451", tmp451 },
283 { "tmp461", tmp461 },
286 MODULE_DEVICE_TABLE(i2c, lm90_id);
288 static const struct of_device_id __maybe_unused lm90_of_match[] = {
290 .compatible = "adi,adm1032",
291 .data = (void *)adm1032
294 .compatible = "adi,adt7461",
295 .data = (void *)adt7461
298 .compatible = "adi,adt7461a",
299 .data = (void *)adt7461a
302 .compatible = "adi,adt7481",
303 .data = (void *)adt7481
306 .compatible = "gmt,g781",
310 .compatible = "national,lm90",
314 .compatible = "national,lm86",
318 .compatible = "national,lm89",
322 .compatible = "national,lm99",
326 .compatible = "dallas,max6646",
327 .data = (void *)max6646
330 .compatible = "dallas,max6647",
331 .data = (void *)max6646
334 .compatible = "dallas,max6649",
335 .data = (void *)max6646
338 .compatible = "dallas,max6654",
339 .data = (void *)max6654
342 .compatible = "dallas,max6657",
343 .data = (void *)max6657
346 .compatible = "dallas,max6658",
347 .data = (void *)max6657
350 .compatible = "dallas,max6659",
351 .data = (void *)max6659
354 .compatible = "dallas,max6680",
355 .data = (void *)max6680
358 .compatible = "dallas,max6681",
359 .data = (void *)max6680
362 .compatible = "dallas,max6695",
363 .data = (void *)max6696
366 .compatible = "dallas,max6696",
367 .data = (void *)max6696
370 .compatible = "onnn,nct1008",
371 .data = (void *)adt7461a
374 .compatible = "onnn,nct214",
375 .data = (void *)nct72
378 .compatible = "onnn,nct218",
379 .data = (void *)nct72
382 .compatible = "onnn,nct72",
383 .data = (void *)nct72
386 .compatible = "winbond,w83l771",
387 .data = (void *)w83l771
390 .compatible = "nxp,sa56004",
391 .data = (void *)sa56004
394 .compatible = "ti,tmp451",
395 .data = (void *)tmp451
398 .compatible = "ti,tmp461",
399 .data = (void *)tmp461
403 MODULE_DEVICE_TABLE(of, lm90_of_match);
406 * chip type specific parameters
409 u32 flags; /* Capabilities */
410 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
411 /* Upper 8 bits for max6695/96 */
412 u8 max_convrate; /* Maximum conversion rate register value */
413 u8 resolution; /* 16-bit resolution (default 11 bit) */
414 u8 reg_status2; /* 2nd status register (optional) */
415 u8 reg_local_ext; /* Extended local temp register (optional) */
416 u8 faultqueue_mask; /* fault queue bit mask */
417 u8 faultqueue_depth; /* fault queue depth if mask is used */
420 static const struct lm90_params lm90_params[] = {
422 .flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT
423 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
424 | LM90_HAVE_REMOTE_EXT,
425 .alert_alarms = 0x7c,
430 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
431 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
432 | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS
433 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
434 | LM90_HAVE_FAULTQUEUE,
435 .alert_alarms = 0x7c,
440 * Standard temperature range is supposed to be unsigned,
441 * but that does not match reality. Negative temperatures
442 * are always reported.
444 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
445 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
446 | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC
447 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
448 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
449 .alert_alarms = 0x7c,
454 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
455 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
456 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS
457 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
458 | LM90_HAVE_FAULTQUEUE,
459 .alert_alarms = 0x7c,
463 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
464 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
465 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC
466 | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW
467 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
468 | LM90_HAVE_FAULTQUEUE,
469 .alert_alarms = 0x1c7c,
472 .reg_status2 = ADT7481_REG_STATUS2,
475 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
476 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
477 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
478 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
479 .alert_alarms = 0x7c,
483 .flags = LM90_HAVE_ALARMS,
487 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
488 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
489 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
490 | LM90_HAVE_FAULTQUEUE,
491 .alert_alarms = 0x7b,
493 .faultqueue_mask = BIT(0),
494 .faultqueue_depth = 3,
497 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
498 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
499 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
500 | LM90_HAVE_FAULTQUEUE,
501 .alert_alarms = 0x7b,
503 .faultqueue_mask = BIT(0),
504 .faultqueue_depth = 3,
507 .flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT |
508 LM90_HAVE_LOW | LM90_HAVE_ALARMS,
509 .alert_alarms = 0x78,
514 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED
515 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
516 .alert_alarms = 0x50,
518 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
519 .faultqueue_mask = BIT(4),
520 .faultqueue_depth = 2,
523 .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT
524 | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW
525 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
526 .alert_alarms = 0x7c,
528 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
531 .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT
532 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW
533 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
534 .alert_alarms = 0x7c,
536 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
539 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
540 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
541 .alert_alarms = 0x7c,
543 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
546 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT
547 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
548 | LM90_HAVE_REMOTE_EXT,
549 .alert_alarms = 0x7c,
551 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
554 .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT
555 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
556 | LM90_HAVE_REMOTE_EXT,
557 .alert_alarms = 0x7c,
559 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
563 * Apparent temperatures of 128 degrees C or higher are reported
564 * and treated as negative temperatures (meaning min_alarm will
567 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
568 | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT
569 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
570 | LM90_HAVE_REMOTE_EXT,
571 .alert_alarms = 0x7c,
575 .flags = LM90_HAVE_EMERGENCY
576 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT
577 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
578 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
579 .alert_alarms = 0x1c7c,
581 .reg_status2 = MAX6696_REG_STATUS2,
582 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
583 .faultqueue_mask = BIT(5),
584 .faultqueue_depth = 4,
587 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
588 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
589 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP
590 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
591 | LM90_HAVE_FAULTQUEUE,
592 .alert_alarms = 0x7c,
597 .flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT
598 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
599 | LM90_HAVE_REMOTE_EXT,
600 .alert_alarms = 0x7c,
605 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT
606 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
607 .alert_alarms = 0x7c,
612 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
613 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
614 | LM90_HAVE_REMOTE_EXT,
615 .alert_alarms = 0x7c,
620 * Apparent temperatures of 128 degrees C or higher are reported
621 * and treated as negative temperatures (meaning min_alarm will
624 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
625 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
626 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
627 .alert_alarms = 0x7b,
629 .reg_local_ext = SA56004_REG_LOCAL_TEMPL,
630 .faultqueue_mask = BIT(0),
631 .faultqueue_depth = 3,
634 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
635 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
636 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW
637 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
638 .alert_alarms = 0x7c,
641 .reg_local_ext = TMP451_REG_LOCAL_TEMPL,
644 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
645 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
646 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
647 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
648 .alert_alarms = 0x7c,
651 .reg_local_ext = TMP451_REG_LOCAL_TEMPL,
656 * temperature register index
658 enum lm90_temp_reg_index {
663 LOCAL_EMERG, /* max6659 and max6695/96 */
664 REMOTE_EMERG, /* max6659 and max6695/96 */
665 REMOTE2_CRIT, /* max6695/96 only */
666 REMOTE2_EMERG, /* max6695/96 only */
671 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
673 REMOTE2_TEMP, /* max6695/96 only */
674 REMOTE2_LOW, /* max6695/96 only */
675 REMOTE2_HIGH, /* max6695/96 only */
682 * Client data (each client gets its own)
686 struct i2c_client *client;
687 struct device *hwmon_dev;
689 u32 channel_config[MAX_CHANNELS + 1];
690 const char *channel_label[MAX_CHANNELS];
691 struct hwmon_channel_info chip_info;
692 struct hwmon_channel_info temp_info;
693 const struct hwmon_channel_info *info[3];
694 struct hwmon_chip_info chip;
695 struct mutex update_lock;
696 struct delayed_work alert_work;
697 struct work_struct report_work;
698 bool valid; /* true if register values are valid */
699 bool alarms_valid; /* true if status register values are valid */
700 unsigned long last_updated; /* in jiffies */
701 unsigned long alarms_updated; /* in jiffies */
705 unsigned int update_interval; /* in milliseconds */
707 u8 config; /* Current configuration register value */
708 u8 config_orig; /* Original configuration register value */
709 u8 convrate_orig; /* Original conversion rate register value */
710 u8 resolution; /* temperature resolution in bit */
711 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
712 /* Upper 8 bits for max6695/96 */
713 u8 max_convrate; /* Maximum conversion rate */
714 u8 reg_status2; /* 2nd status register (optional) */
715 u8 reg_local_ext; /* local extension register offset */
716 u8 reg_remote_ext; /* remote temperature low byte */
717 u8 faultqueue_mask; /* fault queue mask */
718 u8 faultqueue_depth; /* fault queue mask */
720 /* registers values */
721 u16 temp[TEMP_REG_NUM];
724 u16 reported_alarms; /* alarms reported as sysfs/udev events */
725 u16 current_alarms; /* current alarms, reported by chip */
726 u16 alarms; /* alarms not yet reported to user */
734 * If the chip supports PEC but not on write byte transactions, we need
735 * to explicitly ask for a transaction without PEC.
737 static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value)
739 return i2c_smbus_xfer(client->adapter, client->addr,
740 client->flags & ~I2C_CLIENT_PEC,
741 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
745 * It is assumed that client->update_lock is held (unless we are in
746 * detection or initialization steps). This matters when PEC is enabled
747 * for chips with partial PEC support, because we don't want the address
748 * pointer to change between the write byte and the read byte transactions.
750 static int lm90_read_reg(struct i2c_client *client, u8 reg)
752 struct lm90_data *data = i2c_get_clientdata(client);
753 bool partial_pec = (client->flags & I2C_CLIENT_PEC) &&
754 (data->flags & LM90_HAVE_PARTIAL_PEC);
758 err = lm90_write_no_pec(client, reg);
761 return i2c_smbus_read_byte(client);
763 return i2c_smbus_read_byte_data(client, reg);
767 * Return register write address
769 * The write address for registers 0x03 .. 0x08 is the read address plus 6.
770 * For other registers the write address matches the read address.
772 static u8 lm90_write_reg_addr(u8 reg)
774 if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH)
780 * Write into LM90 register.
781 * Convert register address to write address if needed, then execute the
784 static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val)
786 return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val);
790 * Write into 16-bit LM90 register.
791 * Convert register addresses to write address if needed, then execute the
794 static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val)
798 ret = lm90_write_reg(client, regh, val >> 8);
799 if (ret < 0 || !regl)
801 return lm90_write_reg(client, regl, val & 0xff);
804 static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl,
809 oldh = lm90_read_reg(client, regh);
816 l = lm90_read_reg(client, regl);
821 return (oldh << 8) | l;
824 * For volatile registers we have to use a trick.
825 * We have to read two registers to have the sensor temperature,
826 * but we have to beware a conversion could occur between the
827 * readings. The datasheet says we should either use
828 * the one-shot conversion register, which we don't want to do
829 * (disables hardware monitoring) or monitor the busy bit, which is
830 * impossible (we can't read the values and monitor that bit at the
831 * exact same time). So the solution used here is to read the high
832 * the high byte again. If the new high byte matches the old one,
833 * then we have a valid reading. Otherwise we have to read the low
834 * byte again, and now we believe we have a correct reading.
836 newh = lm90_read_reg(client, regh);
840 l = lm90_read_reg(client, regl);
844 return (newh << 8) | l;
847 static int lm90_update_confreg(struct lm90_data *data, u8 config)
849 if (data->config != config) {
852 err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config);
855 data->config = config;
861 * client->update_lock must be held when calling this function (unless we are
862 * in detection or initialization steps), and while a remote channel other
863 * than channel 0 is selected. Also, calling code must make sure to re-select
864 * external channel 0 before releasing the lock. This is necessary because
865 * various registers have different meanings as a result of selecting a
866 * non-default remote channel.
868 static int lm90_select_remote_channel(struct lm90_data *data, bool second)
870 u8 config = data->config & ~0x08;
875 return lm90_update_confreg(data, config);
878 static int lm90_write_convrate(struct lm90_data *data, int val)
880 u8 config = data->config;
883 /* Save config and pause conversion */
884 if (data->flags & LM90_PAUSE_FOR_CONFIG) {
885 err = lm90_update_confreg(data, config | 0x40);
891 err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val);
893 /* Revert change to config */
894 lm90_update_confreg(data, config);
900 * Set conversion rate.
901 * client->update_lock must be held when calling this function (unless we are
902 * in detection or initialization steps).
904 static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
905 unsigned int interval)
907 unsigned int update_interval;
910 /* Shift calculations to avoid rounding errors */
913 /* find the nearest update rate */
914 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
915 i < data->max_convrate; i++, update_interval >>= 1)
916 if (interval >= update_interval * 3 / 4)
919 err = lm90_write_convrate(data, i);
920 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
924 static int lm90_set_faultqueue(struct i2c_client *client,
925 struct lm90_data *data, int val)
929 if (data->faultqueue_mask) {
930 err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ?
931 data->config & ~data->faultqueue_mask :
932 data->config | data->faultqueue_mask);
934 static const u8 values[4] = {0, 2, 6, 0x0e};
936 data->conalert = (data->conalert & 0xf1) | values[val - 1];
937 err = lm90_write_reg(data->client, TMP451_REG_CONALERT,
944 static int lm90_update_limits(struct device *dev)
946 struct lm90_data *data = dev_get_drvdata(dev);
947 struct i2c_client *client = data->client;
950 if (data->flags & LM90_HAVE_CRIT) {
951 val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT);
954 data->temp[LOCAL_CRIT] = val << 8;
956 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
959 data->temp[REMOTE_CRIT] = val << 8;
961 val = lm90_read_reg(client, LM90_REG_TCRIT_HYST);
964 data->temp_hyst = val;
966 if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) {
967 val = lm90_read_reg(client, TMP451_REG_CONALERT);
970 data->conalert = val;
973 val = lm90_read16(client, LM90_REG_REMOTE_LOWH,
974 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0,
978 data->temp[REMOTE_LOW] = val;
980 val = lm90_read16(client, LM90_REG_REMOTE_HIGHH,
981 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0,
985 data->temp[REMOTE_HIGH] = val;
987 if (data->flags & LM90_HAVE_OFFSET) {
988 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
989 LM90_REG_REMOTE_OFFSL, false);
992 data->temp[REMOTE_OFFSET] = val;
995 if (data->flags & LM90_HAVE_EMERGENCY) {
996 val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG);
999 data->temp[LOCAL_EMERG] = val << 8;
1001 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1004 data->temp[REMOTE_EMERG] = val << 8;
1007 if (data->flags & LM90_HAVE_TEMP3) {
1008 val = lm90_select_remote_channel(data, true);
1012 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
1015 data->temp[REMOTE2_CRIT] = val << 8;
1017 if (data->flags & LM90_HAVE_EMERGENCY) {
1018 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1021 data->temp[REMOTE2_EMERG] = val << 8;
1024 val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH);
1027 data->temp[REMOTE2_LOW] = val << 8;
1029 val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH);
1032 data->temp[REMOTE2_HIGH] = val << 8;
1034 if (data->flags & LM90_HAVE_OFFSET) {
1035 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
1036 LM90_REG_REMOTE_OFFSL, false);
1039 data->temp[REMOTE2_OFFSET] = val;
1042 lm90_select_remote_channel(data, false);
1048 static void lm90_report_alarms(struct work_struct *work)
1050 struct lm90_data *data = container_of(work, struct lm90_data, report_work);
1051 u16 cleared_alarms, new_alarms, current_alarms;
1052 struct device *hwmon_dev = data->hwmon_dev;
1053 struct device *dev = &data->client->dev;
1056 current_alarms = data->current_alarms;
1057 cleared_alarms = data->reported_alarms & ~current_alarms;
1058 new_alarms = current_alarms & ~data->reported_alarms;
1060 if (!cleared_alarms && !new_alarms)
1063 st = new_alarms & 0xff;
1064 st2 = new_alarms >> 8;
1066 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1067 (st2 & MAX6696_STATUS2_LOT2))
1068 dev_dbg(dev, "temp%d out of range, please check!\n", 1);
1069 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1070 (st2 & MAX6696_STATUS2_ROT2))
1071 dev_dbg(dev, "temp%d out of range, please check!\n", 2);
1072 if (st & LM90_STATUS_ROPEN)
1073 dev_dbg(dev, "temp%d diode open, please check!\n", 2);
1074 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1075 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1076 dev_dbg(dev, "temp%d out of range, please check!\n", 3);
1077 if (st2 & MAX6696_STATUS2_R2OPEN)
1078 dev_dbg(dev, "temp%d diode open, please check!\n", 3);
1080 st |= cleared_alarms & 0xff;
1081 st2 |= cleared_alarms >> 8;
1083 if (st & LM90_STATUS_LLOW)
1084 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0);
1085 if (st & LM90_STATUS_RLOW)
1086 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1);
1087 if (st2 & MAX6696_STATUS2_R2LOW)
1088 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2);
1090 if (st & LM90_STATUS_LHIGH)
1091 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0);
1092 if (st & LM90_STATUS_RHIGH)
1093 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1);
1094 if (st2 & MAX6696_STATUS2_R2HIGH)
1095 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2);
1097 if (st & LM90_STATUS_LTHRM)
1098 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0);
1099 if (st & LM90_STATUS_RTHRM)
1100 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1);
1101 if (st2 & MAX6696_STATUS2_R2THRM)
1102 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2);
1104 if (st2 & MAX6696_STATUS2_LOT2)
1105 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0);
1106 if (st2 & MAX6696_STATUS2_ROT2)
1107 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1);
1108 if (st2 & MAX6696_STATUS2_R2OT2)
1109 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2);
1111 data->reported_alarms = current_alarms;
1114 static int lm90_update_alarms_locked(struct lm90_data *data, bool force)
1116 if (force || !data->alarms_valid ||
1117 time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) {
1118 struct i2c_client *client = data->client;
1123 data->alarms_valid = false;
1125 val = lm90_read_reg(client, LM90_REG_STATUS);
1128 alarms = val & ~LM90_STATUS_BUSY;
1130 if (data->reg_status2) {
1131 val = lm90_read_reg(client, data->reg_status2);
1137 * If the update is forced (called from interrupt or alert
1138 * handler) and alarm data is valid, the alarms may have been
1139 * updated after the last update interval, and the status
1140 * register may still be cleared. Only add additional alarms
1141 * in this case. Alarms will be cleared later if appropriate.
1143 if (force && data->alarms_valid)
1144 data->current_alarms |= alarms;
1146 data->current_alarms = alarms;
1147 data->alarms |= alarms;
1149 check_enable = (client->irq || !(data->config_orig & 0x80)) &&
1150 (data->config & 0x80);
1152 if (force || check_enable)
1153 schedule_work(&data->report_work);
1156 * Re-enable ALERT# output if it was originally enabled, relevant
1157 * alarms are all clear, and alerts are currently disabled.
1158 * Otherwise (re)schedule worker if needed.
1161 if (!(data->current_alarms & data->alert_alarms)) {
1162 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
1163 lm90_update_confreg(data, data->config & ~0x80);
1165 * We may have been called from the update handler.
1166 * If so, the worker, if scheduled, is no longer
1167 * needed. Cancel it. Don't synchronize because
1168 * it may already be running.
1170 cancel_delayed_work(&data->alert_work);
1172 schedule_delayed_work(&data->alert_work,
1173 max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
1176 data->alarms_updated = jiffies;
1177 data->alarms_valid = true;
1182 static int lm90_update_alarms(struct lm90_data *data, bool force)
1186 mutex_lock(&data->update_lock);
1187 err = lm90_update_alarms_locked(data, force);
1188 mutex_unlock(&data->update_lock);
1193 static void lm90_alert_work(struct work_struct *__work)
1195 struct delayed_work *delayed_work = container_of(__work, struct delayed_work, work);
1196 struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work);
1198 /* Nothing to do if alerts are enabled */
1199 if (!(data->config & 0x80))
1202 lm90_update_alarms(data, true);
1205 static int lm90_update_device(struct device *dev)
1207 struct lm90_data *data = dev_get_drvdata(dev);
1208 struct i2c_client *client = data->client;
1209 unsigned long next_update;
1213 val = lm90_update_limits(dev);
1218 next_update = data->last_updated +
1219 msecs_to_jiffies(data->update_interval);
1220 if (time_after(jiffies, next_update) || !data->valid) {
1221 dev_dbg(&client->dev, "Updating lm90 data.\n");
1223 data->valid = false;
1225 val = lm90_read_reg(client, LM90_REG_LOCAL_LOW);
1228 data->temp[LOCAL_LOW] = val << 8;
1230 val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH);
1233 data->temp[LOCAL_HIGH] = val << 8;
1235 val = lm90_read16(client, LM90_REG_LOCAL_TEMP,
1236 data->reg_local_ext, true);
1239 data->temp[LOCAL_TEMP] = val;
1240 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1241 data->reg_remote_ext, true);
1244 data->temp[REMOTE_TEMP] = val;
1246 if (data->flags & LM90_HAVE_TEMP3) {
1247 val = lm90_select_remote_channel(data, true);
1251 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1252 data->reg_remote_ext, true);
1254 lm90_select_remote_channel(data, false);
1257 data->temp[REMOTE2_TEMP] = val;
1259 lm90_select_remote_channel(data, false);
1262 val = lm90_update_alarms_locked(data, false);
1266 data->last_updated = jiffies;
1273 /* pec used for devices with PEC support */
1274 static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
1277 struct i2c_client *client = to_i2c_client(dev);
1279 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
1282 static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
1283 const char *buf, size_t count)
1285 struct i2c_client *client = to_i2c_client(dev);
1289 err = kstrtol(buf, 10, &val);
1295 client->flags &= ~I2C_CLIENT_PEC;
1298 client->flags |= I2C_CLIENT_PEC;
1307 static DEVICE_ATTR_RW(pec);
1309 static int lm90_temp_get_resolution(struct lm90_data *data, int index)
1313 if (data->reg_remote_ext)
1314 return data->resolution;
1317 case REMOTE2_OFFSET:
1319 return data->resolution;
1321 if (data->reg_local_ext)
1322 return data->resolution;
1328 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
1329 return data->resolution;
1336 static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution)
1340 if (flags & LM90_HAVE_EXTENDED_TEMP)
1341 val = regval - 0x4000;
1342 else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED))
1347 return ((val >> (16 - resolution)) * 1000) >> (resolution - 8);
1350 static int lm90_get_temp(struct lm90_data *data, int index, int channel)
1352 int temp = lm90_temp_from_reg(data->flags, data->temp[index],
1353 lm90_temp_get_resolution(data, index));
1355 /* +16 degrees offset for remote temperature on LM99 */
1356 if (data->kind == lm99 && channel)
1362 static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution)
1364 int fraction = resolution > 8 ?
1365 1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0;
1367 if (flags & LM90_HAVE_EXTENDED_TEMP) {
1368 val = clamp_val(val, -64000, 191000 + fraction);
1370 } else if (flags & LM90_HAVE_EXT_UNSIGNED) {
1371 val = clamp_val(val, 0, 255000 + fraction);
1372 } else if (flags & LM90_HAVE_UNSIGNED_TEMP) {
1373 val = clamp_val(val, 0, 127000 + fraction);
1375 val = clamp_val(val, -128000, 127000 + fraction);
1378 return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution);
1381 static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val)
1383 static const u8 regs[] = {
1384 [LOCAL_LOW] = LM90_REG_LOCAL_LOW,
1385 [LOCAL_HIGH] = LM90_REG_LOCAL_HIGH,
1386 [LOCAL_CRIT] = LM90_REG_LOCAL_CRIT,
1387 [REMOTE_CRIT] = LM90_REG_REMOTE_CRIT,
1388 [LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG,
1389 [REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG,
1390 [REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT,
1391 [REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG,
1392 [REMOTE_LOW] = LM90_REG_REMOTE_LOWH,
1393 [REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH,
1394 [REMOTE2_LOW] = LM90_REG_REMOTE_LOWH,
1395 [REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH,
1397 struct i2c_client *client = data->client;
1398 u8 regh = regs[index];
1402 if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) {
1403 if (index == REMOTE_LOW || index == REMOTE2_LOW)
1404 regl = LM90_REG_REMOTE_LOWL;
1405 else if (index == REMOTE_HIGH || index == REMOTE2_HIGH)
1406 regl = LM90_REG_REMOTE_HIGHL;
1409 /* +16 degrees offset for remote temperature on LM99 */
1410 if (data->kind == lm99 && channel) {
1411 /* prevent integer underflow */
1412 val = max(val, -128000l);
1416 data->temp[index] = lm90_temp_to_reg(data->flags, val,
1417 lm90_temp_get_resolution(data, index));
1420 lm90_select_remote_channel(data, true);
1422 err = lm90_write16(client, regh, regl, data->temp[index]);
1425 lm90_select_remote_channel(data, false);
1430 static int lm90_get_temphyst(struct lm90_data *data, int index, int channel)
1432 int temp = lm90_get_temp(data, index, channel);
1434 return temp - data->temp_hyst * 1000;
1437 static int lm90_set_temphyst(struct lm90_data *data, long val)
1439 int temp = lm90_get_temp(data, LOCAL_CRIT, 0);
1441 /* prevent integer overflow/underflow */
1442 val = clamp_val(val, -128000l, 255000l);
1443 data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31);
1445 return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst);
1448 static int lm90_get_temp_offset(struct lm90_data *data, int index)
1450 int res = lm90_temp_get_resolution(data, index);
1452 return lm90_temp_from_reg(0, data->temp[index], res);
1455 static int lm90_set_temp_offset(struct lm90_data *data, int index, int channel, long val)
1459 val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, index));
1461 /* For ADT7481 we can use the same registers for remote channel 1 and 2 */
1463 lm90_select_remote_channel(data, true);
1465 err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL, val);
1468 lm90_select_remote_channel(data, false);
1473 data->temp[index] = val;
1478 static const u8 lm90_temp_index[MAX_CHANNELS] = {
1479 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
1482 static const u8 lm90_temp_min_index[MAX_CHANNELS] = {
1483 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
1486 static const u8 lm90_temp_max_index[MAX_CHANNELS] = {
1487 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
1490 static const u8 lm90_temp_crit_index[MAX_CHANNELS] = {
1491 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
1494 static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = {
1495 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
1498 static const s8 lm90_temp_offset_index[MAX_CHANNELS] = {
1499 -1, REMOTE_OFFSET, REMOTE2_OFFSET
1502 static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) };
1503 static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) };
1504 static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) };
1505 static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) };
1506 static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) };
1507 static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) };
1509 static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1511 struct lm90_data *data = dev_get_drvdata(dev);
1515 mutex_lock(&data->update_lock);
1516 err = lm90_update_device(dev);
1517 mutex_unlock(&data->update_lock);
1522 case hwmon_temp_input:
1523 *val = lm90_get_temp(data, lm90_temp_index[channel], channel);
1525 case hwmon_temp_min_alarm:
1526 case hwmon_temp_max_alarm:
1527 case hwmon_temp_crit_alarm:
1528 case hwmon_temp_emergency_alarm:
1529 case hwmon_temp_fault:
1531 case hwmon_temp_min_alarm:
1532 bit = lm90_min_alarm_bits[channel];
1534 case hwmon_temp_max_alarm:
1535 bit = lm90_max_alarm_bits[channel];
1537 case hwmon_temp_crit_alarm:
1538 if (data->flags & LM90_HAVE_CRIT_ALRM_SWP)
1539 bit = lm90_crit_alarm_bits_swapped[channel];
1541 bit = lm90_crit_alarm_bits[channel];
1543 case hwmon_temp_emergency_alarm:
1544 bit = lm90_emergency_alarm_bits[channel];
1546 case hwmon_temp_fault:
1547 bit = lm90_fault_bits[channel];
1550 *val = !!(data->alarms & bit);
1551 data->alarms &= ~bit;
1552 data->alarms |= data->current_alarms;
1554 case hwmon_temp_min:
1555 *val = lm90_get_temp(data, lm90_temp_min_index[channel], channel);
1557 case hwmon_temp_max:
1558 *val = lm90_get_temp(data, lm90_temp_max_index[channel], channel);
1560 case hwmon_temp_crit:
1561 *val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel);
1563 case hwmon_temp_crit_hyst:
1564 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel);
1566 case hwmon_temp_emergency:
1567 *val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel);
1569 case hwmon_temp_emergency_hyst:
1570 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel);
1572 case hwmon_temp_offset:
1573 *val = lm90_get_temp_offset(data, lm90_temp_offset_index[channel]);
1581 static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1583 struct lm90_data *data = dev_get_drvdata(dev);
1586 mutex_lock(&data->update_lock);
1588 err = lm90_update_device(dev);
1593 case hwmon_temp_min:
1594 err = lm90_set_temp(data, lm90_temp_min_index[channel],
1597 case hwmon_temp_max:
1598 err = lm90_set_temp(data, lm90_temp_max_index[channel],
1601 case hwmon_temp_crit:
1602 err = lm90_set_temp(data, lm90_temp_crit_index[channel],
1605 case hwmon_temp_crit_hyst:
1606 err = lm90_set_temphyst(data, val);
1608 case hwmon_temp_emergency:
1609 err = lm90_set_temp(data, lm90_temp_emerg_index[channel],
1612 case hwmon_temp_offset:
1613 err = lm90_set_temp_offset(data, lm90_temp_offset_index[channel],
1621 mutex_unlock(&data->update_lock);
1626 static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
1629 case hwmon_temp_input:
1630 case hwmon_temp_min_alarm:
1631 case hwmon_temp_max_alarm:
1632 case hwmon_temp_crit_alarm:
1633 case hwmon_temp_emergency_alarm:
1634 case hwmon_temp_emergency_hyst:
1635 case hwmon_temp_fault:
1636 case hwmon_temp_label:
1638 case hwmon_temp_min:
1639 case hwmon_temp_max:
1640 case hwmon_temp_crit:
1641 case hwmon_temp_emergency:
1642 case hwmon_temp_offset:
1644 case hwmon_temp_crit_hyst:
1653 static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
1655 struct lm90_data *data = dev_get_drvdata(dev);
1658 mutex_lock(&data->update_lock);
1659 err = lm90_update_device(dev);
1660 mutex_unlock(&data->update_lock);
1665 case hwmon_chip_update_interval:
1666 *val = data->update_interval;
1668 case hwmon_chip_alarms:
1669 *val = data->alarms;
1671 case hwmon_chip_temp_samples:
1672 if (data->faultqueue_mask) {
1673 *val = (data->config & data->faultqueue_mask) ?
1674 data->faultqueue_depth : 1;
1676 switch (data->conalert & 0x0e) {
1700 static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1702 struct lm90_data *data = dev_get_drvdata(dev);
1703 struct i2c_client *client = data->client;
1706 mutex_lock(&data->update_lock);
1708 err = lm90_update_device(dev);
1713 case hwmon_chip_update_interval:
1714 err = lm90_set_convrate(client, data,
1715 clamp_val(val, 0, 100000));
1717 case hwmon_chip_temp_samples:
1718 err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4));
1725 mutex_unlock(&data->update_lock);
1730 static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1733 case hwmon_chip_update_interval:
1734 case hwmon_chip_temp_samples:
1736 case hwmon_chip_alarms:
1743 static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1744 u32 attr, int channel, long *val)
1748 return lm90_chip_read(dev, attr, channel, val);
1750 return lm90_temp_read(dev, attr, channel, val);
1756 static int lm90_read_string(struct device *dev, enum hwmon_sensor_types type,
1757 u32 attr, int channel, const char **str)
1759 struct lm90_data *data = dev_get_drvdata(dev);
1761 *str = data->channel_label[channel];
1766 static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1767 u32 attr, int channel, long val)
1771 return lm90_chip_write(dev, attr, channel, val);
1773 return lm90_temp_write(dev, attr, channel, val);
1779 static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1780 u32 attr, int channel)
1784 return lm90_chip_is_visible(data, attr, channel);
1786 return lm90_temp_is_visible(data, attr, channel);
1792 static const char *lm90_detect_lm84(struct i2c_client *client)
1794 static const u8 regs[] = {
1795 LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH,
1796 LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH
1798 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1799 int reg1, reg2, reg3, reg4;
1800 bool nonzero = false;
1804 if (status < 0 || (status & 0xab))
1808 * For LM84, undefined registers return the most recent value.
1809 * Repeat several times, each time checking against a different
1810 * (presumably) existing register.
1812 for (i = 0; i < ARRAY_SIZE(regs); i++) {
1813 reg1 = i2c_smbus_read_byte_data(client, regs[i]);
1814 reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL);
1815 reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1816 reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1821 /* If any register has a different value, this is not an LM84 */
1822 if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1)
1825 nonzero |= reg1 || reg2 || reg3 || reg4;
1829 * If all registers always returned 0 or 0xff, all bets are off,
1830 * and we can not make any predictions about the chip type.
1832 return nonzero && ff != 0xff ? "lm84" : NULL;
1835 static const char *lm90_detect_max1617(struct i2c_client *client, int config1)
1837 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1838 int llo, rlo, lhi, rhi;
1840 if (status < 0 || (status & 0x03))
1847 * Fail if unsupported registers return anything but 0xff.
1848 * The calling code already checked man_id and chip_id.
1849 * A byte read operation repeats the most recent read operation
1850 * and should also return 0xff.
1852 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff ||
1853 i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff ||
1854 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff ||
1855 i2c_smbus_read_byte(client) != 0xff)
1858 llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1859 rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1861 lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
1862 rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH);
1864 if (llo < 0 || rlo < 0)
1868 * A byte read operation repeats the most recent read and should
1869 * return the same value.
1871 if (i2c_smbus_read_byte(client) != rhi)
1875 * The following two checks are marginal since the checked values
1876 * are strictly speaking valid.
1879 /* fail for negative high limits; this also catches read errors */
1880 if ((s8)lhi < 0 || (s8)rhi < 0)
1883 /* fail if low limits are larger than or equal to high limits */
1884 if ((s8)llo >= lhi || (s8)rlo >= rhi)
1887 if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
1889 * Word read operations return 0xff in second byte
1891 if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) !=
1894 if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) !=
1897 if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) !=
1905 static const char *lm90_detect_national(struct i2c_client *client, int chip_id,
1906 int config1, int convrate)
1908 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
1909 int address = client->addr;
1910 const char *name = NULL;
1915 if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09)
1918 if (address != 0x4c && address != 0x4d)
1921 switch (chip_id & 0xf0) {
1922 case 0x10: /* LM86 */
1923 if (address == 0x4c)
1926 case 0x20: /* LM90 */
1927 if (address == 0x4c)
1930 case 0x30: /* LM89/LM99 */
1931 name = "lm99"; /* detect LM89 as LM99 */
1940 static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1,
1943 int address = client->addr;
1944 const char *name = NULL;
1947 case 0xca: /* NCT218 */
1948 if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
1958 static const char *lm90_detect_analog(struct i2c_client *client, bool common_address,
1959 int chip_id, int config1, int convrate)
1961 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1962 int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2);
1963 int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID);
1964 int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID);
1965 int address = client->addr;
1966 const char *name = NULL;
1968 if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0)
1972 * The following chips should be detected by this function. Known
1973 * register values are listed. Registers 0x3d .. 0x3e are undocumented
1974 * for most of the chips, yet appear to return a well defined value.
1975 * Register 0xff is undocumented for some of the chips. Register 0x3f
1976 * is undocumented for all chips, but also returns a well defined value.
1977 * Values are as reported from real chips unless mentioned otherwise.
1978 * The code below checks values for registers 0x3d, 0x3e, and 0xff,
1979 * but not for register 0x3f.
1982 * 3d 3e 3f fe ff Notes
1983 * ----------------------------------------------------------
1984 * adm1020 00 00 00 41 39
1985 * adm1021 00 00 00 41 03
1986 * adm1021a 00 00 00 41 3c
1987 * adm1023 00 00 00 41 3c same as adm1021a
1988 * adm1032 00 00 00 41 42
1990 * adt7421 21 41 04 41 04
1991 * adt7461 00 00 00 41 51
1992 * adt7461a 61 41 05 41 57
1993 * adt7481 81 41 02 41 62
1994 * adt7482 - - - 41 65 datasheet
1995 * 82 41 05 41 75 real chip
1996 * adt7483 83 41 04 41 94
1998 * nct72 61 41 07 41 55
1999 * nct210 00 00 00 41 3f
2000 * nct214 61 41 08 41 5a
2001 * nct1008 - - - 41 57 datasheet rev. 3
2002 * 61 41 06 41 54 real chip
2004 * nvt210 - - - 41 - datasheet
2005 * nvt211 - - - 41 - datasheet
2008 case 0x00 ... 0x03: /* ADM1021 */
2010 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2011 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2014 case 0x04: /* ADT7421 (undocumented) */
2015 if (man_id2 == 0x41 && chip_id2 == 0x21 &&
2016 (address == 0x4c || address == 0x4d) &&
2017 (config1 & 0x0b) == 0x08 && convrate <= 0x0a)
2020 case 0x30 ... 0x38: /* ADM1021A, ADM1023 */
2023 * ADM1021A and compatible chips will be mis-detected as
2024 * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both
2025 * found to have a Chip ID of 0x3c.
2026 * ADM1021A does not officially support low byte registers
2027 * (0x12 .. 0x14), but a chip labeled ADM1021A does support it.
2028 * Official support for the temperature offset high byte
2029 * register (0x11) was added to revision F of the ADM1021A
2031 * It is currently unknown if there is a means to distinguish
2032 * ADM1021A from ADM1023, and/or if revisions of ADM1021A exist
2033 * which differ in functionality from ADM1023.
2035 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2036 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2039 case 0x39: /* ADM1020 (undocumented) */
2040 if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2041 (address == 0x4c || address == 0x4d || address == 0x4e) &&
2042 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2045 case 0x3f: /* NCT210 */
2046 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2047 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2050 case 0x40 ... 0x4f: /* ADM1032 */
2051 if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2052 (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) &&
2056 case 0x51: /* ADT7461 */
2057 if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2058 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2062 case 0x54: /* NCT1008 */
2063 if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2064 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2068 case 0x55: /* NCT72 */
2069 if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2070 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2074 case 0x57: /* ADT7461A, NCT1008 (datasheet rev. 3) */
2075 if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2076 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2080 case 0x5a: /* NCT214 */
2081 if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2082 common_address && !(config1 & 0x1b) && convrate <= 0x0a)
2085 case 0x62: /* ADT7481, undocumented */
2086 if (man_id2 == 0x41 && chip_id2 == 0x81 &&
2087 (address == 0x4b || address == 0x4c) && !(config1 & 0x10) &&
2088 !(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) {
2092 case 0x65: /* ADT7482, datasheet */
2093 case 0x75: /* ADT7482, real chip */
2094 if (man_id2 == 0x41 && chip_id2 == 0x82 &&
2095 address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) &&
2099 case 0x94: /* ADT7483 */
2100 if (man_id2 == 0x41 && chip_id2 == 0x83 &&
2102 ((address >= 0x18 && address <= 0x1a) ||
2103 (address >= 0x29 && address <= 0x2b) ||
2104 (address >= 0x4c && address <= 0x4e)) &&
2105 !(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a)
2115 static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address,
2116 int chip_id, int config1, int convrate)
2118 int man_id, emerg, emerg2, status2;
2119 int address = client->addr;
2120 const char *name = NULL;
2124 if (!common_address)
2128 * We read MAX6659_REG_REMOTE_EMERG twice, and re-read
2129 * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG
2130 * exists, both readings will reflect the same value. Otherwise,
2131 * the readings will be different.
2133 emerg = i2c_smbus_read_byte_data(client,
2134 MAX6659_REG_REMOTE_EMERG);
2135 man_id = i2c_smbus_read_byte_data(client,
2137 emerg2 = i2c_smbus_read_byte_data(client,
2138 MAX6659_REG_REMOTE_EMERG);
2139 status2 = i2c_smbus_read_byte_data(client,
2140 MAX6696_REG_STATUS2);
2141 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
2145 * Even though MAX6695 and MAX6696 do not have a chip ID
2146 * register, reading it returns 0x01. Bit 4 of the config1
2147 * register is unused and should return zero when read. Bit 0 of
2148 * the status2 register is unused and should return zero when
2151 * MAX6695 and MAX6696 have an additional set of temperature
2152 * limit registers. We can detect those chips by checking if
2153 * one of those registers exists.
2155 if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 &&
2159 * The chip_id register of the MAX6680 and MAX6681 holds the
2160 * revision of the chip. The lowest bit of the config1 register
2161 * is unused and should return zero when read, so should the
2162 * second to last bit of config1 (software reset). Register
2163 * address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and
2164 * should differ from emerg2, and emerg2 should match man_id
2165 * since it does not exist.
2167 else if (!(config1 & 0x03) && convrate <= 0x07 &&
2168 emerg2 == man_id && emerg2 != status2)
2171 * MAX1617A does not have any extended registers (register
2172 * address 0x10 or higher) except for manufacturer and
2173 * device ID registers. Unlike other chips of this series,
2174 * unsupported registers were observed to return a fixed value
2176 * Note: Multiple chips with different markings labeled as
2177 * "MAX1617" (no "A") were observed to report manufacturer ID
2178 * 0x4d and device ID 0x01. It is unknown if other variants of
2179 * MAX1617/MAX617A with different behavior exist. The detection
2180 * code below works for those chips.
2182 else if (!(config1 & 0x03f) && convrate <= 0x07 &&
2183 emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01)
2188 * The chip_id of the MAX6654 holds the revision of the chip.
2189 * The lowest 3 bits of the config1 register are unused and
2190 * should return zero when read.
2192 if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2197 * The chip_id of the MAX6690 holds the revision of the chip.
2198 * The lowest 3 bits of the config1 register are unused and
2199 * should return zero when read.
2200 * Note that MAX6654 and MAX6690 are practically the same chips.
2201 * The only diference is the rated accuracy. Rev. 1 of the
2202 * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled
2203 * MAX6654 was observed to have a chip ID of 0x09.
2205 if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2210 * MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
2211 * register. Reading from that address will return the last
2212 * read value, which in our case is those of the man_id
2213 * register, or 0x4d.
2214 * MAX6642 does not have a conversion rate register, nor low
2215 * limit registers. Reading from those registers returns the
2218 * For MAX6657, MAX6658 and MAX6659, the config1 register lacks
2219 * a low nibble, so the value will be those of the previous
2220 * read, so in our case again those of the man_id register.
2221 * MAX6659 has a third set of upper temperature limit registers.
2222 * Those registers also return values on MAX6657 and MAX6658,
2223 * thus the only way to detect MAX6659 is by its address.
2224 * For this reason it will be mis-detected as MAX6657 if its
2227 if (address >= 0x48 && address <= 0x4f && config1 == convrate &&
2228 !(config1 & 0x0f)) {
2232 * We know that this is not a MAX6657/58/59 because its
2233 * configuration register has the wrong value and it does
2234 * not appear to have a conversion rate register.
2237 /* re-read manufacturer ID to have a good baseline */
2238 if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d)
2241 /* check various non-existing registers */
2242 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d ||
2243 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d ||
2244 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d)
2247 /* check for unused status register bits */
2248 regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
2249 if (regval < 0 || (regval & 0x2b))
2252 /* re-check unsupported registers */
2253 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval ||
2254 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval ||
2255 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval)
2259 } else if ((address == 0x4c || address == 0x4d || address == 0x4e) &&
2260 (config1 & 0x1f) == 0x0d && convrate <= 0x09) {
2261 if (address == 0x4c)
2269 * The chip_id register of the MAX6646/6647/6649 holds the
2270 * revision of the chip. The lowest 6 bits of the config1
2271 * register are unused and should return zero when read.
2272 * The I2C address of MAX6648/6692 is fixed at 0x4c.
2273 * MAX6646 is at address 0x4d, MAX6647 is at address 0x4e,
2274 * and MAX6649 is at address 0x4c. A slight difference between
2275 * the two sets of chips is that the remote temperature register
2276 * reports different values if the DXP pin is open or shorted.
2277 * We can use that information to help distinguish between the
2278 * chips. MAX6648 will be mis-detected as MAX6649 if the remote
2279 * diode is connected, but there isn't really anything we can
2282 if (!(config1 & 0x3f) && convrate <= 0x07) {
2288 * MAX6649 reports an external temperature
2289 * value of 0xff if DXP is open or shorted.
2290 * MAX6648 reports 0x80 in that case.
2292 temp = i2c_smbus_read_byte_data(client,
2293 LM90_REG_REMOTE_TEMPH);
2317 static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id,
2318 int config1, int convrate)
2320 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2321 int address = client->addr;
2322 const char *name = NULL;
2327 if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) {
2328 if (chip_id == 0x01 && convrate <= 0x09) {
2331 } else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) {
2332 /* W83L771AWG/ASG */
2339 static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address,
2340 int chip_id, int config1, int convrate)
2342 int address = client->addr;
2343 const char *name = NULL;
2348 config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2351 if (address >= 0x48 && address <= 0x4f &&
2352 !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09)
2356 if (common_address && !(config1 & 0x3f) && convrate <= 0x07)
2365 static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id,
2366 int config1, int convrate)
2368 int address = client->addr;
2371 * According to the datasheet, G781 is supposed to be at I2C Address
2372 * 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C
2373 * address 0x4d and have a chip ID of 0x03. However, when support
2374 * for G781 was added, chips at 0x4c and 0x4d were found to have a
2375 * chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with
2377 * To avoid detection failures, accept chip ID 0x01 and 0x03 at both
2379 * G784 reports manufacturer ID 0x47 and chip ID 0x01. A public
2380 * datasheet is not available. Extensive testing suggests that
2381 * the chip appears to be fully compatible with G781.
2382 * Available register dumps show that G751 also reports manufacturer
2383 * ID 0x47 and chip ID 0x01 even though that chip does not officially
2384 * support those registers. This makes chip detection somewhat
2385 * vulnerable. To improve detection quality, read the offset low byte
2386 * and alert fault queue registers and verify that only expected bits
2389 if ((chip_id == 0x01 || chip_id == 0x03) &&
2390 (address == 0x4c || address == 0x4d) &&
2391 !(config1 & 0x3f) && convrate <= 0x08) {
2394 reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL);
2395 if (reg < 0 || reg & 0x1f)
2397 reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT);
2398 if (reg < 0 || reg & 0xf1)
2407 static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address,
2408 int chip_id, int config1, int convrate)
2410 if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) {
2411 /* THMC10: Unsupported registers return 0xff */
2412 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff &&
2413 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff)
2419 static const char *lm90_detect_ti(struct i2c_client *client, int chip_id,
2420 int config1, int convrate)
2422 int address = client->addr;
2423 const char *name = NULL;
2425 if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) {
2426 int local_ext, conalert, chen, dfc;
2428 local_ext = i2c_smbus_read_byte_data(client,
2429 TMP451_REG_LOCAL_TEMPL);
2430 conalert = i2c_smbus_read_byte_data(client,
2431 TMP451_REG_CONALERT);
2432 chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
2433 dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
2435 if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 &&
2436 (chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) {
2437 if (address == 0x4c && !(chen & 0x03))
2439 else if (address >= 0x48 && address <= 0x4f)
2447 /* Return 0 if detection is successful, -ENODEV otherwise */
2448 static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info)
2450 struct i2c_adapter *adapter = client->adapter;
2451 int man_id, chip_id, config1, convrate, lhigh;
2452 const char *name = NULL;
2453 int address = client->addr;
2454 bool common_address =
2455 (address >= 0x18 && address <= 0x1a) ||
2456 (address >= 0x29 && address <= 0x2b) ||
2457 (address >= 0x4c && address <= 0x4e);
2459 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
2463 * Get well defined register value for chips with neither man_id nor
2464 * chip_id registers.
2466 lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
2468 /* detection and identification */
2469 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2470 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2471 config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1);
2472 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2473 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0)
2476 /* Bail out immediately if all register report the same value */
2477 if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate)
2481 * If reading man_id and chip_id both return the same value as lhigh,
2482 * the chip may not support those registers and return the most recent read
2483 * value. Check again with a different register and handle accordingly.
2485 if (man_id == lhigh && chip_id == lhigh) {
2486 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2487 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2488 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2489 if (convrate < 0 || man_id < 0 || chip_id < 0)
2491 if (man_id == convrate && chip_id == convrate)
2495 case -1: /* Chip does not support man_id / chip_id */
2496 if (common_address && !convrate && !(config1 & 0x7f))
2497 name = lm90_detect_lm84(client);
2499 case 0x01: /* National Semiconductor */
2500 name = lm90_detect_national(client, chip_id, config1, convrate);
2503 name = lm90_detect_on(client, chip_id, config1, convrate);
2505 case 0x23: /* Genesys Logic */
2506 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2509 case 0x41: /* Analog Devices */
2510 name = lm90_detect_analog(client, common_address, chip_id, config1,
2513 case 0x47: /* GMT */
2514 name = lm90_detect_gmt(client, chip_id, config1, convrate);
2517 name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate);
2519 case 0x4d: /* Maxim Integrated */
2520 name = lm90_detect_maxim(client, common_address, chip_id,
2523 case 0x54: /* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */
2524 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2528 name = lm90_detect_ti(client, chip_id, config1, convrate);
2530 case 0x5c: /* Winbond/Nuvoton */
2531 name = lm90_detect_nuvoton(client, chip_id, config1, convrate);
2533 case 0xa1: /* NXP Semiconductor/Philips */
2534 name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate);
2536 case 0xff: /* MAX1617, G767, NE1617 */
2537 if (common_address && chip_id == 0xff && convrate < 8)
2538 name = lm90_detect_max1617(client, config1);
2544 if (!name) { /* identification failed */
2545 dev_dbg(&adapter->dev,
2546 "Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n",
2547 client->addr, man_id, chip_id);
2551 strscpy(info->type, name, I2C_NAME_SIZE);
2556 static void lm90_restore_conf(void *_data)
2558 struct lm90_data *data = _data;
2559 struct i2c_client *client = data->client;
2561 cancel_delayed_work_sync(&data->alert_work);
2562 cancel_work_sync(&data->report_work);
2564 /* Restore initial configuration */
2565 if (data->flags & LM90_HAVE_CONVRATE)
2566 lm90_write_convrate(data, data->convrate_orig);
2567 lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig);
2570 static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
2572 struct device_node *np = client->dev.of_node;
2573 int config, convrate;
2575 if (data->flags & LM90_HAVE_CONVRATE) {
2576 convrate = lm90_read_reg(client, LM90_REG_CONVRATE);
2579 data->convrate_orig = convrate;
2580 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
2582 data->update_interval = 500;
2586 * Start the conversions.
2588 config = lm90_read_reg(client, LM90_REG_CONFIG1);
2591 data->config_orig = config;
2592 data->config = config;
2594 /* Check Temperature Range Select */
2595 if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
2596 if (of_property_read_bool(np, "ti,extended-range-enable"))
2598 if (!(config & 0x04))
2599 data->flags &= ~LM90_HAVE_EXTENDED_TEMP;
2603 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
2604 * 0.125 degree resolution) and range (0x08, extend range
2605 * to -64 degree) mode for the remote temperature sensor.
2606 * Note that expeciments with an actual chip do not show a difference
2607 * if bit 3 is set or not.
2609 if (data->kind == max6680)
2613 * Put MAX6654 into extended range (0x20, extend minimum range from
2614 * 0 degrees to -64 degrees). Note that extended resolution is not
2615 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
2616 * slower, which is intentionally not done by default.
2618 if (data->kind == max6654)
2622 * Select external channel 0 for devices with three sensors
2624 if (data->flags & LM90_HAVE_TEMP3)
2628 * Interrupt is enabled by default on reset, but it may be disabled
2629 * by bootloader, unmask it.
2634 config &= 0xBF; /* run */
2635 lm90_update_confreg(data, config);
2637 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
2640 static bool lm90_is_tripped(struct i2c_client *client)
2642 struct lm90_data *data = i2c_get_clientdata(client);
2645 ret = lm90_update_alarms(data, true);
2649 return !!data->current_alarms;
2652 static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
2654 struct i2c_client *client = dev_id;
2656 if (lm90_is_tripped(client))
2662 static void lm90_remove_pec(void *dev)
2664 device_remove_file(dev, &dev_attr_pec);
2667 static int lm90_probe_channel_from_dt(struct i2c_client *client,
2668 struct device_node *child,
2669 struct lm90_data *data)
2674 struct device *dev = &client->dev;
2676 err = of_property_read_u32(child, "reg", &id);
2678 dev_err(dev, "missing reg property of %pOFn\n", child);
2682 if (id >= MAX_CHANNELS) {
2683 dev_err(dev, "invalid reg property value %d in %pOFn\n", id, child);
2687 err = of_property_read_string(child, "label", &data->channel_label[id]);
2688 if (err == -ENODATA || err == -EILSEQ) {
2689 dev_err(dev, "invalid label property in %pOFn\n", child);
2693 if (data->channel_label[id])
2694 data->channel_config[id] |= HWMON_T_LABEL;
2696 err = of_property_read_s32(child, "temperature-offset-millicelsius", &val);
2699 dev_err(dev, "temperature-offset-millicelsius can't be set for internal channel\n");
2703 err = lm90_set_temp_offset(data, lm90_temp_offset_index[id], id, val);
2705 dev_err(dev, "can't set temperature offset %d for channel %d (%d)\n",
2714 static int lm90_parse_dt_channel_info(struct i2c_client *client,
2715 struct lm90_data *data)
2718 struct device_node *child;
2719 struct device *dev = &client->dev;
2720 const struct device_node *np = dev->of_node;
2722 for_each_child_of_node(np, child) {
2723 if (strcmp(child->name, "channel"))
2726 err = lm90_probe_channel_from_dt(client, child, data);
2736 static const struct hwmon_ops lm90_ops = {
2737 .is_visible = lm90_is_visible,
2739 .read_string = lm90_read_string,
2740 .write = lm90_write,
2743 static int lm90_probe(struct i2c_client *client)
2745 struct device *dev = &client->dev;
2746 struct i2c_adapter *adapter = client->adapter;
2747 struct hwmon_channel_info *info;
2748 struct device *hwmon_dev;
2749 struct lm90_data *data;
2752 err = devm_regulator_get_enable(dev, "vcc");
2754 return dev_err_probe(dev, err, "Failed to enable regulator\n");
2756 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
2760 data->client = client;
2761 i2c_set_clientdata(client, data);
2762 mutex_init(&data->update_lock);
2763 INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work);
2764 INIT_WORK(&data->report_work, lm90_report_alarms);
2766 /* Set the device type */
2767 if (client->dev.of_node)
2768 data->kind = (enum chips)of_device_get_match_data(&client->dev);
2770 data->kind = i2c_match_id(lm90_id, client)->driver_data;
2773 * Different devices have different alarm bits triggering the
2776 data->alert_alarms = lm90_params[data->kind].alert_alarms;
2777 data->resolution = lm90_params[data->kind].resolution ? : 11;
2779 /* Set chip capabilities */
2780 data->flags = lm90_params[data->kind].flags;
2782 if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) &&
2783 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC))
2784 data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC);
2786 if ((data->flags & LM90_HAVE_PARTIAL_PEC) &&
2787 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
2788 data->flags &= ~LM90_HAVE_PARTIAL_PEC;
2790 data->chip.ops = &lm90_ops;
2791 data->chip.info = data->info;
2793 data->info[0] = &data->chip_info;
2794 info = &data->chip_info;
2795 info->type = hwmon_chip;
2796 info->config = data->chip_config;
2798 data->chip_config[0] = HWMON_C_REGISTER_TZ;
2799 if (data->flags & LM90_HAVE_ALARMS)
2800 data->chip_config[0] |= HWMON_C_ALARMS;
2801 if (data->flags & LM90_HAVE_CONVRATE)
2802 data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL;
2803 if (data->flags & LM90_HAVE_FAULTQUEUE)
2804 data->chip_config[0] |= HWMON_C_TEMP_SAMPLES;
2805 data->info[1] = &data->temp_info;
2807 info = &data->temp_info;
2808 info->type = hwmon_temp;
2809 info->config = data->channel_config;
2811 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX |
2813 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX |
2814 HWMON_T_MAX_ALARM | HWMON_T_FAULT;
2816 if (data->flags & LM90_HAVE_LOW) {
2817 data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2818 data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2821 if (data->flags & LM90_HAVE_CRIT) {
2822 data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2823 data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2826 if (data->flags & LM90_HAVE_OFFSET)
2827 data->channel_config[1] |= HWMON_T_OFFSET;
2829 if (data->flags & LM90_HAVE_EMERGENCY) {
2830 data->channel_config[0] |= HWMON_T_EMERGENCY |
2831 HWMON_T_EMERGENCY_HYST;
2832 data->channel_config[1] |= HWMON_T_EMERGENCY |
2833 HWMON_T_EMERGENCY_HYST;
2836 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
2837 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
2838 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
2841 if (data->flags & LM90_HAVE_TEMP3) {
2842 data->channel_config[2] = HWMON_T_INPUT |
2843 HWMON_T_MIN | HWMON_T_MAX |
2844 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
2845 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
2846 HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
2847 if (data->flags & LM90_HAVE_EMERGENCY) {
2848 data->channel_config[2] |= HWMON_T_EMERGENCY |
2849 HWMON_T_EMERGENCY_HYST;
2851 if (data->flags & LM90_HAVE_EMERGENCY_ALARM)
2852 data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM;
2853 if (data->flags & LM90_HAVE_OFFSET)
2854 data->channel_config[2] |= HWMON_T_OFFSET;
2857 data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask;
2858 data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth;
2859 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
2860 if (data->flags & LM90_HAVE_REMOTE_EXT)
2861 data->reg_remote_ext = LM90_REG_REMOTE_TEMPL;
2862 data->reg_status2 = lm90_params[data->kind].reg_status2;
2864 /* Set maximum conversion rate */
2865 data->max_convrate = lm90_params[data->kind].max_convrate;
2867 /* Parse device-tree channel information */
2868 if (client->dev.of_node) {
2869 err = lm90_parse_dt_channel_info(client, data);
2874 /* Initialize the LM90 chip */
2875 err = lm90_init_client(client, data);
2877 dev_err(dev, "Failed to initialize device\n");
2882 * The 'pec' attribute is attached to the i2c device and thus created
2885 if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) {
2886 err = device_create_file(dev, &dev_attr_pec);
2889 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
2894 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
2897 if (IS_ERR(hwmon_dev))
2898 return PTR_ERR(hwmon_dev);
2900 data->hwmon_dev = hwmon_dev;
2903 dev_dbg(dev, "IRQ: %d\n", client->irq);
2904 err = devm_request_threaded_irq(dev, client->irq,
2905 NULL, lm90_irq_thread,
2906 IRQF_ONESHOT, "lm90", client);
2908 dev_err(dev, "cannot request IRQ %d\n", client->irq);
2916 static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
2919 if (type != I2C_PROTOCOL_SMBUS_ALERT)
2922 if (lm90_is_tripped(client)) {
2924 * Disable ALERT# output, because these chips don't implement
2925 * SMBus alert correctly; they should only hold the alert line
2928 struct lm90_data *data = i2c_get_clientdata(client);
2930 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
2931 (data->current_alarms & data->alert_alarms)) {
2932 if (!(data->config & 0x80)) {
2933 dev_dbg(&client->dev, "Disabling ALERT#\n");
2934 lm90_update_confreg(data, data->config | 0x80);
2936 schedule_delayed_work(&data->alert_work,
2937 max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
2940 dev_dbg(&client->dev, "Everything OK\n");
2944 static int lm90_suspend(struct device *dev)
2946 struct lm90_data *data = dev_get_drvdata(dev);
2947 struct i2c_client *client = data->client;
2950 disable_irq(client->irq);
2955 static int lm90_resume(struct device *dev)
2957 struct lm90_data *data = dev_get_drvdata(dev);
2958 struct i2c_client *client = data->client;
2961 enable_irq(client->irq);
2966 static DEFINE_SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
2968 static struct i2c_driver lm90_driver = {
2969 .class = I2C_CLASS_HWMON,
2972 .of_match_table = of_match_ptr(lm90_of_match),
2973 .pm = pm_sleep_ptr(&lm90_pm_ops),
2975 .probe = lm90_probe,
2976 .alert = lm90_alert,
2977 .id_table = lm90_id,
2978 .detect = lm90_detect,
2979 .address_list = normal_i2c,
2982 module_i2c_driver(lm90_driver);
2984 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
2985 MODULE_DESCRIPTION("LM90/ADM1032 driver");
2986 MODULE_LICENSE("GPL");