drivers/hwmon/it87.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   4  *           monitoring.
   5  *
   6  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   7  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   8  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   9  *  Fan Controller)
  10  *
  11  *  This driver supports only the Environment Controller in the IT8705F and
  12  *  similar parts.  The other devices are supported by different drivers.
  13  *
  14  *  Supports: IT8603E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8705F  Super I/O chip w/LPC interface
  20  *            IT8712F  Super I/O chip w/LPC interface
  21  *            IT8716F  Super I/O chip w/LPC interface
  22  *            IT8718F  Super I/O chip w/LPC interface
  23  *            IT8720F  Super I/O chip w/LPC interface
  24  *            IT8721F  Super I/O chip w/LPC interface
  25  *            IT8726F  Super I/O chip w/LPC interface
  26  *            IT8728F  Super I/O chip w/LPC interface
  27  *            IT8732F  Super I/O chip w/LPC interface
  28  *            IT8758E  Super I/O chip w/LPC interface
  29  *            IT8771E  Super I/O chip w/LPC interface
  30  *            IT8772E  Super I/O chip w/LPC interface
  31  *            IT8781F  Super I/O chip w/LPC interface
  32  *            IT8782F  Super I/O chip w/LPC interface
  33  *            IT8783E/F Super I/O chip w/LPC interface
  34  *            IT8786E  Super I/O chip w/LPC interface
  35  *            IT8790E  Super I/O chip w/LPC interface
  36  *            IT8792E  Super I/O chip w/LPC interface
  37  *            IT87952E  Super I/O chip w/LPC interface
  38  *            Sis950   A clone of the IT8705F
  39  *
  40  *  Copyright (C) 2001 Chris Gauthron
  41  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  42  */
  43
  44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  45
  46 #include <linux/bitops.h>
  47 #include <linux/module.h>
  48 #include <linux/init.h>
  49 #include <linux/slab.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/platform_device.h>
  52 #include <linux/hwmon.h>
  53 #include <linux/hwmon-sysfs.h>
  54 #include <linux/hwmon-vid.h>
  55 #include <linux/err.h>
  56 #include <linux/mutex.h>
  57 #include <linux/sysfs.h>
  58 #include <linux/string.h>
  59 #include <linux/dmi.h>
  60 #include <linux/acpi.h>
  61 #include <linux/io.h>
  62
  63 #define DRVNAME "it87"
  64
  65 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  66              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  67              it8792, it8603, it8620, it8622, it8628, it87952 };
  68
  69 static struct platform_device *it87_pdev[2];
  70
  71 #define REG_2E  0x2e    /* The register to read/write */
  72 #define REG_4E  0x4e    /* Secondary register to read/write */
  73
  74 #define DEV     0x07    /* Register: Logical device select */
  75 #define PME     0x04    /* The device with the fan registers in it */
  76
  77 /* The device with the IT8718F/IT8720F VID value in it */
  78 #define GPIO    0x07
  79
  80 #define DEVID   0x20    /* Register: Device ID */
  81 #define DEVREV  0x22    /* Register: Device Revision */
  82
  83 static inline void __superio_enter(int ioreg)
  84 {
  85         outb(0x87, ioreg);
  86         outb(0x01, ioreg);
  87         outb(0x55, ioreg);
  88         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
  89 }
  90
  91 static inline int superio_inb(int ioreg, int reg)
  92 {
  93         outb(reg, ioreg);
  94         return inb(ioreg + 1);
  95 }
  96
  97 static inline void superio_outb(int ioreg, int reg, int val)
  98 {
  99         outb(reg, ioreg);
 100         outb(val, ioreg + 1);
 101 }
 102
 103 static int superio_inw(int ioreg, int reg)
 104 {
 105         int val;
 106
 107         outb(reg++, ioreg);
 108         val = inb(ioreg + 1) << 8;
 109         outb(reg, ioreg);
 110         val |= inb(ioreg + 1);
 111         return val;
 112 }
 113
 114 static inline void superio_select(int ioreg, int ldn)
 115 {
 116         outb(DEV, ioreg);
 117         outb(ldn, ioreg + 1);
 118 }
 119
 120 static inline int superio_enter(int ioreg)
 121 {
 122         /*
 123          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 124          */
 125         if (!request_muxed_region(ioreg, 2, DRVNAME))
 126                 return -EBUSY;
 127
 128         __superio_enter(ioreg);
 129         return 0;
 130 }
 131
 132 static inline void superio_exit(int ioreg, bool noexit)
 133 {
 134         if (!noexit) {
 135                 outb(0x02, ioreg);
 136                 outb(0x02, ioreg + 1);
 137         }
 138         release_region(ioreg, 2);
 139 }
 140
 141 /* Logical device 4 registers */
 142 #define IT8712F_DEVID 0x8712
 143 #define IT8705F_DEVID 0x8705
 144 #define IT8716F_DEVID 0x8716
 145 #define IT8718F_DEVID 0x8718
 146 #define IT8720F_DEVID 0x8720
 147 #define IT8721F_DEVID 0x8721
 148 #define IT8726F_DEVID 0x8726
 149 #define IT8728F_DEVID 0x8728
 150 #define IT8732F_DEVID 0x8732
 151 #define IT8792E_DEVID 0x8733
 152 #define IT8771E_DEVID 0x8771
 153 #define IT8772E_DEVID 0x8772
 154 #define IT8781F_DEVID 0x8781
 155 #define IT8782F_DEVID 0x8782
 156 #define IT8783E_DEVID 0x8783
 157 #define IT8786E_DEVID 0x8786
 158 #define IT8790E_DEVID 0x8790
 159 #define IT8603E_DEVID 0x8603
 160 #define IT8620E_DEVID 0x8620
 161 #define IT8622E_DEVID 0x8622
 162 #define IT8623E_DEVID 0x8623
 163 #define IT8628E_DEVID 0x8628
 164 #define IT87952E_DEVID 0x8695
 165
 166 /* Logical device 4 (Environmental Monitor) registers */
 167 #define IT87_ACT_REG    0x30
 168 #define IT87_BASE_REG   0x60
 169 #define IT87_SPECIAL_CFG_REG    0xf3    /* special configuration register */
 170
 171 /* Logical device 7 registers (IT8712F and later) */
 172 #define IT87_SIO_GPIO1_REG      0x25
 173 #define IT87_SIO_GPIO2_REG      0x26
 174 #define IT87_SIO_GPIO3_REG      0x27
 175 #define IT87_SIO_GPIO4_REG      0x28
 176 #define IT87_SIO_GPIO5_REG      0x29
 177 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 178 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 179 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 180 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 181 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 182
 183 /* Force chip IDs to specified values. Should only be used for testing */
 184 static unsigned short force_id[2];
 185 static unsigned int force_id_cnt;
 186
 187 /* ACPI resource conflicts are ignored if this parameter is set to 1 */
 188 static bool ignore_resource_conflict;
 189
 190 /* Update battery voltage after every reading if true */
 191 static bool update_vbat;
 192
 193 /* Not all BIOSes properly configure the PWM registers */
 194 static bool fix_pwm_polarity;
 195
 196 /* Many IT87 constants specified below */
 197
 198 /* Length of ISA address segment */
 199 #define IT87_EXTENT 8
 200
 201 /* Length of ISA address segment for Environmental Controller */
 202 #define IT87_EC_EXTENT 2
 203
 204 /* Offset of EC registers from ISA base address */
 205 #define IT87_EC_OFFSET 5
 206
 207 /* Where are the ISA address/data registers relative to the EC base address */
 208 #define IT87_ADDR_REG_OFFSET 0
 209 #define IT87_DATA_REG_OFFSET 1
 210
 211 /*----- The IT87 registers -----*/
 212
 213 #define IT87_REG_CONFIG        0x00
 214
 215 #define IT87_REG_ALARM1        0x01
 216 #define IT87_REG_ALARM2        0x02
 217 #define IT87_REG_ALARM3        0x03
 218
 219 /*
 220  * The IT8718F and IT8720F have the VID value in a different register, in
 221  * Super-I/O configuration space.
 222  */
 223 #define IT87_REG_VID           0x0a
 224
 225 /* Interface Selection register on other chips */
 226 #define IT87_REG_IFSEL         0x0a
 227
 228 /*
 229  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 230  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 231  * mode.
 232  */
 233 #define IT87_REG_FAN_DIV       0x0b
 234 #define IT87_REG_FAN_16BIT     0x0c
 235
 236 /*
 237  * Monitors:
 238  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 239  * - up to 6 temp (1 to 6)
 240  * - up to 6 fan (1 to 6)
 241  */
 242
 243 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 244 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 245 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 246 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 247 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 248
 249 #define IT87_REG_FAN_MAIN_CTRL 0x13
 250 #define IT87_REG_FAN_CTL       0x14
 251 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 252 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 253
 254 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 255                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 256
 257 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 258
 259 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 260 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 261 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 262 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 263
 264 #define IT87_REG_VIN_ENABLE    0x50
 265 #define IT87_REG_TEMP_ENABLE   0x51
 266 #define IT87_REG_TEMP_EXTRA    0x55
 267 #define IT87_REG_BEEP_ENABLE   0x5c
 268
 269 #define IT87_REG_CHIPID        0x58
 270
 271 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 272
 273 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 274 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 275
 276 #define IT87_REG_TEMP456_ENABLE 0x77
 277
 278 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 279 #define NUM_VIN_LIMIT           8
 280 #define NUM_TEMP                6
 281 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 282 #define NUM_TEMP_LIMIT          3
 283 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 284 #define NUM_FAN_DIV             3
 285 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 286 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 287
 288 struct it87_devices {
 289         const char *name;
 290         const char * const model;
 291         u32 features;
 292         u8 peci_mask;
 293         u8 old_peci_mask;
 294         u8 smbus_bitmap;        /* SMBus enable bits in extra config register */
 295         u8 ec_special_config;
 296 };
 297
 298 #define FEAT_12MV_ADC           BIT(0)
 299 #define FEAT_NEWER_AUTOPWM      BIT(1)
 300 #define FEAT_OLD_AUTOPWM        BIT(2)
 301 #define FEAT_16BIT_FANS         BIT(3)
 302 #define FEAT_TEMP_OFFSET        BIT(4)
 303 #define FEAT_TEMP_PECI          BIT(5)
 304 #define FEAT_TEMP_OLD_PECI      BIT(6)
 305 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 306 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 307 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 308 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 309 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 310 #define FEAT_10_9MV_ADC         BIT(12)
 311 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 312 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 313 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 314 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 315 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 316 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 317 /*
 318  * Disabling configuration mode on some chips can result in system
 319  * hang-ups and access failures to the Super-IO chip at the
 320  * second SIO address. Never exit configuration mode on these
 321  * chips to avoid the problem.
 322  */
 323 #define FEAT_CONF_NOEXIT        BIT(19) /* Chip should not exit conf mode */
 324 #define FEAT_FOUR_FANS          BIT(20) /* Supports four fans */
 325 #define FEAT_FOUR_PWM           BIT(21) /* Supports four fan controls */
 326 #define FEAT_FOUR_TEMP          BIT(22)
 327 #define FEAT_FANCTL_ONOFF       BIT(23) /* chip has FAN_CTL ON/OFF */
 328
 329 static const struct it87_devices it87_devices[] = {
 330         [it87] = {
 331                 .name = "it87",
 332                 .model = "IT87F",
 333                 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
 334                 /* may need to overwrite */
 335         },
 336         [it8712] = {
 337                 .name = "it8712",
 338                 .model = "IT8712F",
 339                 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
 340                 /* may need to overwrite */
 341         },
 342         [it8716] = {
 343                 .name = "it8716",
 344                 .model = "IT8716F",
 345                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 346                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
 347                   | FEAT_FANCTL_ONOFF,
 348         },
 349         [it8718] = {
 350                 .name = "it8718",
 351                 .model = "IT8718F",
 352                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 353                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 354                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 355                 .old_peci_mask = 0x4,
 356         },
 357         [it8720] = {
 358                 .name = "it8720",
 359                 .model = "IT8720F",
 360                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 361                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 362                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 363                 .old_peci_mask = 0x4,
 364         },
 365         [it8721] = {
 366                 .name = "it8721",
 367                 .model = "IT8721F",
 368                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 369                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 370                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 371                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 372                 .peci_mask = 0x05,
 373                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 374         },
 375         [it8728] = {
 376                 .name = "it8728",
 377                 .model = "IT8728F",
 378                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 379                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 380                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 381                   | FEAT_FANCTL_ONOFF,
 382                 .peci_mask = 0x07,
 383         },
 384         [it8732] = {
 385                 .name = "it8732",
 386                 .model = "IT8732F",
 387                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 388                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 389                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
 390                   | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
 391                 .peci_mask = 0x07,
 392                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 393         },
 394         [it8771] = {
 395                 .name = "it8771",
 396                 .model = "IT8771E",
 397                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 398                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 399                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 400                                 /* PECI: guesswork */
 401                                 /* 12mV ADC (OHM) */
 402                                 /* 16 bit fans (OHM) */
 403                                 /* three fans, always 16 bit (guesswork) */
 404                 .peci_mask = 0x07,
 405         },
 406         [it8772] = {
 407                 .name = "it8772",
 408                 .model = "IT8772E",
 409                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 410                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 411                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 412                                 /* PECI (coreboot) */
 413                                 /* 12mV ADC (HWSensors4, OHM) */
 414                                 /* 16 bit fans (HWSensors4, OHM) */
 415                                 /* three fans, always 16 bit (datasheet) */
 416                 .peci_mask = 0x07,
 417         },
 418         [it8781] = {
 419                 .name = "it8781",
 420                 .model = "IT8781F",
 421                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 422                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 423                   | FEAT_FANCTL_ONOFF,
 424                 .old_peci_mask = 0x4,
 425         },
 426         [it8782] = {
 427                 .name = "it8782",
 428                 .model = "IT8782F",
 429                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 430                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 431                   | FEAT_FANCTL_ONOFF,
 432                 .old_peci_mask = 0x4,
 433         },
 434         [it8783] = {
 435                 .name = "it8783",
 436                 .model = "IT8783E/F",
 437                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 438                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
 439                   | FEAT_FANCTL_ONOFF,
 440                 .old_peci_mask = 0x4,
 441         },
 442         [it8786] = {
 443                 .name = "it8786",
 444                 .model = "IT8786E",
 445                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 446                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 447                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
 448                 .peci_mask = 0x07,
 449         },
 450         [it8790] = {
 451                 .name = "it8790",
 452                 .model = "IT8790E",
 453                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 454                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 455                   | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF | FEAT_CONF_NOEXIT,
 456                 .peci_mask = 0x07,
 457         },
 458         [it8792] = {
 459                 .name = "it8792",
 460                 .model = "IT8792E/IT8795E",
 461                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 462                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 463                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF
 464                   | FEAT_CONF_NOEXIT,
 465                 .peci_mask = 0x07,
 466                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 467         },
 468         [it8603] = {
 469                 .name = "it8603",
 470                 .model = "IT8603E",
 471                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 472                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 473                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 474                 .peci_mask = 0x07,
 475         },
 476         [it8620] = {
 477                 .name = "it8620",
 478                 .model = "IT8620E",
 479                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 480                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 481                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 482                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF,
 483                 .peci_mask = 0x07,
 484         },
 485         [it8622] = {
 486                 .name = "it8622",
 487                 .model = "IT8622E",
 488                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 489                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 490                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 491                   | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_FOUR_TEMP,
 492                 .peci_mask = 0x07,
 493                 .smbus_bitmap = BIT(1) | BIT(2),
 494         },
 495         [it8628] = {
 496                 .name = "it8628",
 497                 .model = "IT8628E",
 498                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 499                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 500                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 501                   | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF,
 502                 .peci_mask = 0x07,
 503         },
 504         [it87952] = {
 505                 .name = "it87952",
 506                 .model = "IT87952E",
 507                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 508                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 509                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF
 510                   | FEAT_CONF_NOEXIT,
 511                 .peci_mask = 0x07,
 512                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 513         },
 514 };
 515
 516 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 517 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 518 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 519 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 520 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 521 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 522 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 523                                  ((data)->peci_mask & BIT(nr)))
 524 #define has_temp_old_peci(data, nr) \
 525                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 526                                  ((data)->old_peci_mask & BIT(nr)))
 527 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 528 #define has_four_fans(data)     ((data)->features & (FEAT_FOUR_FANS | \
 529                                                      FEAT_FIVE_FANS | \
 530                                                      FEAT_SIX_FANS))
 531 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 532                                                      FEAT_SIX_FANS))
 533 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 534 #define has_vid(data)           ((data)->features & FEAT_VID)
 535 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 536 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 537 #define has_four_pwm(data)      ((data)->features & (FEAT_FOUR_PWM | \
 538                                                      FEAT_FIVE_PWM | \
 539                                                      FEAT_SIX_PWM))
 540 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM | \
 541                                                      FEAT_SIX_PWM))
 542 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 543 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 544 #define has_four_temp(data)     ((data)->features & FEAT_FOUR_TEMP)
 545 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 546 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 547 #define has_conf_noexit(data)   ((data)->features & FEAT_CONF_NOEXIT)
 548 #define has_scaling(data)       ((data)->features & (FEAT_12MV_ADC | \
 549                                                      FEAT_10_9MV_ADC))
 550 #define has_fanctl_onoff(data)  ((data)->features & FEAT_FANCTL_ONOFF)
 551
 552 struct it87_sio_data {
 553         int sioaddr;
 554         enum chips type;
 555         /* Values read from Super-I/O config space */
 556         u8 revision;
 557         u8 vid_value;
 558         u8 beep_pin;
 559         u8 internal;    /* Internal sensors can be labeled */
 560         bool need_in7_reroute;
 561         /* Features skipped based on config or DMI */
 562         u16 skip_in;
 563         u8 skip_vid;
 564         u8 skip_fan;
 565         u8 skip_pwm;
 566         u8 skip_temp;
 567         u8 smbus_bitmap;
 568         u8 ec_special_config;
 569 };
 570
 571 /*
 572  * For each registered chip, we need to keep some data in memory.
 573  * The structure is dynamically allocated.
 574  */
 575 struct it87_data {
 576         const struct attribute_group *groups[7];
 577         int sioaddr;
 578         enum chips type;
 579         u32 features;
 580         u8 peci_mask;
 581         u8 old_peci_mask;
 582
 583         u8 smbus_bitmap;        /* !=0 if SMBus needs to be disabled */
 584         u8 ec_special_config;   /* EC special config register restore value */
 585
 586         unsigned short addr;
 587         const char *name;
 588         struct mutex update_lock;
 589         bool valid;             /* true if following fields are valid */
 590         unsigned long last_updated;     /* In jiffies */
 591
 592         u16 in_scaled;          /* Internal voltage sensors are scaled */
 593         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 594         u16 has_in;             /* Bitfield, voltage sensors enabled */
 595         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 596         bool need_in7_reroute;
 597         u8 has_fan;             /* Bitfield, fans enabled */
 598         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 599         u8 has_temp;            /* Bitfield, temp sensors enabled */
 600         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 601         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 602         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 603         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 604         bool has_vid;           /* True if VID supported */
 605         u8 vid;                 /* Register encoding, combined */
 606         u8 vrm;
 607         u32 alarms;             /* Register encoding, combined */
 608         bool has_beep;          /* true if beep supported */
 609         u8 beeps;               /* Register encoding */
 610         u8 fan_main_ctrl;       /* Register value */
 611         u8 fan_ctl;             /* Register value */
 612
 613         /*
 614          * The following 3 arrays correspond to the same registers up to
 615          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 616          * 7, and we want to preserve settings on mode changes, so we have
 617          * to track all values separately.
 618          * Starting with the IT8721F, the manual PWM duty cycles are stored
 619          * in separate registers (8-bit values), so the separate tracking
 620          * is no longer needed, but it is still done to keep the driver
 621          * simple.
 622          */
 623         u8 has_pwm;             /* Bitfield, pwm control enabled */
 624         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 625         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 626         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 627
 628         /* Automatic fan speed control registers */
 629         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 630         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 631 };
 632
 633 /* Board specific settings from DMI matching */
 634 struct it87_dmi_data {
 635         u8 skip_pwm;            /* pwm channels to skip for this board  */
 636 };
 637
 638 /* Global for results from DMI matching, if needed */
 639 static struct it87_dmi_data *dmi_data;
 640
 641 static int adc_lsb(const struct it87_data *data, int nr)
 642 {
 643         int lsb;
 644
 645         if (has_12mv_adc(data))
 646                 lsb = 120;
 647         else if (has_10_9mv_adc(data))
 648                 lsb = 109;
 649         else
 650                 lsb = 160;
 651         if (data->in_scaled & BIT(nr))
 652                 lsb <<= 1;
 653         return lsb;
 654 }
 655
 656 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 657 {
 658         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 659         return clamp_val(val, 0, 255);
 660 }
 661
 662 static int in_from_reg(const struct it87_data *data, int nr, int val)
 663 {
 664         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 665 }
 666
 667 static inline u8 FAN_TO_REG(long rpm, int div)
 668 {
 669         if (rpm == 0)
 670                 return 255;
 671         rpm = clamp_val(rpm, 1, 1000000);
 672         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 673 }
 674
 675 static inline u16 FAN16_TO_REG(long rpm)
 676 {
 677         if (rpm == 0)
 678                 return 0xffff;
 679         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 680 }
 681
 682 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 683                                 1350000 / ((val) * (div)))
 684 /* The divider is fixed to 2 in 16-bit mode */
 685 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 686                              1350000 / ((val) * 2))
 687
 688 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 689                                     ((val) + 500) / 1000), -128, 127))
 690 #define TEMP_FROM_REG(val) ((val) * 1000)
 691
 692 static u8 pwm_to_reg(const struct it87_data *data, long val)
 693 {
 694         if (has_newer_autopwm(data))
 695                 return val;
 696         else
 697                 return val >> 1;
 698 }
 699
 700 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 701 {
 702         if (has_newer_autopwm(data))
 703                 return reg;
 704         else
 705                 return (reg & 0x7f) << 1;
 706 }
 707
 708 static int DIV_TO_REG(int val)
 709 {
 710         int answer = 0;
 711
 712         while (answer < 7 && (val >>= 1))
 713                 answer++;
 714         return answer;
 715 }
 716
 717 #define DIV_FROM_REG(val) BIT(val)
 718
 719 /*
 720  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 721  * depending on the chip type, to calculate the actual PWM frequency.
 722  *
 723  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 724  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 725  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 726  * sometimes just one. It is unknown if this is a datasheet error or real,
 727  * so this is ignored for now.
 728  */
 729 static const unsigned int pwm_freq[8] = {
 730         48000000,
 731         24000000,
 732         12000000,
 733         8000000,
 734         6000000,
 735         3000000,
 736         1500000,
 737         750000,
 738 };
 739
 740 static int smbus_disable(struct it87_data *data)
 741 {
 742         int err;
 743
 744         if (data->smbus_bitmap) {
 745                 err = superio_enter(data->sioaddr);
 746                 if (err)
 747                         return err;
 748                 superio_select(data->sioaddr, PME);
 749                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 750                              data->ec_special_config & ~data->smbus_bitmap);
 751                 superio_exit(data->sioaddr, has_conf_noexit(data));
 752         }
 753         return 0;
 754 }
 755
 756 static int smbus_enable(struct it87_data *data)
 757 {
 758         int err;
 759
 760         if (data->smbus_bitmap) {
 761                 err = superio_enter(data->sioaddr);
 762                 if (err)
 763                         return err;
 764
 765                 superio_select(data->sioaddr, PME);
 766                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 767                              data->ec_special_config);
 768                 superio_exit(data->sioaddr, has_conf_noexit(data));
 769         }
 770         return 0;
 771 }
 772
 773 /*
 774  * Must be called with data->update_lock held, except during initialization.
 775  * Must be called with SMBus accesses disabled.
 776  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 777  * would slow down the IT87 access and should not be necessary.
 778  */
 779 static int it87_read_value(struct it87_data *data, u8 reg)
 780 {
 781         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 782         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 783 }
 784
 785 /*
 786  * Must be called with data->update_lock held, except during initialization.
 787  * Must be called with SMBus accesses disabled.
 788  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 789  * would slow down the IT87 access and should not be necessary.
 790  */
 791 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 792 {
 793         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 794         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 795 }
 796
 797 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 798 {
 799         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 800         if (has_newer_autopwm(data)) {
 801                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 802                 data->pwm_duty[nr] = it87_read_value(data,
 803                                                      IT87_REG_PWM_DUTY[nr]);
 804         } else {
 805                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 806                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 807                 else                            /* Manual mode */
 808                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 809         }
 810
 811         if (has_old_autopwm(data)) {
 812                 int i;
 813
 814                 for (i = 0; i < 5 ; i++)
 815                         data->auto_temp[nr][i] = it87_read_value(data,
 816                                                 IT87_REG_AUTO_TEMP(nr, i));
 817                 for (i = 0; i < 3 ; i++)
 818                         data->auto_pwm[nr][i] = it87_read_value(data,
 819                                                 IT87_REG_AUTO_PWM(nr, i));
 820         } else if (has_newer_autopwm(data)) {
 821                 int i;
 822
 823                 /*
 824                  * 0: temperature hysteresis (base + 5)
 825                  * 1: fan off temperature (base + 0)
 826                  * 2: fan start temperature (base + 1)
 827                  * 3: fan max temperature (base + 2)
 828                  */
 829                 data->auto_temp[nr][0] =
 830                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 831
 832                 for (i = 0; i < 3 ; i++)
 833                         data->auto_temp[nr][i + 1] =
 834                                 it87_read_value(data,
 835                                                 IT87_REG_AUTO_TEMP(nr, i));
 836                 /*
 837                  * 0: start pwm value (base + 3)
 838                  * 1: pwm slope (base + 4, 1/8th pwm)
 839                  */
 840                 data->auto_pwm[nr][0] =
 841                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 842                 data->auto_pwm[nr][1] =
 843                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 844         }
 845 }
 846
 847 static int it87_lock(struct it87_data *data)
 848 {
 849         int err;
 850
 851         mutex_lock(&data->update_lock);
 852         err = smbus_disable(data);
 853         if (err)
 854                 mutex_unlock(&data->update_lock);
 855         return err;
 856 }
 857
 858 static void it87_unlock(struct it87_data *data)
 859 {
 860         smbus_enable(data);
 861         mutex_unlock(&data->update_lock);
 862 }
 863
 864 static struct it87_data *it87_update_device(struct device *dev)
 865 {
 866         struct it87_data *data = dev_get_drvdata(dev);
 867         struct it87_data *ret = data;
 868         int err;
 869         int i;
 870
 871         mutex_lock(&data->update_lock);
 872
 873         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 874                        !data->valid) {
 875                 err = smbus_disable(data);
 876                 if (err) {
 877                         ret = ERR_PTR(err);
 878                         goto unlock;
 879                 }
 880                 if (update_vbat) {
 881                         /*
 882                          * Cleared after each update, so reenable.  Value
 883                          * returned by this read will be previous value
 884                          */
 885                         it87_write_value(data, IT87_REG_CONFIG,
 886                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 887                 }
 888                 for (i = 0; i < NUM_VIN; i++) {
 889                         if (!(data->has_in & BIT(i)))
 890                                 continue;
 891
 892                         data->in[i][0] =
 893                                 it87_read_value(data, IT87_REG_VIN[i]);
 894
 895                         /* VBAT and AVCC don't have limit registers */
 896                         if (i >= NUM_VIN_LIMIT)
 897                                 continue;
 898
 899                         data->in[i][1] =
 900                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 901                         data->in[i][2] =
 902                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 903                 }
 904
 905                 for (i = 0; i < NUM_FAN; i++) {
 906                         /* Skip disabled fans */
 907                         if (!(data->has_fan & BIT(i)))
 908                                 continue;
 909
 910                         data->fan[i][1] =
 911                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 912                         data->fan[i][0] = it87_read_value(data,
 913                                        IT87_REG_FAN[i]);
 914                         /* Add high byte if in 16-bit mode */
 915                         if (has_16bit_fans(data)) {
 916                                 data->fan[i][0] |= it87_read_value(data,
 917                                                 IT87_REG_FANX[i]) << 8;
 918                                 data->fan[i][1] |= it87_read_value(data,
 919                                                 IT87_REG_FANX_MIN[i]) << 8;
 920                         }
 921                 }
 922                 for (i = 0; i < NUM_TEMP; i++) {
 923                         if (!(data->has_temp & BIT(i)))
 924                                 continue;
 925                         data->temp[i][0] =
 926                                 it87_read_value(data, IT87_REG_TEMP(i));
 927
 928                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 929                                 data->temp[i][3] =
 930                                   it87_read_value(data,
 931                                                   IT87_REG_TEMP_OFFSET[i]);
 932
 933                         if (i >= NUM_TEMP_LIMIT)
 934                                 continue;
 935
 936                         data->temp[i][1] =
 937                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 938                         data->temp[i][2] =
 939                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 940                 }
 941
 942                 /* Newer chips don't have clock dividers */
 943                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 944                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 945                         data->fan_div[0] = i & 0x07;
 946                         data->fan_div[1] = (i >> 3) & 0x07;
 947                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 948                 }
 949
 950                 data->alarms =
 951                         it87_read_value(data, IT87_REG_ALARM1) |
 952                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 953                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 954                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 955
 956                 data->fan_main_ctrl = it87_read_value(data,
 957                                 IT87_REG_FAN_MAIN_CTRL);
 958                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 959                 for (i = 0; i < NUM_PWM; i++) {
 960                         if (!(data->has_pwm & BIT(i)))
 961                                 continue;
 962                         it87_update_pwm_ctrl(data, i);
 963                 }
 964
 965                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 966                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 967                 /*
 968                  * The IT8705F does not have VID capability.
 969                  * The IT8718F and later don't use IT87_REG_VID for the
 970                  * same purpose.
 971                  */
 972                 if (data->type == it8712 || data->type == it8716) {
 973                         data->vid = it87_read_value(data, IT87_REG_VID);
 974                         /*
 975                          * The older IT8712F revisions had only 5 VID pins,
 976                          * but we assume it is always safe to read 6 bits.
 977                          */
 978                         data->vid &= 0x3f;
 979                 }
 980                 data->last_updated = jiffies;
 981                 data->valid = true;
 982                 smbus_enable(data);
 983         }
 984 unlock:
 985         mutex_unlock(&data->update_lock);
 986         return ret;
 987 }
 988
 989 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 990                        char *buf)
 991 {
 992         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 993         struct it87_data *data = it87_update_device(dev);
 994         int index = sattr->index;
 995         int nr = sattr->nr;
 996
 997         if (IS_ERR(data))
 998                 return PTR_ERR(data);
 999
1000         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1001 }
1002
1003 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1004                       const char *buf, size_t count)
1005 {
1006         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1007         struct it87_data *data = dev_get_drvdata(dev);
1008         int index = sattr->index;
1009         int nr = sattr->nr;
1010         unsigned long val;
1011         int err;
1012
1013         if (kstrtoul(buf, 10, &val) < 0)
1014                 return -EINVAL;
1015
1016         err = it87_lock(data);
1017         if (err)
1018                 return err;
1019
1020         data->in[nr][index] = in_to_reg(data, nr, val);
1021         it87_write_value(data,
1022                          index == 1 ? IT87_REG_VIN_MIN(nr)
1023                                     : IT87_REG_VIN_MAX(nr),
1024                          data->in[nr][index]);
1025         it87_unlock(data);
1026         return count;
1027 }
1028
1029 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1030 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1031                             0, 1);
1032 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1033                             0, 2);
1034
1035 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1036 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1037                             1, 1);
1038 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1039                             1, 2);
1040
1041 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1042 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1043                             2, 1);
1044 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1045                             2, 2);
1046
1047 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1048 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1049                             3, 1);
1050 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1051                             3, 2);
1052
1053 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1054 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1055                             4, 1);
1056 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1057                             4, 2);
1058
1059 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1060 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1061                             5, 1);
1062 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1063                             5, 2);
1064
1065 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1066 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1067                             6, 1);
1068 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1069                             6, 2);
1070
1071 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1072 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1073                             7, 1);
1074 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1075                             7, 2);
1076
1077 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1078 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1079 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1080 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1081 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1082
1083 /* Up to 6 temperatures */
1084 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1085                          char *buf)
1086 {
1087         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1088         int nr = sattr->nr;
1089         int index = sattr->index;
1090         struct it87_data *data = it87_update_device(dev);
1091
1092         if (IS_ERR(data))
1093                 return PTR_ERR(data);
1094
1095         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1096 }
1097
1098 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1099                         const char *buf, size_t count)
1100 {
1101         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1102         int nr = sattr->nr;
1103         int index = sattr->index;
1104         struct it87_data *data = dev_get_drvdata(dev);
1105         long val;
1106         u8 reg, regval;
1107         int err;
1108
1109         if (kstrtol(buf, 10, &val) < 0)
1110                 return -EINVAL;
1111
1112         err = it87_lock(data);
1113         if (err)
1114                 return err;
1115
1116         switch (index) {
1117         default:
1118         case 1:
1119                 reg = IT87_REG_TEMP_LOW(nr);
1120                 break;
1121         case 2:
1122                 reg = IT87_REG_TEMP_HIGH(nr);
1123                 break;
1124         case 3:
1125                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1126                 if (!(regval & 0x80)) {
1127                         regval |= 0x80;
1128                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1129                 }
1130                 data->valid = false;
1131                 reg = IT87_REG_TEMP_OFFSET[nr];
1132                 break;
1133         }
1134
1135         data->temp[nr][index] = TEMP_TO_REG(val);
1136         it87_write_value(data, reg, data->temp[nr][index]);
1137         it87_unlock(data);
1138         return count;
1139 }
1140
1141 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1142 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1143                             0, 1);
1144 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1145                             0, 2);
1146 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1147                             set_temp, 0, 3);
1148 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1149 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1150                             1, 1);
1151 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1152                             1, 2);
1153 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1154                             set_temp, 1, 3);
1155 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1156 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1157                             2, 1);
1158 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1159                             2, 2);
1160 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1161                             set_temp, 2, 3);
1162 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1163 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1164 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1165
1166 static int get_temp_type(struct it87_data *data, int index)
1167 {
1168         /*
1169          * 2 is deprecated;
1170          * 3 = thermal diode;
1171          * 4 = thermistor;
1172          * 5 = AMDTSI;
1173          * 6 = Intel PECI;
1174          * 0 = disabled
1175          */
1176         u8 reg, extra;
1177         int ttype, type = 0;
1178
1179         /* Detect PECI vs. AMDTSI */
1180         ttype = 6;
1181         if ((has_temp_peci(data, index)) || data->type == it8721 ||
1182             data->type == it8720) {
1183                 extra = it87_read_value(data, IT87_REG_IFSEL);
1184                 if ((extra & 0x70) == 0x40)
1185                         ttype = 5;
1186         }
1187
1188         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1189
1190         /* Per chip special detection */
1191         switch (data->type) {
1192         case it8622:
1193                 if (!(reg & 0xc0) && index == 3)
1194                         type = ttype;
1195                 break;
1196         default:
1197                 break;
1198         }
1199
1200         if (type || index >= 3)
1201                 return type;
1202
1203         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1204
1205         if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1206             (has_temp_old_peci(data, index) && (extra & 0x80)))
1207                 type = ttype;   /* Intel PECI or AMDTSI */
1208         else if (reg & BIT(index))
1209                 type = 3;       /* thermal diode */
1210         else if (reg & BIT(index + 3))
1211                 type = 4;       /* thermistor */
1212
1213         return type;
1214 }
1215
1216 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1217                               char *buf)
1218 {
1219         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1220         struct it87_data *data = it87_update_device(dev);
1221
1222         if (IS_ERR(data))
1223                 return PTR_ERR(data);
1224
1225         return sprintf(buf, "%d\n", get_temp_type(data, sensor_attr->index));
1226 }
1227
1228 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1229                              const char *buf, size_t count)
1230 {
1231         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1232         int nr = sensor_attr->index;
1233
1234         struct it87_data *data = dev_get_drvdata(dev);
1235         long val;
1236         u8 reg, extra;
1237         int err;
1238
1239         if (kstrtol(buf, 10, &val) < 0)
1240                 return -EINVAL;
1241
1242         err = it87_lock(data);
1243         if (err)
1244                 return err;
1245
1246         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1247         reg &= ~(1 << nr);
1248         reg &= ~(8 << nr);
1249         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1250                 reg &= 0x3f;
1251         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1252         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1253                 extra &= 0x7f;
1254         if (val == 2) { /* backwards compatibility */
1255                 dev_warn(dev,
1256                          "Sensor type 2 is deprecated, please use 4 instead\n");
1257                 val = 4;
1258         }
1259         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1260         if (val == 3)
1261                 reg |= 1 << nr;
1262         else if (val == 4)
1263                 reg |= 8 << nr;
1264         else if (has_temp_peci(data, nr) && val == 6)
1265                 reg |= (nr + 1) << 6;
1266         else if (has_temp_old_peci(data, nr) && val == 6)
1267                 extra |= 0x80;
1268         else if (val != 0) {
1269                 count = -EINVAL;
1270                 goto unlock;
1271         }
1272
1273         data->sensor = reg;
1274         data->extra = extra;
1275         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1276         if (has_temp_old_peci(data, nr))
1277                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1278         data->valid = false;    /* Force cache refresh */
1279 unlock:
1280         it87_unlock(data);
1281         return count;
1282 }
1283
1284 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1285                           set_temp_type, 0);
1286 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1287                           set_temp_type, 1);
1288 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1289                           set_temp_type, 2);
1290
1291 /* 6 Fans */
1292
1293 static int pwm_mode(const struct it87_data *data, int nr)
1294 {
1295         if (has_fanctl_onoff(data) && nr < 3 &&
1296             !(data->fan_main_ctrl & BIT(nr)))
1297                 return 0;                       /* Full speed */
1298         if (data->pwm_ctrl[nr] & 0x80)
1299                 return 2;                       /* Automatic mode */
1300         if ((!has_fanctl_onoff(data) || nr >= 3) &&
1301             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1302                 return 0;                       /* Full speed */
1303
1304         return 1;                               /* Manual mode */
1305 }
1306
1307 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1308                         char *buf)
1309 {
1310         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1311         int nr = sattr->nr;
1312         int index = sattr->index;
1313         int speed;
1314         struct it87_data *data = it87_update_device(dev);
1315
1316         if (IS_ERR(data))
1317                 return PTR_ERR(data);
1318
1319         speed = has_16bit_fans(data) ?
1320                 FAN16_FROM_REG(data->fan[nr][index]) :
1321                 FAN_FROM_REG(data->fan[nr][index],
1322                              DIV_FROM_REG(data->fan_div[nr]));
1323         return sprintf(buf, "%d\n", speed);
1324 }
1325
1326 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1327                             char *buf)
1328 {
1329         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1330         struct it87_data *data = it87_update_device(dev);
1331         int nr = sensor_attr->index;
1332
1333         if (IS_ERR(data))
1334                 return PTR_ERR(data);
1335
1336         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1337 }
1338
1339 static ssize_t show_pwm_enable(struct device *dev,
1340                                struct device_attribute *attr, char *buf)
1341 {
1342         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1343         struct it87_data *data = it87_update_device(dev);
1344         int nr = sensor_attr->index;
1345
1346         if (IS_ERR(data))
1347                 return PTR_ERR(data);
1348
1349         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1350 }
1351
1352 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1353                         char *buf)
1354 {
1355         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1356         struct it87_data *data = it87_update_device(dev);
1357         int nr = sensor_attr->index;
1358
1359         if (IS_ERR(data))
1360                 return PTR_ERR(data);
1361
1362         return sprintf(buf, "%d\n",
1363                        pwm_from_reg(data, data->pwm_duty[nr]));
1364 }
1365
1366 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1367                              char *buf)
1368 {
1369         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1370         struct it87_data *data = it87_update_device(dev);
1371         int nr = sensor_attr->index;
1372         unsigned int freq;
1373         int index;
1374
1375         if (IS_ERR(data))
1376                 return PTR_ERR(data);
1377
1378         if (has_pwm_freq2(data) && nr == 1)
1379                 index = (data->extra >> 4) & 0x07;
1380         else
1381                 index = (data->fan_ctl >> 4) & 0x07;
1382
1383         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1384
1385         return sprintf(buf, "%u\n", freq);
1386 }
1387
1388 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1389                        const char *buf, size_t count)
1390 {
1391         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1392         int nr = sattr->nr;
1393         int index = sattr->index;
1394
1395         struct it87_data *data = dev_get_drvdata(dev);
1396         long val;
1397         int err;
1398         u8 reg;
1399
1400         if (kstrtol(buf, 10, &val) < 0)
1401                 return -EINVAL;
1402
1403         err = it87_lock(data);
1404         if (err)
1405                 return err;
1406
1407         if (has_16bit_fans(data)) {
1408                 data->fan[nr][index] = FAN16_TO_REG(val);
1409                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1410                                  data->fan[nr][index] & 0xff);
1411                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1412                                  data->fan[nr][index] >> 8);
1413         } else {
1414                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1415                 switch (nr) {
1416                 case 0:
1417                         data->fan_div[nr] = reg & 0x07;
1418                         break;
1419                 case 1:
1420                         data->fan_div[nr] = (reg >> 3) & 0x07;
1421                         break;
1422                 case 2:
1423                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1424                         break;
1425                 }
1426                 data->fan[nr][index] =
1427                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1428                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1429                                  data->fan[nr][index]);
1430         }
1431
1432         it87_unlock(data);
1433         return count;
1434 }
1435
1436 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1437                            const char *buf, size_t count)
1438 {
1439         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1440         struct it87_data *data = dev_get_drvdata(dev);
1441         int nr = sensor_attr->index;
1442         unsigned long val;
1443         int min, err;
1444         u8 old;
1445
1446         if (kstrtoul(buf, 10, &val) < 0)
1447                 return -EINVAL;
1448
1449         err = it87_lock(data);
1450         if (err)
1451                 return err;
1452
1453         old = it87_read_value(data, IT87_REG_FAN_DIV);
1454
1455         /* Save fan min limit */
1456         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1457
1458         switch (nr) {
1459         case 0:
1460         case 1:
1461                 data->fan_div[nr] = DIV_TO_REG(val);
1462                 break;
1463         case 2:
1464                 if (val < 8)
1465                         data->fan_div[nr] = 1;
1466                 else
1467                         data->fan_div[nr] = 3;
1468         }
1469         val = old & 0x80;
1470         val |= (data->fan_div[0] & 0x07);
1471         val |= (data->fan_div[1] & 0x07) << 3;
1472         if (data->fan_div[2] == 3)
1473                 val |= 0x1 << 6;
1474         it87_write_value(data, IT87_REG_FAN_DIV, val);
1475
1476         /* Restore fan min limit */
1477         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1478         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1479
1480         it87_unlock(data);
1481         return count;
1482 }
1483
1484 /* Returns 0 if OK, -EINVAL otherwise */
1485 static int check_trip_points(struct device *dev, int nr)
1486 {
1487         const struct it87_data *data = dev_get_drvdata(dev);
1488         int i, err = 0;
1489
1490         if (has_old_autopwm(data)) {
1491                 for (i = 0; i < 3; i++) {
1492                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1493                                 err = -EINVAL;
1494                 }
1495                 for (i = 0; i < 2; i++) {
1496                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1497                                 err = -EINVAL;
1498                 }
1499         } else if (has_newer_autopwm(data)) {
1500                 for (i = 1; i < 3; i++) {
1501                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1502                                 err = -EINVAL;
1503                 }
1504         }
1505
1506         if (err) {
1507                 dev_err(dev,
1508                         "Inconsistent trip points, not switching to automatic mode\n");
1509                 dev_err(dev, "Adjust the trip points and try again\n");
1510         }
1511         return err;
1512 }
1513
1514 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1515                               const char *buf, size_t count)
1516 {
1517         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1518         struct it87_data *data = dev_get_drvdata(dev);
1519         int nr = sensor_attr->index;
1520         long val;
1521         int err;
1522
1523         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1524                 return -EINVAL;
1525
1526         /* Check trip points before switching to automatic mode */
1527         if (val == 2) {
1528                 if (check_trip_points(dev, nr) < 0)
1529                         return -EINVAL;
1530         }
1531
1532         err = it87_lock(data);
1533         if (err)
1534                 return err;
1535
1536         if (val == 0) {
1537                 if (nr < 3 && has_fanctl_onoff(data)) {
1538                         int tmp;
1539                         /* make sure the fan is on when in on/off mode */
1540                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1541                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1542                         /* set on/off mode */
1543                         data->fan_main_ctrl &= ~BIT(nr);
1544                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1545                                          data->fan_main_ctrl);
1546                 } else {
1547                         u8 ctrl;
1548
1549                         /* No on/off mode, set maximum pwm value */
1550                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1551                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1552                                          data->pwm_duty[nr]);
1553                         /* and set manual mode */
1554                         if (has_newer_autopwm(data)) {
1555                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1556                                         data->pwm_temp_map[nr];
1557                         } else {
1558                                 ctrl = data->pwm_duty[nr];
1559                         }
1560                         data->pwm_ctrl[nr] = ctrl;
1561                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1562                 }
1563         } else {
1564                 u8 ctrl;
1565
1566                 if (has_newer_autopwm(data)) {
1567                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1568                                 data->pwm_temp_map[nr];
1569                         if (val != 1)
1570                                 ctrl |= 0x80;
1571                 } else {
1572                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1573                 }
1574                 data->pwm_ctrl[nr] = ctrl;
1575                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1576
1577                 if (has_fanctl_onoff(data) && nr < 3) {
1578                         /* set SmartGuardian mode */
1579                         data->fan_main_ctrl |= BIT(nr);
1580                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1581                                          data->fan_main_ctrl);
1582                 }
1583         }
1584
1585         it87_unlock(data);
1586         return count;
1587 }
1588
1589 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1590                        const char *buf, size_t count)
1591 {
1592         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1593         struct it87_data *data = dev_get_drvdata(dev);
1594         int nr = sensor_attr->index;
1595         long val;
1596         int err;
1597
1598         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1599                 return -EINVAL;
1600
1601         err = it87_lock(data);
1602         if (err)
1603                 return err;
1604
1605         it87_update_pwm_ctrl(data, nr);
1606         if (has_newer_autopwm(data)) {
1607                 /*
1608                  * If we are in automatic mode, the PWM duty cycle register
1609                  * is read-only so we can't write the value.
1610                  */
1611                 if (data->pwm_ctrl[nr] & 0x80) {
1612                         count = -EBUSY;
1613                         goto unlock;
1614                 }
1615                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1616                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1617                                  data->pwm_duty[nr]);
1618         } else {
1619                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1620                 /*
1621                  * If we are in manual mode, write the duty cycle immediately;
1622                  * otherwise, just store it for later use.
1623                  */
1624                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1625                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1626                         it87_write_value(data, IT87_REG_PWM[nr],
1627                                          data->pwm_ctrl[nr]);
1628                 }
1629         }
1630 unlock:
1631         it87_unlock(data);
1632         return count;
1633 }
1634
1635 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1636                             const char *buf, size_t count)
1637 {
1638         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1639         struct it87_data *data = dev_get_drvdata(dev);
1640         int nr = sensor_attr->index;
1641         unsigned long val;
1642         int err;
1643         int i;
1644
1645         if (kstrtoul(buf, 10, &val) < 0)
1646                 return -EINVAL;
1647
1648         val = clamp_val(val, 0, 1000000);
1649         val *= has_newer_autopwm(data) ? 256 : 128;
1650
1651         /* Search for the nearest available frequency */
1652         for (i = 0; i < 7; i++) {
1653                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1654                         break;
1655         }
1656
1657         err = it87_lock(data);
1658         if (err)
1659                 return err;
1660
1661         if (nr == 0) {
1662                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1663                 data->fan_ctl |= i << 4;
1664                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1665         } else {
1666                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1667                 data->extra |= i << 4;
1668                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1669         }
1670         it87_unlock(data);
1671
1672         return count;
1673 }
1674
1675 static ssize_t show_pwm_temp_map(struct device *dev,
1676                                  struct device_attribute *attr, char *buf)
1677 {
1678         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1679         struct it87_data *data = it87_update_device(dev);
1680         int nr = sensor_attr->index;
1681         int map;
1682
1683         if (IS_ERR(data))
1684                 return PTR_ERR(data);
1685
1686         map = data->pwm_temp_map[nr];
1687         if (map >= 3)
1688                 map = 0;        /* Should never happen */
1689         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1690                 map += 3;
1691
1692         return sprintf(buf, "%d\n", (int)BIT(map));
1693 }
1694
1695 static ssize_t set_pwm_temp_map(struct device *dev,
1696                                 struct device_attribute *attr, const char *buf,
1697                                 size_t count)
1698 {
1699         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1700         struct it87_data *data = dev_get_drvdata(dev);
1701         int nr = sensor_attr->index;
1702         long val;
1703         int err;
1704         u8 reg;
1705
1706         if (kstrtol(buf, 10, &val) < 0)
1707                 return -EINVAL;
1708
1709         if (nr >= 3)
1710                 val -= 3;
1711
1712         switch (val) {
1713         case BIT(0):
1714                 reg = 0x00;
1715                 break;
1716         case BIT(1):
1717                 reg = 0x01;
1718                 break;
1719         case BIT(2):
1720                 reg = 0x02;
1721                 break;
1722         default:
1723                 return -EINVAL;
1724         }
1725
1726         err = it87_lock(data);
1727         if (err)
1728                 return err;
1729
1730         it87_update_pwm_ctrl(data, nr);
1731         data->pwm_temp_map[nr] = reg;
1732         /*
1733          * If we are in automatic mode, write the temp mapping immediately;
1734          * otherwise, just store it for later use.
1735          */
1736         if (data->pwm_ctrl[nr] & 0x80) {
1737                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1738                                                 data->pwm_temp_map[nr];
1739                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1740         }
1741         it87_unlock(data);
1742         return count;
1743 }
1744
1745 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1746                              char *buf)
1747 {
1748         struct it87_data *data = it87_update_device(dev);
1749         struct sensor_device_attribute_2 *sensor_attr =
1750                         to_sensor_dev_attr_2(attr);
1751         int nr = sensor_attr->nr;
1752         int point = sensor_attr->index;
1753
1754         if (IS_ERR(data))
1755                 return PTR_ERR(data);
1756
1757         return sprintf(buf, "%d\n",
1758                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1759 }
1760
1761 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1762                             const char *buf, size_t count)
1763 {
1764         struct it87_data *data = dev_get_drvdata(dev);
1765         struct sensor_device_attribute_2 *sensor_attr =
1766                         to_sensor_dev_attr_2(attr);
1767         int nr = sensor_attr->nr;
1768         int point = sensor_attr->index;
1769         int regaddr;
1770         long val;
1771         int err;
1772
1773         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1774                 return -EINVAL;
1775
1776         err = it87_lock(data);
1777         if (err)
1778                 return err;
1779
1780         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1781         if (has_newer_autopwm(data))
1782                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1783         else
1784                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1785         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1786         it87_unlock(data);
1787         return count;
1788 }
1789
1790 static ssize_t show_auto_pwm_slope(struct device *dev,
1791                                    struct device_attribute *attr, char *buf)
1792 {
1793         struct it87_data *data = it87_update_device(dev);
1794         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1795         int nr = sensor_attr->index;
1796
1797         if (IS_ERR(data))
1798                 return PTR_ERR(data);
1799
1800         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1801 }
1802
1803 static ssize_t set_auto_pwm_slope(struct device *dev,
1804                                   struct device_attribute *attr,
1805                                   const char *buf, size_t count)
1806 {
1807         struct it87_data *data = dev_get_drvdata(dev);
1808         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1809         int nr = sensor_attr->index;
1810         unsigned long val;
1811         int err;
1812
1813         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1814                 return -EINVAL;
1815
1816         err = it87_lock(data);
1817         if (err)
1818                 return err;
1819
1820         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1821         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1822                          data->auto_pwm[nr][1]);
1823         it87_unlock(data);
1824         return count;
1825 }
1826
1827 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1828                               char *buf)
1829 {
1830         struct it87_data *data = it87_update_device(dev);
1831         struct sensor_device_attribute_2 *sensor_attr =
1832                         to_sensor_dev_attr_2(attr);
1833         int nr = sensor_attr->nr;
1834         int point = sensor_attr->index;
1835         int reg;
1836
1837         if (IS_ERR(data))
1838                 return PTR_ERR(data);
1839
1840         if (has_old_autopwm(data) || point)
1841                 reg = data->auto_temp[nr][point];
1842         else
1843                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1844
1845         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1846 }
1847
1848 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1849                              const char *buf, size_t count)
1850 {
1851         struct it87_data *data = dev_get_drvdata(dev);
1852         struct sensor_device_attribute_2 *sensor_attr =
1853                         to_sensor_dev_attr_2(attr);
1854         int nr = sensor_attr->nr;
1855         int point = sensor_attr->index;
1856         long val;
1857         int reg;
1858         int err;
1859
1860         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1861                 return -EINVAL;
1862
1863         err = it87_lock(data);
1864         if (err)
1865                 return err;
1866
1867         if (has_newer_autopwm(data) && !point) {
1868                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1869                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1870                 data->auto_temp[nr][0] = reg;
1871                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1872         } else {
1873                 reg = TEMP_TO_REG(val);
1874                 data->auto_temp[nr][point] = reg;
1875                 if (has_newer_autopwm(data))
1876                         point--;
1877                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1878         }
1879         it87_unlock(data);
1880         return count;
1881 }
1882
1883 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1884 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1885                             0, 1);
1886 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1887                           set_fan_div, 0);
1888
1889 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1890 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1891                             1, 1);
1892 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1893                           set_fan_div, 1);
1894
1895 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1896 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1897                             2, 1);
1898 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1899                           set_fan_div, 2);
1900
1901 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1902 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1903                             3, 1);
1904
1905 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1906 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1907                             4, 1);
1908
1909 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1910 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1911                             5, 1);
1912
1913 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1914                           show_pwm_enable, set_pwm_enable, 0);
1915 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1916 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1917                           set_pwm_freq, 0);
1918 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1919                           show_pwm_temp_map, set_pwm_temp_map, 0);
1920 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1921                             show_auto_pwm, set_auto_pwm, 0, 0);
1922 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1923                             show_auto_pwm, set_auto_pwm, 0, 1);
1924 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1925                             show_auto_pwm, set_auto_pwm, 0, 2);
1926 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1927                             show_auto_pwm, NULL, 0, 3);
1928 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1929                             show_auto_temp, set_auto_temp, 0, 1);
1930 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1931                             show_auto_temp, set_auto_temp, 0, 0);
1932 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1933                             show_auto_temp, set_auto_temp, 0, 2);
1934 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1935                             show_auto_temp, set_auto_temp, 0, 3);
1936 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1937                             show_auto_temp, set_auto_temp, 0, 4);
1938 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1939                             show_auto_pwm, set_auto_pwm, 0, 0);
1940 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1941                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1942
1943 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1944                           show_pwm_enable, set_pwm_enable, 1);
1945 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1946 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1947 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1948                           show_pwm_temp_map, set_pwm_temp_map, 1);
1949 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1950                             show_auto_pwm, set_auto_pwm, 1, 0);
1951 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1952                             show_auto_pwm, set_auto_pwm, 1, 1);
1953 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1954                             show_auto_pwm, set_auto_pwm, 1, 2);
1955 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1956                             show_auto_pwm, NULL, 1, 3);
1957 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1958                             show_auto_temp, set_auto_temp, 1, 1);
1959 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1960                             show_auto_temp, set_auto_temp, 1, 0);
1961 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1962                             show_auto_temp, set_auto_temp, 1, 2);
1963 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1964                             show_auto_temp, set_auto_temp, 1, 3);
1965 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1966                             show_auto_temp, set_auto_temp, 1, 4);
1967 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1968                             show_auto_pwm, set_auto_pwm, 1, 0);
1969 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1970                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1971
1972 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1973                           show_pwm_enable, set_pwm_enable, 2);
1974 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1975 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1976 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1977                           show_pwm_temp_map, set_pwm_temp_map, 2);
1978 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1979                             show_auto_pwm, set_auto_pwm, 2, 0);
1980 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1981                             show_auto_pwm, set_auto_pwm, 2, 1);
1982 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1983                             show_auto_pwm, set_auto_pwm, 2, 2);
1984 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1985                             show_auto_pwm, NULL, 2, 3);
1986 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1987                             show_auto_temp, set_auto_temp, 2, 1);
1988 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1989                             show_auto_temp, set_auto_temp, 2, 0);
1990 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1991                             show_auto_temp, set_auto_temp, 2, 2);
1992 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1993                             show_auto_temp, set_auto_temp, 2, 3);
1994 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1995                             show_auto_temp, set_auto_temp, 2, 4);
1996 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1997                             show_auto_pwm, set_auto_pwm, 2, 0);
1998 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1999                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
2000
2001 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2002                           show_pwm_enable, set_pwm_enable, 3);
2003 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2004 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2005 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2006                           show_pwm_temp_map, set_pwm_temp_map, 3);
2007 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2008                             show_auto_temp, set_auto_temp, 2, 1);
2009 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2010                             show_auto_temp, set_auto_temp, 2, 0);
2011 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2012                             show_auto_temp, set_auto_temp, 2, 2);
2013 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2014                             show_auto_temp, set_auto_temp, 2, 3);
2015 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2016                             show_auto_pwm, set_auto_pwm, 3, 0);
2017 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2018                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
2019
2020 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2021                           show_pwm_enable, set_pwm_enable, 4);
2022 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2023 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2024 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2025                           show_pwm_temp_map, set_pwm_temp_map, 4);
2026 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2027                             show_auto_temp, set_auto_temp, 2, 1);
2028 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2029                             show_auto_temp, set_auto_temp, 2, 0);
2030 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2031                             show_auto_temp, set_auto_temp, 2, 2);
2032 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2033                             show_auto_temp, set_auto_temp, 2, 3);
2034 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2035                             show_auto_pwm, set_auto_pwm, 4, 0);
2036 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2037                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
2038
2039 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2040                           show_pwm_enable, set_pwm_enable, 5);
2041 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2042 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2043 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2044                           show_pwm_temp_map, set_pwm_temp_map, 5);
2045 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2046                             show_auto_temp, set_auto_temp, 2, 1);
2047 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2048                             show_auto_temp, set_auto_temp, 2, 0);
2049 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2050                             show_auto_temp, set_auto_temp, 2, 2);
2051 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2052                             show_auto_temp, set_auto_temp, 2, 3);
2053 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2054                             show_auto_pwm, set_auto_pwm, 5, 0);
2055 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2056                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
2057
2058 /* Alarms */
2059 static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
2060                            char *buf)
2061 {
2062         struct it87_data *data = it87_update_device(dev);
2063
2064         if (IS_ERR(data))
2065                 return PTR_ERR(data);
2066
2067         return sprintf(buf, "%u\n", data->alarms);
2068 }
2069 static DEVICE_ATTR_RO(alarms);
2070
2071 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2072                           char *buf)
2073 {
2074         struct it87_data *data = it87_update_device(dev);
2075         int bitnr = to_sensor_dev_attr(attr)->index;
2076
2077         if (IS_ERR(data))
2078                 return PTR_ERR(data);
2079
2080         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2081 }
2082
2083 static ssize_t clear_intrusion(struct device *dev,
2084                                struct device_attribute *attr, const char *buf,
2085                                size_t count)
2086 {
2087         struct it87_data *data = dev_get_drvdata(dev);
2088         int err, config;
2089         long val;
2090
2091         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2092                 return -EINVAL;
2093
2094         err = it87_lock(data);
2095         if (err)
2096                 return err;
2097
2098         config = it87_read_value(data, IT87_REG_CONFIG);
2099         if (config < 0) {
2100                 count = config;
2101         } else {
2102                 config |= BIT(5);
2103                 it87_write_value(data, IT87_REG_CONFIG, config);
2104                 /* Invalidate cache to force re-read */
2105                 data->valid = false;
2106         }
2107         it87_unlock(data);
2108         return count;
2109 }
2110
2111 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2112 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2113 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2114 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2115 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2116 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2117 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2118 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2119 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2120 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2121 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2122 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2123 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2124 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2125 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2126 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2127 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2128 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2129                           show_alarm, clear_intrusion, 4);
2130
2131 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2132                          char *buf)
2133 {
2134         struct it87_data *data = it87_update_device(dev);
2135         int bitnr = to_sensor_dev_attr(attr)->index;
2136
2137         if (IS_ERR(data))
2138                 return PTR_ERR(data);
2139
2140         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2141 }
2142
2143 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2144                         const char *buf, size_t count)
2145 {
2146         int bitnr = to_sensor_dev_attr(attr)->index;
2147         struct it87_data *data = dev_get_drvdata(dev);
2148         long val;
2149         int err;
2150
2151         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2152                 return -EINVAL;
2153
2154         err = it87_lock(data);
2155         if (err)
2156                 return err;
2157
2158         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2159         if (val)
2160                 data->beeps |= BIT(bitnr);
2161         else
2162                 data->beeps &= ~BIT(bitnr);
2163         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2164         it87_unlock(data);
2165         return count;
2166 }
2167
2168 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2169                           show_beep, set_beep, 1);
2170 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2171 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2172 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2173 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2174 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2175 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2176 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2177 /* fanX_beep writability is set later */
2178 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2179 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2180 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2181 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2182 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2183 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2184 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2185                           show_beep, set_beep, 2);
2186 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2187 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2188
2189 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
2190                         char *buf)
2191 {
2192         struct it87_data *data = dev_get_drvdata(dev);
2193
2194         return sprintf(buf, "%u\n", data->vrm);
2195 }
2196
2197 static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
2198                          const char *buf, size_t count)
2199 {
2200         struct it87_data *data = dev_get_drvdata(dev);
2201         unsigned long val;
2202
2203         if (kstrtoul(buf, 10, &val) < 0)
2204                 return -EINVAL;
2205
2206         data->vrm = val;
2207
2208         return count;
2209 }
2210 static DEVICE_ATTR_RW(vrm);
2211
2212 static ssize_t cpu0_vid_show(struct device *dev,
2213                              struct device_attribute *attr, char *buf)
2214 {
2215         struct it87_data *data = it87_update_device(dev);
2216
2217         if (IS_ERR(data))
2218                 return PTR_ERR(data);
2219
2220         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2221 }
2222 static DEVICE_ATTR_RO(cpu0_vid);
2223
2224 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2225                           char *buf)
2226 {
2227         static const char * const labels[] = {
2228                 "+5V",
2229                 "5VSB",
2230                 "Vbat",
2231                 "AVCC",
2232         };
2233         static const char * const labels_it8721[] = {
2234                 "+3.3V",
2235                 "3VSB",
2236                 "Vbat",
2237                 "+3.3V",
2238         };
2239         struct it87_data *data = dev_get_drvdata(dev);
2240         int nr = to_sensor_dev_attr(attr)->index;
2241         const char *label;
2242
2243         if (has_vin3_5v(data) && nr == 0)
2244                 label = labels[0];
2245         else if (has_scaling(data))
2246                 label = labels_it8721[nr];
2247         else
2248                 label = labels[nr];
2249
2250         return sprintf(buf, "%s\n", label);
2251 }
2252 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2253 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2254 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2255 /* AVCC3 */
2256 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2257
2258 static umode_t it87_in_is_visible(struct kobject *kobj,
2259                                   struct attribute *attr, int index)
2260 {
2261         struct device *dev = kobj_to_dev(kobj);
2262         struct it87_data *data = dev_get_drvdata(dev);
2263         int i = index / 5;      /* voltage index */
2264         int a = index % 5;      /* attribute index */
2265
2266         if (index >= 40) {      /* in8 and higher only have input attributes */
2267                 i = index - 40 + 8;
2268                 a = 0;
2269         }
2270
2271         if (!(data->has_in & BIT(i)))
2272                 return 0;
2273
2274         if (a == 4 && !data->has_beep)
2275                 return 0;
2276
2277         return attr->mode;
2278 }
2279
2280 static struct attribute *it87_attributes_in[] = {
2281         &sensor_dev_attr_in0_input.dev_attr.attr,
2282         &sensor_dev_attr_in0_min.dev_attr.attr,
2283         &sensor_dev_attr_in0_max.dev_attr.attr,
2284         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2285         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2286
2287         &sensor_dev_attr_in1_input.dev_attr.attr,
2288         &sensor_dev_attr_in1_min.dev_attr.attr,
2289         &sensor_dev_attr_in1_max.dev_attr.attr,
2290         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2291         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2292
2293         &sensor_dev_attr_in2_input.dev_attr.attr,
2294         &sensor_dev_attr_in2_min.dev_attr.attr,
2295         &sensor_dev_attr_in2_max.dev_attr.attr,
2296         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2297         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2298
2299         &sensor_dev_attr_in3_input.dev_attr.attr,
2300         &sensor_dev_attr_in3_min.dev_attr.attr,
2301         &sensor_dev_attr_in3_max.dev_attr.attr,
2302         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2303         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2304
2305         &sensor_dev_attr_in4_input.dev_attr.attr,
2306         &sensor_dev_attr_in4_min.dev_attr.attr,
2307         &sensor_dev_attr_in4_max.dev_attr.attr,
2308         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2309         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2310
2311         &sensor_dev_attr_in5_input.dev_attr.attr,
2312         &sensor_dev_attr_in5_min.dev_attr.attr,
2313         &sensor_dev_attr_in5_max.dev_attr.attr,
2314         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2315         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2316
2317         &sensor_dev_attr_in6_input.dev_attr.attr,
2318         &sensor_dev_attr_in6_min.dev_attr.attr,
2319         &sensor_dev_attr_in6_max.dev_attr.attr,
2320         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2321         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2322
2323         &sensor_dev_attr_in7_input.dev_attr.attr,
2324         &sensor_dev_attr_in7_min.dev_attr.attr,
2325         &sensor_dev_attr_in7_max.dev_attr.attr,
2326         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2327         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2328
2329         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2330         &sensor_dev_attr_in9_input.dev_attr.attr,
2331         &sensor_dev_attr_in10_input.dev_attr.attr,
2332         &sensor_dev_attr_in11_input.dev_attr.attr,
2333         &sensor_dev_attr_in12_input.dev_attr.attr,
2334         NULL
2335 };
2336
2337 static const struct attribute_group it87_group_in = {
2338         .attrs = it87_attributes_in,
2339         .is_visible = it87_in_is_visible,
2340 };
2341
2342 static umode_t it87_temp_is_visible(struct kobject *kobj,
2343                                     struct attribute *attr, int index)
2344 {
2345         struct device *dev = kobj_to_dev(kobj);
2346         struct it87_data *data = dev_get_drvdata(dev);
2347         int i = index / 7;      /* temperature index */
2348         int a = index % 7;      /* attribute index */
2349
2350         if (index >= 21) {
2351                 i = index - 21 + 3;
2352                 a = 0;
2353         }
2354
2355         if (!(data->has_temp & BIT(i)))
2356                 return 0;
2357
2358         if (a == 3) {
2359                 if (get_temp_type(data, i) == 0)
2360                         return 0;
2361                 return attr->mode;
2362         }
2363
2364         if (a == 5 && !has_temp_offset(data))
2365                 return 0;
2366
2367         if (a == 6 && !data->has_beep)
2368                 return 0;
2369
2370         return attr->mode;
2371 }
2372
2373 static struct attribute *it87_attributes_temp[] = {
2374         &sensor_dev_attr_temp1_input.dev_attr.attr,
2375         &sensor_dev_attr_temp1_max.dev_attr.attr,
2376         &sensor_dev_attr_temp1_min.dev_attr.attr,
2377         &sensor_dev_attr_temp1_type.dev_attr.attr,
2378         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2379         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2380         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2381
2382         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2383         &sensor_dev_attr_temp2_max.dev_attr.attr,
2384         &sensor_dev_attr_temp2_min.dev_attr.attr,
2385         &sensor_dev_attr_temp2_type.dev_attr.attr,
2386         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2387         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2388         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2389
2390         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2391         &sensor_dev_attr_temp3_max.dev_attr.attr,
2392         &sensor_dev_attr_temp3_min.dev_attr.attr,
2393         &sensor_dev_attr_temp3_type.dev_attr.attr,
2394         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2395         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2396         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2397
2398         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2399         &sensor_dev_attr_temp5_input.dev_attr.attr,
2400         &sensor_dev_attr_temp6_input.dev_attr.attr,
2401         NULL
2402 };
2403
2404 static const struct attribute_group it87_group_temp = {
2405         .attrs = it87_attributes_temp,
2406         .is_visible = it87_temp_is_visible,
2407 };
2408
2409 static umode_t it87_is_visible(struct kobject *kobj,
2410                                struct attribute *attr, int index)
2411 {
2412         struct device *dev = kobj_to_dev(kobj);
2413         struct it87_data *data = dev_get_drvdata(dev);
2414
2415         if ((index == 2 || index == 3) && !data->has_vid)
2416                 return 0;
2417
2418         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2419                 return 0;
2420
2421         return attr->mode;
2422 }
2423
2424 static struct attribute *it87_attributes[] = {
2425         &dev_attr_alarms.attr,
2426         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2427         &dev_attr_vrm.attr,                             /* 2 */
2428         &dev_attr_cpu0_vid.attr,                        /* 3 */
2429         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2430         &sensor_dev_attr_in7_label.dev_attr.attr,
2431         &sensor_dev_attr_in8_label.dev_attr.attr,
2432         &sensor_dev_attr_in9_label.dev_attr.attr,
2433         NULL
2434 };
2435
2436 static const struct attribute_group it87_group = {
2437         .attrs = it87_attributes,
2438         .is_visible = it87_is_visible,
2439 };
2440
2441 static umode_t it87_fan_is_visible(struct kobject *kobj,
2442                                    struct attribute *attr, int index)
2443 {
2444         struct device *dev = kobj_to_dev(kobj);
2445         struct it87_data *data = dev_get_drvdata(dev);
2446         int i = index / 5;      /* fan index */
2447         int a = index % 5;      /* attribute index */
2448
2449         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2450                 i = (index - 15) / 4 + 3;
2451                 a = (index - 15) % 4;
2452         }
2453
2454         if (!(data->has_fan & BIT(i)))
2455                 return 0;
2456
2457         if (a == 3) {                           /* beep */
2458                 if (!data->has_beep)
2459                         return 0;
2460                 /* first fan beep attribute is writable */
2461                 if (i == __ffs(data->has_fan))
2462                         return attr->mode | S_IWUSR;
2463         }
2464
2465         if (a == 4 && has_16bit_fans(data))     /* divisor */
2466                 return 0;
2467
2468         return attr->mode;
2469 }
2470
2471 static struct attribute *it87_attributes_fan[] = {
2472         &sensor_dev_attr_fan1_input.dev_attr.attr,
2473         &sensor_dev_attr_fan1_min.dev_attr.attr,
2474         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2475         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2476         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2477
2478         &sensor_dev_attr_fan2_input.dev_attr.attr,
2479         &sensor_dev_attr_fan2_min.dev_attr.attr,
2480         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2481         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2482         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2483
2484         &sensor_dev_attr_fan3_input.dev_attr.attr,
2485         &sensor_dev_attr_fan3_min.dev_attr.attr,
2486         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2487         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2488         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2489
2490         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2491         &sensor_dev_attr_fan4_min.dev_attr.attr,
2492         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2493         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2494
2495         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2496         &sensor_dev_attr_fan5_min.dev_attr.attr,
2497         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2498         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2499
2500         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2501         &sensor_dev_attr_fan6_min.dev_attr.attr,
2502         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2503         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2504         NULL
2505 };
2506
2507 static const struct attribute_group it87_group_fan = {
2508         .attrs = it87_attributes_fan,
2509         .is_visible = it87_fan_is_visible,
2510 };
2511
2512 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2513                                    struct attribute *attr, int index)
2514 {
2515         struct device *dev = kobj_to_dev(kobj);
2516         struct it87_data *data = dev_get_drvdata(dev);
2517         int i = index / 4;      /* pwm index */
2518         int a = index % 4;      /* attribute index */
2519
2520         if (!(data->has_pwm & BIT(i)))
2521                 return 0;
2522
2523         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2524         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2525                 return attr->mode | S_IWUSR;
2526
2527         /* pwm2_freq is writable if there are two pwm frequency selects */
2528         if (has_pwm_freq2(data) && i == 1 && a == 2)
2529                 return attr->mode | S_IWUSR;
2530
2531         return attr->mode;
2532 }
2533
2534 static struct attribute *it87_attributes_pwm[] = {
2535         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2536         &sensor_dev_attr_pwm1.dev_attr.attr,
2537         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2538         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2539
2540         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2541         &sensor_dev_attr_pwm2.dev_attr.attr,
2542         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2543         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2544
2545         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2546         &sensor_dev_attr_pwm3.dev_attr.attr,
2547         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2548         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2549
2550         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2551         &sensor_dev_attr_pwm4.dev_attr.attr,
2552         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2553         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2554
2555         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2556         &sensor_dev_attr_pwm5.dev_attr.attr,
2557         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2558         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2559
2560         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2561         &sensor_dev_attr_pwm6.dev_attr.attr,
2562         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2563         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2564
2565         NULL
2566 };
2567
2568 static const struct attribute_group it87_group_pwm = {
2569         .attrs = it87_attributes_pwm,
2570         .is_visible = it87_pwm_is_visible,
2571 };
2572
2573 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2574                                         struct attribute *attr, int index)
2575 {
2576         struct device *dev = kobj_to_dev(kobj);
2577         struct it87_data *data = dev_get_drvdata(dev);
2578         int i = index / 11;     /* pwm index */
2579         int a = index % 11;     /* attribute index */
2580
2581         if (index >= 33) {      /* pwm 4..6 */
2582                 i = (index - 33) / 6 + 3;
2583                 a = (index - 33) % 6 + 4;
2584         }
2585
2586         if (!(data->has_pwm & BIT(i)))
2587                 return 0;
2588
2589         if (has_newer_autopwm(data)) {
2590                 if (a < 4)      /* no auto point pwm */
2591                         return 0;
2592                 if (a == 8)     /* no auto_point4 */
2593                         return 0;
2594         }
2595         if (has_old_autopwm(data)) {
2596                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2597                         return 0;
2598         }
2599
2600         return attr->mode;
2601 }
2602
2603 static struct attribute *it87_attributes_auto_pwm[] = {
2604         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2605         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2606         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2607         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2608         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2609         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2610         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2611         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2612         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2613         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2614         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2615
2616         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2617         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2618         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2619         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2620         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2621         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2622         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2623         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2624         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2625         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2626         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2627
2628         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2629         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2630         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2631         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2632         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2633         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2634         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2635         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2636         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2637         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2638         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2639
2640         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2641         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2642         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2643         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2644         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2645         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2646
2647         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2648         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2649         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2650         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2651         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2652         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2653
2654         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2655         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2656         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2657         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2658         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2659         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2660
2661         NULL,
2662 };
2663
2664 static const struct attribute_group it87_group_auto_pwm = {
2665         .attrs = it87_attributes_auto_pwm,
2666         .is_visible = it87_auto_pwm_is_visible,
2667 };
2668
2669 /* SuperIO detection - will change isa_address if a chip is found */
2670 static int __init it87_find(int sioaddr, unsigned short *address,
2671                             struct it87_sio_data *sio_data, int chip_cnt)
2672 {
2673         int err;
2674         u16 chip_type;
2675         const struct it87_devices *config = NULL;
2676
2677         err = superio_enter(sioaddr);
2678         if (err)
2679                 return err;
2680
2681         err = -ENODEV;
2682         chip_type = superio_inw(sioaddr, DEVID);
2683         /* check first for a valid chip before forcing chip id */
2684         if (chip_type == 0xffff)
2685                 goto exit;
2686
2687         if (force_id_cnt == 1) {
2688                 /* If only one value given use for all chips */
2689                 if (force_id[0])
2690                         chip_type = force_id[0];
2691         } else if (force_id[chip_cnt])
2692                 chip_type = force_id[chip_cnt];
2693
2694         switch (chip_type) {
2695         case IT8705F_DEVID:
2696                 sio_data->type = it87;
2697                 break;
2698         case IT8712F_DEVID:
2699                 sio_data->type = it8712;
2700                 break;
2701         case IT8716F_DEVID:
2702         case IT8726F_DEVID:
2703                 sio_data->type = it8716;
2704                 break;
2705         case IT8718F_DEVID:
2706                 sio_data->type = it8718;
2707                 break;
2708         case IT8720F_DEVID:
2709                 sio_data->type = it8720;
2710                 break;
2711         case IT8721F_DEVID:
2712                 sio_data->type = it8721;
2713                 break;
2714         case IT8728F_DEVID:
2715                 sio_data->type = it8728;
2716                 break;
2717         case IT8732F_DEVID:
2718                 sio_data->type = it8732;
2719                 break;
2720         case IT8792E_DEVID:
2721                 sio_data->type = it8792;
2722                 break;
2723         case IT8771E_DEVID:
2724                 sio_data->type = it8771;
2725                 break;
2726         case IT8772E_DEVID:
2727                 sio_data->type = it8772;
2728                 break;
2729         case IT8781F_DEVID:
2730                 sio_data->type = it8781;
2731                 break;
2732         case IT8782F_DEVID:
2733                 sio_data->type = it8782;
2734                 break;
2735         case IT8783E_DEVID:
2736                 sio_data->type = it8783;
2737                 break;
2738         case IT8786E_DEVID:
2739                 sio_data->type = it8786;
2740                 break;
2741         case IT8790E_DEVID:
2742                 sio_data->type = it8790;
2743                 break;
2744         case IT8603E_DEVID:
2745         case IT8623E_DEVID:
2746                 sio_data->type = it8603;
2747                 break;
2748         case IT8620E_DEVID:
2749                 sio_data->type = it8620;
2750                 break;
2751         case IT8622E_DEVID:
2752                 sio_data->type = it8622;
2753                 break;
2754         case IT8628E_DEVID:
2755                 sio_data->type = it8628;
2756                 break;
2757         case IT87952E_DEVID:
2758                 sio_data->type = it87952;
2759                 break;
2760         case 0xffff:    /* No device at all */
2761                 goto exit;
2762         default:
2763                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2764                 goto exit;
2765         }
2766
2767         config = &it87_devices[sio_data->type];
2768
2769         superio_select(sioaddr, PME);
2770         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2771                 pr_info("Device (chip %s ioreg 0x%x) not activated, skipping\n",
2772                         config->model, sioaddr);
2773                 goto exit;
2774         }
2775
2776         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2777         if (*address == 0) {
2778                 pr_info("Base address not set (chip %s ioreg 0x%x), skipping\n",
2779                         config->model, sioaddr);
2780                 goto exit;
2781         }
2782
2783         err = 0;
2784         sio_data->sioaddr = sioaddr;
2785         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2786         pr_info("Found %s chip at 0x%x, revision %d\n",
2787                 it87_devices[sio_data->type].model,
2788                 *address, sio_data->revision);
2789
2790         /* in7 (VSB or VCCH5V) is always internal on some chips */
2791         if (has_in7_internal(config))
2792                 sio_data->internal |= BIT(1);
2793
2794         /* in8 (Vbat) is always internal */
2795         sio_data->internal |= BIT(2);
2796
2797         /* in9 (AVCC3), always internal if supported */
2798         if (has_avcc3(config))
2799                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2800         else
2801                 sio_data->skip_in |= BIT(9);
2802
2803         if (!has_four_pwm(config))
2804                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2805         else if (!has_five_pwm(config))
2806                 sio_data->skip_pwm |= BIT(4) | BIT(5);
2807         else if (!has_six_pwm(config))
2808                 sio_data->skip_pwm |= BIT(5);
2809
2810         if (!has_vid(config))
2811                 sio_data->skip_vid = 1;
2812
2813         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2814         if (sio_data->type == it87) {
2815                 /* The IT8705F has a different LD number for GPIO */
2816                 superio_select(sioaddr, 5);
2817                 sio_data->beep_pin = superio_inb(sioaddr,
2818                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2819         } else if (sio_data->type == it8783) {
2820                 int reg25, reg27, reg2a, reg2c, regef;
2821
2822                 superio_select(sioaddr, GPIO);
2823
2824                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2825                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2826                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2827                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2828                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2829
2830                 /* Check if fan3 is there or not */
2831                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2832                         sio_data->skip_fan |= BIT(2);
2833                 if ((reg25 & BIT(4)) ||
2834                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2835                         sio_data->skip_pwm |= BIT(2);
2836
2837                 /* Check if fan2 is there or not */
2838                 if (reg27 & BIT(7))
2839                         sio_data->skip_fan |= BIT(1);
2840                 if (reg27 & BIT(3))
2841                         sio_data->skip_pwm |= BIT(1);
2842
2843                 /* VIN5 */
2844                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2845                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2846
2847                 /* VIN6 */
2848                 if (reg27 & BIT(1))
2849                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2850
2851                 /*
2852                  * VIN7
2853                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2854                  */
2855                 if (reg27 & BIT(2)) {
2856                         /*
2857                          * The data sheet is a bit unclear regarding the
2858                          * internal voltage divider for VCCH5V. It says
2859                          * "This bit enables and switches VIN7 (pin 91) to the
2860                          * internal voltage divider for VCCH5V".
2861                          * This is different to other chips, where the internal
2862                          * voltage divider would connect VIN7 to an internal
2863                          * voltage source. Maybe that is the case here as well.
2864                          *
2865                          * Since we don't know for sure, re-route it if that is
2866                          * not the case, and ask the user to report if the
2867                          * resulting voltage is sane.
2868                          */
2869                         if (!(reg2c & BIT(1))) {
2870                                 reg2c |= BIT(1);
2871                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2872                                              reg2c);
2873                                 sio_data->need_in7_reroute = true;
2874                                 pr_notice("Routing internal VCCH5V to in7.\n");
2875                         }
2876                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2877                         pr_notice("Please report if it displays a reasonable voltage.\n");
2878                 }
2879
2880                 if (reg2c & BIT(0))
2881                         sio_data->internal |= BIT(0);
2882                 if (reg2c & BIT(1))
2883                         sio_data->internal |= BIT(1);
2884
2885                 sio_data->beep_pin = superio_inb(sioaddr,
2886                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2887         } else if (sio_data->type == it8603) {
2888                 int reg27, reg29;
2889
2890                 superio_select(sioaddr, GPIO);
2891
2892                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2893
2894                 /* Check if fan3 is there or not */
2895                 if (reg27 & BIT(6))
2896                         sio_data->skip_pwm |= BIT(2);
2897                 if (reg27 & BIT(7))
2898                         sio_data->skip_fan |= BIT(2);
2899
2900                 /* Check if fan2 is there or not */
2901                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2902                 if (reg29 & BIT(1))
2903                         sio_data->skip_pwm |= BIT(1);
2904                 if (reg29 & BIT(2))
2905                         sio_data->skip_fan |= BIT(1);
2906
2907                 sio_data->skip_in |= BIT(5); /* No VIN5 */
2908                 sio_data->skip_in |= BIT(6); /* No VIN6 */
2909
2910                 sio_data->beep_pin = superio_inb(sioaddr,
2911                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2912         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2913                 int reg;
2914
2915                 superio_select(sioaddr, GPIO);
2916
2917                 /* Check for pwm5 */
2918                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2919                 if (reg & BIT(6))
2920                         sio_data->skip_pwm |= BIT(4);
2921
2922                 /* Check for fan4, fan5 */
2923                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2924                 if (!(reg & BIT(5)))
2925                         sio_data->skip_fan |= BIT(3);
2926                 if (!(reg & BIT(4)))
2927                         sio_data->skip_fan |= BIT(4);
2928
2929                 /* Check for pwm3, fan3 */
2930                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2931                 if (reg & BIT(6))
2932                         sio_data->skip_pwm |= BIT(2);
2933                 if (reg & BIT(7))
2934                         sio_data->skip_fan |= BIT(2);
2935
2936                 /* Check for pwm4 */
2937                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2938                 if (reg & BIT(2))
2939                         sio_data->skip_pwm |= BIT(3);
2940
2941                 /* Check for pwm2, fan2 */
2942                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2943                 if (reg & BIT(1))
2944                         sio_data->skip_pwm |= BIT(1);
2945                 if (reg & BIT(2))
2946                         sio_data->skip_fan |= BIT(1);
2947                 /* Check for pwm6, fan6 */
2948                 if (!(reg & BIT(7))) {
2949                         sio_data->skip_pwm |= BIT(5);
2950                         sio_data->skip_fan |= BIT(5);
2951                 }
2952
2953                 /* Check if AVCC is on VIN3 */
2954                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2955                 if (reg & BIT(0))
2956                         sio_data->internal |= BIT(0);
2957                 else
2958                         sio_data->skip_in |= BIT(9);
2959
2960                 sio_data->beep_pin = superio_inb(sioaddr,
2961                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2962         } else if (sio_data->type == it8622) {
2963                 int reg;
2964
2965                 superio_select(sioaddr, GPIO);
2966
2967                 /* Check for pwm4, fan4 */
2968                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2969                 if (reg & BIT(6))
2970                         sio_data->skip_fan |= BIT(3);
2971                 if (reg & BIT(5))
2972                         sio_data->skip_pwm |= BIT(3);
2973
2974                 /* Check for pwm3, fan3, pwm5, fan5 */
2975                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2976                 if (reg & BIT(6))
2977                         sio_data->skip_pwm |= BIT(2);
2978                 if (reg & BIT(7))
2979                         sio_data->skip_fan |= BIT(2);
2980                 if (reg & BIT(3))
2981                         sio_data->skip_pwm |= BIT(4);
2982                 if (reg & BIT(1))
2983                         sio_data->skip_fan |= BIT(4);
2984
2985                 /* Check for pwm2, fan2 */
2986                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2987                 if (reg & BIT(1))
2988                         sio_data->skip_pwm |= BIT(1);
2989                 if (reg & BIT(2))
2990                         sio_data->skip_fan |= BIT(1);
2991
2992                 /* Check for AVCC */
2993                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2994                 if (!(reg & BIT(0)))
2995                         sio_data->skip_in |= BIT(9);
2996
2997                 sio_data->beep_pin = superio_inb(sioaddr,
2998                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2999         } else if (sio_data->type == it8732) {
3000                 int reg;
3001
3002                 superio_select(sioaddr, GPIO);
3003
3004                 /* Check for pwm2, fan2 */
3005                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3006                 if (reg & BIT(1))
3007                         sio_data->skip_pwm |= BIT(1);
3008                 if (reg & BIT(2))
3009                         sio_data->skip_fan |= BIT(1);
3010
3011                 /* Check for pwm3, fan3, fan4 */
3012                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3013                 if (reg & BIT(6))
3014                         sio_data->skip_pwm |= BIT(2);
3015                 if (reg & BIT(7))
3016                         sio_data->skip_fan |= BIT(2);
3017                 if (reg & BIT(5))
3018                         sio_data->skip_fan |= BIT(3);
3019
3020                 /* Check if AVCC is on VIN3 */
3021                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3022                 if (reg & BIT(0))
3023                         sio_data->internal |= BIT(0);
3024
3025                 sio_data->beep_pin = superio_inb(sioaddr,
3026                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3027         } else {
3028                 int reg;
3029                 bool uart6;
3030
3031                 superio_select(sioaddr, GPIO);
3032
3033                 /* Check for fan4, fan5 */
3034                 if (has_five_fans(config)) {
3035                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3036                         switch (sio_data->type) {
3037                         case it8718:
3038                                 if (reg & BIT(5))
3039                                         sio_data->skip_fan |= BIT(3);
3040                                 if (reg & BIT(4))
3041                                         sio_data->skip_fan |= BIT(4);
3042                                 break;
3043                         case it8720:
3044                         case it8721:
3045                         case it8728:
3046                                 if (!(reg & BIT(5)))
3047                                         sio_data->skip_fan |= BIT(3);
3048                                 if (!(reg & BIT(4)))
3049                                         sio_data->skip_fan |= BIT(4);
3050                                 break;
3051                         default:
3052                                 break;
3053                         }
3054                 }
3055
3056                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3057                 if (!sio_data->skip_vid) {
3058                         /* We need at least 4 VID pins */
3059                         if (reg & 0x0f) {
3060                                 pr_info("VID is disabled (pins used for GPIO)\n");
3061                                 sio_data->skip_vid = 1;
3062                         }
3063                 }
3064
3065                 /* Check if fan3 is there or not */
3066                 if (reg & BIT(6))
3067                         sio_data->skip_pwm |= BIT(2);
3068                 if (reg & BIT(7))
3069                         sio_data->skip_fan |= BIT(2);
3070
3071                 /* Check if fan2 is there or not */
3072                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3073                 if (reg & BIT(1))
3074                         sio_data->skip_pwm |= BIT(1);
3075                 if (reg & BIT(2))
3076                         sio_data->skip_fan |= BIT(1);
3077
3078                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3079                     !(sio_data->skip_vid))
3080                         sio_data->vid_value = superio_inb(sioaddr,
3081                                                           IT87_SIO_VID_REG);
3082
3083                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3084
3085                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3086
3087                 /*
3088                  * The IT8720F has no VIN7 pin, so VCCH5V should always be
3089                  * routed internally to VIN7 with an internal divider.
3090                  * Curiously, there still is a configuration bit to control
3091                  * this, which means it can be set incorrectly. And even
3092                  * more curiously, many boards out there are improperly
3093                  * configured, even though the IT8720F datasheet claims
3094                  * that the internal routing of VCCH5V to VIN7 is the default
3095                  * setting. So we force the internal routing in this case.
3096                  *
3097                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3098                  * If UART6 is enabled, re-route VIN7 to the internal divider
3099                  * if that is not already the case.
3100                  */
3101                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3102                         reg |= BIT(1);
3103                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3104                         sio_data->need_in7_reroute = true;
3105                         pr_notice("Routing internal VCCH5V to in7\n");
3106                 }
3107                 if (reg & BIT(0))
3108                         sio_data->internal |= BIT(0);
3109                 if (reg & BIT(1))
3110                         sio_data->internal |= BIT(1);
3111
3112                 /*
3113                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3114                  * While VIN7 can be routed to the internal voltage divider,
3115                  * VIN5 and VIN6 are not available if UART6 is enabled.
3116                  *
3117                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3118                  * is the temperature source. Since we can not read the
3119                  * temperature source here, skip_temp is preliminary.
3120                  */
3121                 if (uart6) {
3122                         sio_data->skip_in |= BIT(5) | BIT(6);
3123                         sio_data->skip_temp |= BIT(2);
3124                 }
3125
3126                 sio_data->beep_pin = superio_inb(sioaddr,
3127                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3128         }
3129         if (sio_data->beep_pin)
3130                 pr_info("Beeping is supported\n");
3131
3132         /* Set values based on DMI matches */
3133         if (dmi_data)
3134                 sio_data->skip_pwm |= dmi_data->skip_pwm;
3135
3136         if (config->smbus_bitmap) {
3137                 u8 reg;
3138
3139                 superio_select(sioaddr, PME);
3140                 reg = superio_inb(sioaddr, IT87_SPECIAL_CFG_REG);
3141                 sio_data->ec_special_config = reg;
3142                 sio_data->smbus_bitmap = reg & config->smbus_bitmap;
3143         }
3144
3145 exit:
3146         superio_exit(sioaddr, config ? has_conf_noexit(config) : false);
3147         return err;
3148 }
3149
3150 /*
3151  * Some chips seem to have default value 0xff for all limit
3152  * registers. For low voltage limits it makes no sense and triggers
3153  * alarms, so change to 0 instead. For high temperature limits, it
3154  * means -1 degree C, which surprisingly doesn't trigger an alarm,
3155  * but is still confusing, so change to 127 degrees C.
3156  */
3157 static void it87_check_limit_regs(struct it87_data *data)
3158 {
3159         int i, reg;
3160
3161         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3162                 reg = it87_read_value(data, IT87_REG_VIN_MIN(i));
3163                 if (reg == 0xff)
3164                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3165         }
3166         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
3167                 reg = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
3168                 if (reg == 0xff)
3169                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
3170         }
3171 }
3172
3173 /* Check if voltage monitors are reset manually or by some reason */
3174 static void it87_check_voltage_monitors_reset(struct it87_data *data)
3175 {
3176         int reg;
3177
3178         reg = it87_read_value(data, IT87_REG_VIN_ENABLE);
3179         if ((reg & 0xff) == 0) {
3180                 /* Enable all voltage monitors */
3181                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3182         }
3183 }
3184
3185 /* Check if tachometers are reset manually or by some reason */
3186 static void it87_check_tachometers_reset(struct platform_device *pdev)
3187 {
3188         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3189         struct it87_data *data = platform_get_drvdata(pdev);
3190         u8 mask, fan_main_ctrl;
3191
3192         mask = 0x70 & ~(sio_data->skip_fan << 4);
3193         fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3194         if ((fan_main_ctrl & mask) == 0) {
3195                 /* Enable all fan tachometers */
3196                 fan_main_ctrl |= mask;
3197                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3198                                  fan_main_ctrl);
3199         }
3200 }
3201
3202 /* Set tachometers to 16-bit mode if needed */
3203 static void it87_check_tachometers_16bit_mode(struct platform_device *pdev)
3204 {
3205         struct it87_data *data = platform_get_drvdata(pdev);
3206         int reg;
3207
3208         if (!has_fan16_config(data))
3209                 return;
3210
3211         reg = it87_read_value(data, IT87_REG_FAN_16BIT);
3212         if (~reg & 0x07 & data->has_fan) {
3213                 dev_dbg(&pdev->dev,
3214                         "Setting fan1-3 to 16-bit mode\n");
3215                 it87_write_value(data, IT87_REG_FAN_16BIT,
3216                                  reg | 0x07);
3217         }
3218 }
3219
3220 static void it87_start_monitoring(struct it87_data *data)
3221 {
3222         it87_write_value(data, IT87_REG_CONFIG,
3223                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3224                          | (update_vbat ? 0x41 : 0x01));
3225 }
3226
3227 /* Called when we have found a new IT87. */
3228 static void it87_init_device(struct platform_device *pdev)
3229 {
3230         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3231         struct it87_data *data = platform_get_drvdata(pdev);
3232         int tmp, i;
3233
3234         /*
3235          * For each PWM channel:
3236          * - If it is in automatic mode, setting to manual mode should set
3237          *   the fan to full speed by default.
3238          * - If it is in manual mode, we need a mapping to temperature
3239          *   channels to use when later setting to automatic mode later.
3240          *   Use a 1:1 mapping by default (we are clueless.)
3241          * In both cases, the value can (and should) be changed by the user
3242          * prior to switching to a different mode.
3243          * Note that this is no longer needed for the IT8721F and later, as
3244          * these have separate registers for the temperature mapping and the
3245          * manual duty cycle.
3246          */
3247         for (i = 0; i < NUM_AUTO_PWM; i++) {
3248                 data->pwm_temp_map[i] = i;
3249                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3250                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3251         }
3252
3253         it87_check_limit_regs(data);
3254
3255         /*
3256          * Temperature channels are not forcibly enabled, as they can be
3257          * set to two different sensor types and we can't guess which one
3258          * is correct for a given system. These channels can be enabled at
3259          * run-time through the temp{1-3}_type sysfs accessors if needed.
3260          */
3261
3262         it87_check_voltage_monitors_reset(data);
3263
3264         it87_check_tachometers_reset(pdev);
3265
3266         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3267         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3268
3269         it87_check_tachometers_16bit_mode(pdev);
3270
3271         /* Check for additional fans */
3272         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3273
3274         if (has_four_fans(data) && (tmp & BIT(4)))
3275                 data->has_fan |= BIT(3); /* fan4 enabled */
3276         if (has_five_fans(data) && (tmp & BIT(5)))
3277                 data->has_fan |= BIT(4); /* fan5 enabled */
3278         if (has_six_fans(data) && (tmp & BIT(2)))
3279                 data->has_fan |= BIT(5); /* fan6 enabled */
3280
3281         /* Fan input pins may be used for alternative functions */
3282         data->has_fan &= ~sio_data->skip_fan;
3283
3284         /* Check if pwm5, pwm6 are enabled */
3285         if (has_six_pwm(data)) {
3286                 /* The following code may be IT8620E specific */
3287                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3288                 if ((tmp & 0xc0) == 0xc0)
3289                         sio_data->skip_pwm |= BIT(4);
3290                 if (!(tmp & BIT(3)))
3291                         sio_data->skip_pwm |= BIT(5);
3292         }
3293
3294         it87_start_monitoring(data);
3295 }
3296
3297 /* Return 1 if and only if the PWM interface is safe to use */
3298 static int it87_check_pwm(struct device *dev)
3299 {
3300         struct it87_data *data = dev_get_drvdata(dev);
3301         /*
3302          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3303          * and polarity set to active low is sign that this is the case so we
3304          * disable pwm control to protect the user.
3305          */
3306         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3307
3308         if ((tmp & 0x87) == 0) {
3309                 if (fix_pwm_polarity) {
3310                         /*
3311                          * The user asks us to attempt a chip reconfiguration.
3312                          * This means switching to active high polarity and
3313                          * inverting all fan speed values.
3314                          */
3315                         int i;
3316                         u8 pwm[3];
3317
3318                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3319                                 pwm[i] = it87_read_value(data,
3320                                                          IT87_REG_PWM[i]);
3321
3322                         /*
3323                          * If any fan is in automatic pwm mode, the polarity
3324                          * might be correct, as suspicious as it seems, so we
3325                          * better don't change anything (but still disable the
3326                          * PWM interface).
3327                          */
3328                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3329                                 dev_info(dev,
3330                                          "Reconfiguring PWM to active high polarity\n");
3331                                 it87_write_value(data, IT87_REG_FAN_CTL,
3332                                                  tmp | 0x87);
3333                                 for (i = 0; i < 3; i++)
3334                                         it87_write_value(data,
3335                                                          IT87_REG_PWM[i],
3336                                                          0x7f & ~pwm[i]);
3337                                 return 1;
3338                         }
3339
3340                         dev_info(dev,
3341                                  "PWM configuration is too broken to be fixed\n");
3342                 }
3343
3344                 return 0;
3345         } else if (fix_pwm_polarity) {
3346                 dev_info(dev,
3347                          "PWM configuration looks sane, won't touch\n");
3348         }
3349
3350         return 1;
3351 }
3352
3353 static int it87_probe(struct platform_device *pdev)
3354 {
3355         struct it87_data *data;
3356         struct resource *res;
3357         struct device *dev = &pdev->dev;
3358         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3359         int enable_pwm_interface;
3360         struct device *hwmon_dev;
3361         int err;
3362
3363         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3364         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3365                                  DRVNAME)) {
3366                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3367                         (unsigned long)res->start,
3368                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3369                 return -EBUSY;
3370         }
3371
3372         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3373         if (!data)
3374                 return -ENOMEM;
3375
3376         data->addr = res->start;
3377         data->sioaddr = sio_data->sioaddr;
3378         data->type = sio_data->type;
3379         data->smbus_bitmap = sio_data->smbus_bitmap;
3380         data->ec_special_config = sio_data->ec_special_config;
3381         data->features = it87_devices[sio_data->type].features;
3382         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3383         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3384         /*
3385          * IT8705F Datasheet 0.4.1, 3h == Version G.
3386          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3387          * These are the first revisions with 16-bit tachometer support.
3388          */
3389         switch (data->type) {
3390         case it87:
3391                 if (sio_data->revision >= 0x03) {
3392                         data->features &= ~FEAT_OLD_AUTOPWM;
3393                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3394                 }
3395                 break;
3396         case it8712:
3397                 if (sio_data->revision >= 0x08) {
3398                         data->features &= ~FEAT_OLD_AUTOPWM;
3399                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3400                                           FEAT_FIVE_FANS;
3401                 }
3402                 break;
3403         default:
3404                 break;
3405         }
3406
3407         platform_set_drvdata(pdev, data);
3408
3409         mutex_init(&data->update_lock);
3410
3411         err = smbus_disable(data);
3412         if (err)
3413                 return err;
3414
3415         /* Now, we do the remaining detection. */
3416         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3417             it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
3418                 smbus_enable(data);
3419                 return -ENODEV;
3420         }
3421
3422         /* Check PWM configuration */
3423         enable_pwm_interface = it87_check_pwm(dev);
3424         if (!enable_pwm_interface)
3425                 dev_info(dev,
3426                          "Detected broken BIOS defaults, disabling PWM interface\n");
3427
3428         /* Starting with IT8721F, we handle scaling of internal voltages */
3429         if (has_scaling(data)) {
3430                 if (sio_data->internal & BIT(0))
3431                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3432                 if (sio_data->internal & BIT(1))
3433                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3434                 if (sio_data->internal & BIT(2))
3435                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3436                 if (sio_data->internal & BIT(3))
3437                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3438         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3439                    sio_data->type == it8783) {
3440                 if (sio_data->internal & BIT(0))
3441                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3442                 if (sio_data->internal & BIT(1))
3443                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3444         }
3445
3446         data->has_temp = 0x07;
3447         if (sio_data->skip_temp & BIT(2)) {
3448                 if (sio_data->type == it8782 &&
3449                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3450                         data->has_temp &= ~BIT(2);
3451         }
3452
3453         data->in_internal = sio_data->internal;
3454         data->need_in7_reroute = sio_data->need_in7_reroute;
3455         data->has_in = 0x3ff & ~sio_data->skip_in;
3456
3457         if (has_four_temp(data)) {
3458                 data->has_temp |= BIT(3);
3459         } else if (has_six_temp(data)) {
3460                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3461
3462                 /* Check for additional temperature sensors */
3463                 if ((reg & 0x03) >= 0x02)
3464                         data->has_temp |= BIT(3);
3465                 if (((reg >> 2) & 0x03) >= 0x02)
3466                         data->has_temp |= BIT(4);
3467                 if (((reg >> 4) & 0x03) >= 0x02)
3468                         data->has_temp |= BIT(5);
3469
3470                 /* Check for additional voltage sensors */
3471                 if ((reg & 0x03) == 0x01)
3472                         data->has_in |= BIT(10);
3473                 if (((reg >> 2) & 0x03) == 0x01)
3474                         data->has_in |= BIT(11);
3475                 if (((reg >> 4) & 0x03) == 0x01)
3476                         data->has_in |= BIT(12);
3477         }
3478
3479         data->has_beep = !!sio_data->beep_pin;
3480
3481         /* Initialize the IT87 chip */
3482         it87_init_device(pdev);
3483
3484         smbus_enable(data);
3485
3486         if (!sio_data->skip_vid) {
3487                 data->has_vid = true;
3488                 data->vrm = vid_which_vrm();
3489                 /* VID reading from Super-I/O config space if available */
3490                 data->vid = sio_data->vid_value;
3491         }
3492
3493         /* Prepare for sysfs hooks */
3494         data->groups[0] = &it87_group;
3495         data->groups[1] = &it87_group_in;
3496         data->groups[2] = &it87_group_temp;
3497         data->groups[3] = &it87_group_fan;
3498
3499         if (enable_pwm_interface) {
3500                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3501                 data->has_pwm &= ~sio_data->skip_pwm;
3502
3503                 data->groups[4] = &it87_group_pwm;
3504                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3505                         data->groups[5] = &it87_group_auto_pwm;
3506         }
3507
3508         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3509                                         it87_devices[sio_data->type].name,
3510                                         data, data->groups);
3511         return PTR_ERR_OR_ZERO(hwmon_dev);
3512 }
3513
3514 static void it87_resume_sio(struct platform_device *pdev)
3515 {
3516         struct it87_data *data = dev_get_drvdata(&pdev->dev);
3517         int err;
3518         int reg2c;
3519
3520         if (!data->need_in7_reroute)
3521                 return;
3522
3523         err = superio_enter(data->sioaddr);
3524         if (err) {
3525                 dev_warn(&pdev->dev,
3526                          "Unable to enter Super I/O to reroute in7 (%d)",
3527                          err);
3528                 return;
3529         }
3530
3531         superio_select(data->sioaddr, GPIO);
3532
3533         reg2c = superio_inb(data->sioaddr, IT87_SIO_PINX2_REG);
3534         if (!(reg2c & BIT(1))) {
3535                 dev_dbg(&pdev->dev,
3536                         "Routing internal VCCH5V to in7 again");
3537
3538                 reg2c |= BIT(1);
3539                 superio_outb(data->sioaddr, IT87_SIO_PINX2_REG,
3540                              reg2c);
3541         }
3542
3543         superio_exit(data->sioaddr, has_conf_noexit(data));
3544 }
3545
3546 static int it87_resume(struct device *dev)
3547 {
3548         struct platform_device *pdev = to_platform_device(dev);
3549         struct it87_data *data = dev_get_drvdata(dev);
3550
3551         it87_resume_sio(pdev);
3552
3553         it87_lock(data);
3554
3555         it87_check_pwm(dev);
3556         it87_check_limit_regs(data);
3557         it87_check_voltage_monitors_reset(data);
3558         it87_check_tachometers_reset(pdev);
3559         it87_check_tachometers_16bit_mode(pdev);
3560
3561         it87_start_monitoring(data);
3562
3563         /* force update */
3564         data->valid = false;
3565
3566         it87_unlock(data);
3567
3568         it87_update_device(dev);
3569
3570         return 0;
3571 }
3572
3573 static DEFINE_SIMPLE_DEV_PM_OPS(it87_dev_pm_ops, NULL, it87_resume);
3574
3575 static struct platform_driver it87_driver = {
3576         .driver = {
3577                 .name   = DRVNAME,
3578                 .pm     = pm_sleep_ptr(&it87_dev_pm_ops),
3579         },
3580         .probe  = it87_probe,
3581 };
3582
3583 static int __init it87_device_add(int index, unsigned short address,
3584                                   const struct it87_sio_data *sio_data)
3585 {
3586         struct platform_device *pdev;
3587         struct resource res = {
3588                 .start  = address + IT87_EC_OFFSET,
3589                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3590                 .name   = DRVNAME,
3591                 .flags  = IORESOURCE_IO,
3592         };
3593         int err;
3594
3595         err = acpi_check_resource_conflict(&res);
3596         if (err) {
3597                 if (!ignore_resource_conflict)
3598                         return err;
3599         }
3600
3601         pdev = platform_device_alloc(DRVNAME, address);
3602         if (!pdev)
3603                 return -ENOMEM;
3604
3605         err = platform_device_add_resources(pdev, &res, 1);
3606         if (err) {
3607                 pr_err("Device resource addition failed (%d)\n", err);
3608                 goto exit_device_put;
3609         }
3610
3611         err = platform_device_add_data(pdev, sio_data,
3612                                        sizeof(struct it87_sio_data));
3613         if (err) {
3614                 pr_err("Platform data allocation failed\n");
3615                 goto exit_device_put;
3616         }
3617
3618         err = platform_device_add(pdev);
3619         if (err) {
3620                 pr_err("Device addition failed (%d)\n", err);
3621                 goto exit_device_put;
3622         }
3623
3624         it87_pdev[index] = pdev;
3625         return 0;
3626
3627 exit_device_put:
3628         platform_device_put(pdev);
3629         return err;
3630 }
3631
3632 /* callback function for DMI */
3633 static int it87_dmi_cb(const struct dmi_system_id *dmi_entry)
3634 {
3635         dmi_data = dmi_entry->driver_data;
3636
3637         if (dmi_data && dmi_data->skip_pwm)
3638                 pr_info("Disabling pwm2 due to hardware constraints\n");
3639
3640         return 1;
3641 }
3642
3643 /*
3644  * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip
3645  * (IT8792E) needs to be in configuration mode before accessing the first
3646  * due to a bug in IT8792E which otherwise results in LPC bus access errors.
3647  * This needs to be done before accessing the first Super-IO chip since
3648  * the second chip may have been accessed prior to loading this driver.
3649  *
3650  * The problem is also reported to affect IT8795E, which is used on X299 boards
3651  * and has the same chip ID as IT8792E (0x8733). It also appears to affect
3652  * systems with IT8790E, which is used on some Z97X-Gaming boards as well as
3653  * Z87X-OC.
3654  * DMI entries for those systems will be added as they become available and
3655  * as the problem is confirmed to affect those boards.
3656  */
3657 static int it87_sio_force(const struct dmi_system_id *dmi_entry)
3658 {
3659         __superio_enter(REG_4E);
3660
3661         return it87_dmi_cb(dmi_entry);
3662 };
3663
3664 /*
3665  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3666  * connected to a fan, but to something else. One user
3667  * has reported instant system power-off when changing
3668  * the PWM2 duty cycle, so we disable it.
3669  * I use the board name string as the trigger in case
3670  * the same board is ever used in other systems.
3671  */
3672 static struct it87_dmi_data nvidia_fn68pt = {
3673         .skip_pwm = BIT(1),
3674 };
3675
3676 #define IT87_DMI_MATCH_VND(vendor, name, cb, data) \
3677         { \
3678                 .callback = cb, \
3679                 .matches = { \
3680                         DMI_EXACT_MATCH(DMI_BOARD_VENDOR, vendor), \
3681                         DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \
3682                 }, \
3683                 .driver_data = data, \
3684         }
3685
3686 #define IT87_DMI_MATCH_GBT(name, cb, data) \
3687         IT87_DMI_MATCH_VND("Gigabyte Technology Co., Ltd.", name, cb, data)
3688
3689 static const struct dmi_system_id it87_dmi_table[] __initconst = {
3690         IT87_DMI_MATCH_GBT("AB350", it87_sio_force, NULL),
3691                 /* ? + IT8792E/IT8795E */
3692         IT87_DMI_MATCH_GBT("AX370", it87_sio_force, NULL),
3693                 /* ? + IT8792E/IT8795E */
3694         IT87_DMI_MATCH_GBT("Z97X-Gaming G1", it87_sio_force, NULL),
3695                 /* ? + IT8790E */
3696         IT87_DMI_MATCH_GBT("TRX40 AORUS XTREME", it87_sio_force, NULL),
3697                 /* IT8688E + IT8792E/IT8795E */
3698         IT87_DMI_MATCH_GBT("Z390 AORUS ULTRA-CF", it87_sio_force, NULL),
3699                 /* IT8688E + IT8792E/IT8795E */
3700         IT87_DMI_MATCH_GBT("B550 AORUS PRO AC", it87_sio_force, NULL),
3701                 /* IT8688E + IT8792E/IT8795E */
3702         IT87_DMI_MATCH_GBT("X570 AORUS MASTER", it87_sio_force, NULL),
3703                 /* IT8688E + IT8792E/IT8795E */
3704         IT87_DMI_MATCH_GBT("X570 AORUS PRO", it87_sio_force, NULL),
3705                 /* IT8688E + IT8792E/IT8795E */
3706         IT87_DMI_MATCH_GBT("X570 AORUS PRO WIFI", it87_sio_force, NULL),
3707                 /* IT8688E + IT8792E/IT8795E */
3708         IT87_DMI_MATCH_GBT("X570S AERO G", it87_sio_force, NULL),
3709                 /* IT8689E + IT87952E */
3710         IT87_DMI_MATCH_GBT("Z690 AORUS PRO DDR4", it87_sio_force, NULL),
3711                 /* IT8689E + IT87952E */
3712         IT87_DMI_MATCH_GBT("Z690 AORUS PRO", it87_sio_force, NULL),
3713                 /* IT8689E + IT87952E */
3714         IT87_DMI_MATCH_VND("nVIDIA", "FN68PT", it87_dmi_cb, &nvidia_fn68pt),
3715         { }
3716
3717 };
3718 MODULE_DEVICE_TABLE(dmi, it87_dmi_table);
3719
3720 static int __init sm_it87_init(void)
3721 {
3722         int sioaddr[2] = { REG_2E, REG_4E };
3723         struct it87_sio_data sio_data;
3724         unsigned short isa_address[2];
3725         bool found = false;
3726         int i, err;
3727
3728         err = platform_driver_register(&it87_driver);
3729         if (err)
3730                 return err;
3731
3732         dmi_check_system(it87_dmi_table);
3733
3734         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3735                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3736                 isa_address[i] = 0;
3737                 err = it87_find(sioaddr[i], &isa_address[i], &sio_data, i);
3738                 if (err || isa_address[i] == 0)
3739                         continue;
3740                 /*
3741                  * Don't register second chip if its ISA address matches
3742                  * the first chip's ISA address.
3743                  */
3744                 if (i && isa_address[i] == isa_address[0])
3745                         break;
3746
3747                 err = it87_device_add(i, isa_address[i], &sio_data);
3748                 if (err)
3749                         goto exit_dev_unregister;
3750
3751                 found = true;
3752
3753                 /*
3754                  * IT8705F may respond on both SIO addresses.
3755                  * Stop probing after finding one.
3756                  */
3757                 if (sio_data.type == it87)
3758                         break;
3759         }
3760
3761         if (!found) {
3762                 err = -ENODEV;
3763                 goto exit_unregister;
3764         }
3765         return 0;
3766
3767 exit_dev_unregister:
3768         /* NULL check handled by platform_device_unregister */
3769         platform_device_unregister(it87_pdev[0]);
3770 exit_unregister:
3771         platform_driver_unregister(&it87_driver);
3772         return err;
3773 }
3774
3775 static void __exit sm_it87_exit(void)
3776 {
3777         /* NULL check handled by platform_device_unregister */
3778         platform_device_unregister(it87_pdev[1]);
3779         platform_device_unregister(it87_pdev[0]);
3780         platform_driver_unregister(&it87_driver);
3781 }
3782
3783 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3784 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3785
3786 module_param_array(force_id, ushort, &force_id_cnt, 0);
3787 MODULE_PARM_DESC(force_id, "Override one or more detected device ID(s)");
3788
3789 module_param(ignore_resource_conflict, bool, 0);
3790 MODULE_PARM_DESC(ignore_resource_conflict, "Ignore ACPI resource conflict");
3791
3792 module_param(update_vbat, bool, 0);
3793 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3794
3795 module_param(fix_pwm_polarity, bool, 0);
3796 MODULE_PARM_DESC(fix_pwm_polarity,
3797                  "Force PWM polarity to active high (DANGEROUS)");
3798
3799 MODULE_LICENSE("GPL");
3800
3801 module_init(sm_it87_init);
3802 module_exit(sm_it87_exit);