2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/smp.h>
38 #include <linux/moduleparam.h>
39 #include <linux/pci.h>
41 #include <asm/processor.h>
42 #include <asm/cpu_device_id.h>
44 #define DRVNAME "coretemp"
47 * force_tjmax only matters when TjMax can't be read from the CPU itself.
48 * When set, it replaces the driver's suboptimal heuristic.
50 static int force_tjmax;
51 module_param_named(tjmax, force_tjmax, int, 0444);
52 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
54 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
55 #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
56 #define CORETEMP_NAME_LENGTH 19 /* String Length of attrs */
57 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
58 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
59 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
61 #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
62 #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
63 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
66 #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
68 #define for_each_sibling(i, cpu) for (i = 0; false; )
72 * Per-Core Temperature Data
73 * @last_updated: The time when the current temperature value was updated
74 * earlier (in jiffies).
75 * @cpu_core_id: The CPU Core from which temperature values should be read
76 * This value is passed as "id" field to rdmsr/wrmsr functions.
77 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
78 * from where the temperature values should be read.
79 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
80 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
81 * Otherwise, temp_data holds coretemp data.
82 * @valid: If this is 1, the current temperature is valid.
88 unsigned long last_updated;
95 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
96 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
97 struct mutex update_lock;
100 /* Platform Data per Physical CPU */
101 struct platform_data {
102 struct device *hwmon_dev;
104 struct temp_data *core_data[MAX_CORE_DATA];
105 struct device_attribute name_attr;
109 struct list_head list;
110 struct platform_device *pdev;
114 static LIST_HEAD(pdev_list);
115 static DEFINE_MUTEX(pdev_list_mutex);
117 static ssize_t show_name(struct device *dev,
118 struct device_attribute *devattr, char *buf)
120 return sprintf(buf, "%s\n", DRVNAME);
123 static ssize_t show_label(struct device *dev,
124 struct device_attribute *devattr, char *buf)
126 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
127 struct platform_data *pdata = dev_get_drvdata(dev);
128 struct temp_data *tdata = pdata->core_data[attr->index];
130 if (tdata->is_pkg_data)
131 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
133 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
136 static ssize_t show_crit_alarm(struct device *dev,
137 struct device_attribute *devattr, char *buf)
140 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
141 struct platform_data *pdata = dev_get_drvdata(dev);
142 struct temp_data *tdata = pdata->core_data[attr->index];
144 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
146 return sprintf(buf, "%d\n", (eax >> 5) & 1);
149 static ssize_t show_tjmax(struct device *dev,
150 struct device_attribute *devattr, char *buf)
152 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
153 struct platform_data *pdata = dev_get_drvdata(dev);
155 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
158 static ssize_t show_ttarget(struct device *dev,
159 struct device_attribute *devattr, char *buf)
161 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
162 struct platform_data *pdata = dev_get_drvdata(dev);
164 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
167 static ssize_t show_temp(struct device *dev,
168 struct device_attribute *devattr, char *buf)
171 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
172 struct platform_data *pdata = dev_get_drvdata(dev);
173 struct temp_data *tdata = pdata->core_data[attr->index];
175 mutex_lock(&tdata->update_lock);
177 /* Check whether the time interval has elapsed */
178 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
179 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
181 /* Check whether the data is valid */
182 if (eax & 0x80000000) {
183 tdata->temp = tdata->tjmax -
184 ((eax >> 16) & 0x7f) * 1000;
187 tdata->last_updated = jiffies;
190 mutex_unlock(&tdata->update_lock);
191 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
199 static const struct tjmax_pci tjmax_pci_table[] = {
200 { 0x0c72, 102000 }, /* Atom S1240 (Centerton) */
201 { 0x0c73, 95000 }, /* Atom S1220 (Centerton) */
202 { 0x0c75, 95000 }, /* Atom S1260 (Centerton) */
210 static const struct tjmax tjmax_table[] = {
211 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
212 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
213 { "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 Sodaville */
214 { "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */
215 { "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */
226 static const struct tjmax_model tjmax_model_table[] = {
227 { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
228 { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
229 * Note: Also matches 230 and 330,
230 * which are covered by tjmax_table
232 { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
233 * Note: TjMax for E6xxT is 110C, but CPU type
234 * is undetectable by software
236 { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
237 { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */
238 { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
239 * Also matches S12x0 (stepping 9), covered by
244 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
246 /* The 100C is default for both mobile and non mobile CPUs */
249 int tjmax_ee = 85000;
254 struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
257 * Explicit tjmax table entries override heuristics.
258 * First try PCI host bridge IDs, followed by model ID strings
259 * and model/stepping information.
261 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
262 for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
263 if (host_bridge->device == tjmax_pci_table[i].device)
264 return tjmax_pci_table[i].tjmax;
268 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
269 if (strstr(c->x86_model_id, tjmax_table[i].id))
270 return tjmax_table[i].tjmax;
273 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
274 const struct tjmax_model *tm = &tjmax_model_table[i];
275 if (c->x86_model == tm->model &&
276 (tm->mask == ANY || c->x86_mask == tm->mask))
280 /* Early chips have no MSR for TjMax */
282 if (c->x86_model == 0xf && c->x86_mask < 4)
285 if (c->x86_model > 0xe && usemsr_ee) {
289 * Now we can detect the mobile CPU using Intel provided table
290 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
291 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
293 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
296 "Unable to access MSR 0x17, assuming desktop"
299 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
301 * Trust bit 28 up to Penryn, I could not find any
302 * documentation on that; if you happen to know
303 * someone at Intel please ask
307 /* Platform ID bits 52:50 (EDX starts at bit 32) */
308 platform_id = (edx >> 18) & 0x7;
311 * Mobile Penryn CPU seems to be platform ID 7 or 5
314 if (c->x86_model == 0x17 &&
315 (platform_id == 5 || platform_id == 7)) {
317 * If MSR EE bit is set, set it to 90 degrees C,
318 * otherwise 105 degrees C
327 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
330 "Unable to access MSR 0xEE, for Tjmax, left"
332 } else if (eax & 0x40000000) {
335 } else if (tjmax == 100000) {
337 * If we don't use msr EE it means we are desktop CPU
338 * (with exeception of Atom)
340 dev_warn(dev, "Using relative temperature scale!\n");
346 static bool cpu_has_tjmax(struct cpuinfo_x86 *c)
348 u8 model = c->x86_model;
350 return model > 0xe &&
358 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
365 * A new feature of current Intel(R) processors, the
366 * IA32_TEMPERATURE_TARGET contains the TjMax value
368 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
370 if (cpu_has_tjmax(c))
371 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
373 val = (eax >> 16) & 0xff;
375 * If the TjMax is not plausible, an assumption
379 dev_dbg(dev, "TjMax is %d degrees C\n", val);
385 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
387 return force_tjmax * 1000;
391 * An assumption is made for early CPUs and unreadable MSR.
392 * NOTE: the calculated value may not be correct.
394 return adjust_tjmax(c, id, dev);
397 static int create_name_attr(struct platform_data *pdata,
400 sysfs_attr_init(&pdata->name_attr.attr);
401 pdata->name_attr.attr.name = "name";
402 pdata->name_attr.attr.mode = S_IRUGO;
403 pdata->name_attr.show = show_name;
404 return device_create_file(dev, &pdata->name_attr);
407 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
411 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
412 struct device_attribute *devattr, char *buf) = {
413 show_label, show_crit_alarm, show_temp, show_tjmax,
415 static const char *const names[TOTAL_ATTRS] = {
416 "temp%d_label", "temp%d_crit_alarm",
417 "temp%d_input", "temp%d_crit",
420 for (i = 0; i < tdata->attr_size; i++) {
421 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
423 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
424 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
425 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
426 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
427 tdata->sd_attrs[i].index = attr_no;
428 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
436 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
441 static int chk_ucode_version(unsigned int cpu)
443 struct cpuinfo_x86 *c = &cpu_data(cpu);
446 * Check if we have problem with errata AE18 of Core processors:
447 * Readings might stop update when processor visited too deep sleep,
448 * fixed for stepping D0 (6EC).
450 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
451 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
457 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
459 u16 phys_proc_id = TO_PHYS_ID(cpu);
460 struct pdev_entry *p;
462 mutex_lock(&pdev_list_mutex);
464 list_for_each_entry(p, &pdev_list, list)
465 if (p->phys_proc_id == phys_proc_id) {
466 mutex_unlock(&pdev_list_mutex);
470 mutex_unlock(&pdev_list_mutex);
474 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
476 struct temp_data *tdata;
478 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
482 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
483 MSR_IA32_THERM_STATUS;
484 tdata->is_pkg_data = pkg_flag;
486 tdata->cpu_core_id = TO_CORE_ID(cpu);
487 tdata->attr_size = MAX_CORE_ATTRS;
488 mutex_init(&tdata->update_lock);
492 static int create_core_data(struct platform_device *pdev, unsigned int cpu,
495 struct temp_data *tdata;
496 struct platform_data *pdata = platform_get_drvdata(pdev);
497 struct cpuinfo_x86 *c = &cpu_data(cpu);
502 * Find attr number for sysfs:
503 * We map the attr number to core id of the CPU
504 * The attr number is always core id + 2
505 * The Pkgtemp will always show up as temp1_*, if available
507 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
509 if (attr_no > MAX_CORE_DATA - 1)
513 * Provide a single set of attributes for all HT siblings of a core
514 * to avoid duplicate sensors (the processor ID and core ID of all
515 * HT siblings of a core are the same).
516 * Skip if a HT sibling of this core is already registered.
517 * This is not an error.
519 if (pdata->core_data[attr_no] != NULL)
522 tdata = init_temp_data(cpu, pkg_flag);
526 /* Test if we can access the status register */
527 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
531 /* We can access status register. Get Critical Temperature */
532 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
535 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
536 * The target temperature is available on older CPUs but not in this
537 * register. Atoms don't have the register at all.
539 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
540 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
544 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
549 pdata->core_data[attr_no] = tdata;
551 /* Create sysfs interfaces */
552 err = create_core_attrs(tdata, &pdev->dev, attr_no);
558 pdata->core_data[attr_no] = NULL;
563 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
565 struct platform_device *pdev = coretemp_get_pdev(cpu);
571 err = create_core_data(pdev, cpu, pkg_flag);
573 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
576 static void coretemp_remove_core(struct platform_data *pdata,
577 struct device *dev, int indx)
580 struct temp_data *tdata = pdata->core_data[indx];
582 /* Remove the sysfs attributes */
583 for (i = 0; i < tdata->attr_size; i++)
584 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
586 kfree(pdata->core_data[indx]);
587 pdata->core_data[indx] = NULL;
590 static int coretemp_probe(struct platform_device *pdev)
592 struct platform_data *pdata;
595 /* Initialize the per-package data structures */
596 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
600 err = create_name_attr(pdata, &pdev->dev);
604 pdata->phys_proc_id = pdev->id;
605 platform_set_drvdata(pdev, pdata);
607 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
608 if (IS_ERR(pdata->hwmon_dev)) {
609 err = PTR_ERR(pdata->hwmon_dev);
610 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
616 device_remove_file(&pdev->dev, &pdata->name_attr);
622 static int coretemp_remove(struct platform_device *pdev)
624 struct platform_data *pdata = platform_get_drvdata(pdev);
627 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
628 if (pdata->core_data[i])
629 coretemp_remove_core(pdata, &pdev->dev, i);
631 device_remove_file(&pdev->dev, &pdata->name_attr);
632 hwmon_device_unregister(pdata->hwmon_dev);
637 static struct platform_driver coretemp_driver = {
639 .owner = THIS_MODULE,
642 .probe = coretemp_probe,
643 .remove = coretemp_remove,
646 static int coretemp_device_add(unsigned int cpu)
649 struct platform_device *pdev;
650 struct pdev_entry *pdev_entry;
652 mutex_lock(&pdev_list_mutex);
654 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
657 pr_err("Device allocation failed\n");
661 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
664 goto exit_device_put;
667 err = platform_device_add(pdev);
669 pr_err("Device addition failed (%d)\n", err);
670 goto exit_device_free;
673 pdev_entry->pdev = pdev;
674 pdev_entry->phys_proc_id = pdev->id;
676 list_add_tail(&pdev_entry->list, &pdev_list);
677 mutex_unlock(&pdev_list_mutex);
684 platform_device_put(pdev);
686 mutex_unlock(&pdev_list_mutex);
690 static void coretemp_device_remove(unsigned int cpu)
692 struct pdev_entry *p, *n;
693 u16 phys_proc_id = TO_PHYS_ID(cpu);
695 mutex_lock(&pdev_list_mutex);
696 list_for_each_entry_safe(p, n, &pdev_list, list) {
697 if (p->phys_proc_id != phys_proc_id)
699 platform_device_unregister(p->pdev);
703 mutex_unlock(&pdev_list_mutex);
706 static bool is_any_core_online(struct platform_data *pdata)
710 /* Find online cores, except pkgtemp data */
711 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
712 if (pdata->core_data[i] &&
713 !pdata->core_data[i]->is_pkg_data) {
720 static void get_core_online(unsigned int cpu)
722 struct cpuinfo_x86 *c = &cpu_data(cpu);
723 struct platform_device *pdev = coretemp_get_pdev(cpu);
727 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
728 * sensors. We check this bit only, all the early CPUs
729 * without thermal sensors will be filtered out.
731 if (!cpu_has(c, X86_FEATURE_DTHERM))
735 /* Check the microcode version of the CPU */
736 if (chk_ucode_version(cpu))
740 * Alright, we have DTS support.
741 * We are bringing the _first_ core in this pkg
742 * online. So, initialize per-pkg data structures and
743 * then bring this core online.
745 err = coretemp_device_add(cpu);
749 * Check whether pkgtemp support is available.
750 * If so, add interfaces for pkgtemp.
752 if (cpu_has(c, X86_FEATURE_PTS))
753 coretemp_add_core(cpu, 1);
756 * Physical CPU device already exists.
757 * So, just add interfaces for this core.
759 coretemp_add_core(cpu, 0);
762 static void put_core_offline(unsigned int cpu)
765 struct platform_data *pdata;
766 struct platform_device *pdev = coretemp_get_pdev(cpu);
768 /* If the physical CPU device does not exist, just return */
772 pdata = platform_get_drvdata(pdev);
774 indx = TO_ATTR_NO(cpu);
776 /* The core id is too big, just return */
777 if (indx > MAX_CORE_DATA - 1)
780 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
781 coretemp_remove_core(pdata, &pdev->dev, indx);
784 * If a HT sibling of a core is taken offline, but another HT sibling
785 * of the same core is still online, register the alternate sibling.
786 * This ensures that exactly one set of attributes is provided as long
787 * as at least one HT sibling of a core is online.
789 for_each_sibling(i, cpu) {
793 * Display temperature sensor data for one HT sibling
794 * per core only, so abort the loop after one such
795 * sibling has been found.
801 * If all cores in this pkg are offline, remove the device.
802 * coretemp_device_remove calls unregister_platform_device,
803 * which in turn calls coretemp_remove. This removes the
804 * pkgtemp entry and does other clean ups.
806 if (!is_any_core_online(pdata))
807 coretemp_device_remove(cpu);
810 static int coretemp_cpu_callback(struct notifier_block *nfb,
811 unsigned long action, void *hcpu)
813 unsigned int cpu = (unsigned long) hcpu;
817 case CPU_DOWN_FAILED:
818 get_core_online(cpu);
820 case CPU_DOWN_PREPARE:
821 put_core_offline(cpu);
827 static struct notifier_block coretemp_cpu_notifier __refdata = {
828 .notifier_call = coretemp_cpu_callback,
831 static const struct x86_cpu_id __initconst coretemp_ids[] = {
832 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
835 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
837 static int __init coretemp_init(void)
842 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
843 * sensors. We check this bit only, all the early CPUs
844 * without thermal sensors will be filtered out.
846 if (!x86_match_cpu(coretemp_ids))
849 err = platform_driver_register(&coretemp_driver);
854 for_each_online_cpu(i)
857 #ifndef CONFIG_HOTPLUG_CPU
858 if (list_empty(&pdev_list)) {
861 goto exit_driver_unreg;
865 register_hotcpu_notifier(&coretemp_cpu_notifier);
869 #ifndef CONFIG_HOTPLUG_CPU
871 platform_driver_unregister(&coretemp_driver);
877 static void __exit coretemp_exit(void)
879 struct pdev_entry *p, *n;
882 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
883 mutex_lock(&pdev_list_mutex);
884 list_for_each_entry_safe(p, n, &pdev_list, list) {
885 platform_device_unregister(p->pdev);
889 mutex_unlock(&pdev_list_mutex);
891 platform_driver_unregister(&coretemp_driver);
894 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
895 MODULE_DESCRIPTION("Intel Core temperature monitor");
896 MODULE_LICENSE("GPL");
898 module_init(coretemp_init)
899 module_exit(coretemp_exit)