2 * Copyright (C) 2012-2016 Mentor Graphics Inc.
4 * Queued image conversion support, with tiling and rotation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 #include <linux/interrupt.h>
18 #include <linux/dma-mapping.h>
19 #include <video/imx-ipu-image-convert.h>
23 * The IC Resizer has a restriction that the output frame from the
24 * resizer must be 1024 or less in both width (pixels) and height
27 * The image converter attempts to split up a conversion when
28 * the desired output (converted) frame resolution exceeds the
29 * IC resizer limit of 1024 in either dimension.
31 * If either dimension of the output frame exceeds the limit, the
32 * dimension is split into 1, 2, or 4 equal stripes, for a maximum
33 * of 4*4 or 16 tiles. A conversion is then carried out for each
34 * tile (but taking care to pass the full frame stride length to
35 * the DMA channel's parameter memory!). IDMA double-buffering is used
36 * to convert each tile back-to-back when possible (see note below
37 * when double_buffering boolean is set).
39 * Note that the input frame must be split up into the same number
40 * of tiles as the output frame.
42 * FIXME: at this point there is no attempt to deal with visible seams
43 * at the tile boundaries when upscaling. The seams are caused by a reset
44 * of the bilinear upscale interpolation when starting a new tile. The
45 * seams are barely visible for small upscale factors, but become
46 * increasingly visible as the upscale factor gets larger, since more
47 * interpolated pixels get thrown out at the tile boundaries. A possilble
48 * fix might be to overlap tiles of different sizes, but this must be done
49 * while also maintaining the IDMAC dma buffer address alignment and 8x8 IRT
50 * alignment restrictions of each tile.
53 #define MAX_STRIPES_W 4
54 #define MAX_STRIPES_H 4
55 #define MAX_TILES (MAX_STRIPES_W * MAX_STRIPES_H)
62 enum ipu_image_convert_type {
67 struct ipu_image_convert_dma_buf {
73 struct ipu_image_convert_dma_chan {
83 /* dimensions of one tile */
84 struct ipu_image_tile {
87 /* size and strides are in bytes */
91 /* start Y or packed offset of this tile */
93 /* offset from start to tile in U plane, for planar formats */
95 /* offset from start to tile in V plane, for planar formats */
99 struct ipu_image_convert_image {
100 struct ipu_image base;
101 enum ipu_image_convert_type type;
103 const struct ipu_image_pixfmt *fmt;
106 /* # of rows (horizontal stripes) if dest height is > 1024 */
107 unsigned int num_rows;
108 /* # of columns (vertical stripes) if dest width is > 1024 */
109 unsigned int num_cols;
111 struct ipu_image_tile tile[MAX_TILES];
114 struct ipu_image_pixfmt {
115 u32 fourcc; /* V4L2 fourcc */
116 int bpp; /* total bpp */
117 int uv_width_dec; /* decimation in width for U/V planes */
118 int uv_height_dec; /* decimation in height for U/V planes */
119 bool planar; /* planar format */
120 bool uv_swapped; /* U and V planes are swapped */
121 bool uv_packed; /* partial planar (U and V in same plane) */
124 struct ipu_image_convert_ctx;
125 struct ipu_image_convert_chan;
126 struct ipu_image_convert_priv;
128 struct ipu_image_convert_ctx {
129 struct ipu_image_convert_chan *chan;
131 ipu_image_convert_cb_t complete;
132 void *complete_context;
134 /* Source/destination image data and rotation mode */
135 struct ipu_image_convert_image in;
136 struct ipu_image_convert_image out;
137 enum ipu_rotate_mode rot_mode;
139 /* intermediate buffer for rotation */
140 struct ipu_image_convert_dma_buf rot_intermediate[2];
142 /* current buffer number for double buffering */
146 struct completion aborted;
148 /* can we use double-buffering for this conversion operation? */
149 bool double_buffering;
150 /* num_rows * num_cols */
151 unsigned int num_tiles;
152 /* next tile to process */
153 unsigned int next_tile;
154 /* where to place converted tile in dest image */
155 unsigned int out_tile_map[MAX_TILES];
157 struct list_head list;
160 struct ipu_image_convert_chan {
161 struct ipu_image_convert_priv *priv;
163 enum ipu_ic_task ic_task;
164 const struct ipu_image_convert_dma_chan *dma_ch;
167 struct ipuv3_channel *in_chan;
168 struct ipuv3_channel *out_chan;
169 struct ipuv3_channel *rotation_in_chan;
170 struct ipuv3_channel *rotation_out_chan;
172 /* the IPU end-of-frame irqs */
178 /* list of convert contexts */
179 struct list_head ctx_list;
180 /* queue of conversion runs */
181 struct list_head pending_q;
182 /* queue of completed runs */
183 struct list_head done_q;
185 /* the current conversion run */
186 struct ipu_image_convert_run *current_run;
189 struct ipu_image_convert_priv {
190 struct ipu_image_convert_chan chan[IC_NUM_TASKS];
194 static const struct ipu_image_convert_dma_chan
195 image_convert_dma_chan[IC_NUM_TASKS] = {
196 [IC_TASK_VIEWFINDER] = {
197 .in = IPUV3_CHANNEL_MEM_IC_PRP_VF,
198 .out = IPUV3_CHANNEL_IC_PRP_VF_MEM,
199 .rot_in = IPUV3_CHANNEL_MEM_ROT_VF,
200 .rot_out = IPUV3_CHANNEL_ROT_VF_MEM,
201 .vdi_in_p = IPUV3_CHANNEL_MEM_VDI_PREV,
202 .vdi_in = IPUV3_CHANNEL_MEM_VDI_CUR,
203 .vdi_in_n = IPUV3_CHANNEL_MEM_VDI_NEXT,
205 [IC_TASK_POST_PROCESSOR] = {
206 .in = IPUV3_CHANNEL_MEM_IC_PP,
207 .out = IPUV3_CHANNEL_IC_PP_MEM,
208 .rot_in = IPUV3_CHANNEL_MEM_ROT_PP,
209 .rot_out = IPUV3_CHANNEL_ROT_PP_MEM,
213 static const struct ipu_image_pixfmt image_convert_formats[] = {
215 .fourcc = V4L2_PIX_FMT_RGB565,
218 .fourcc = V4L2_PIX_FMT_RGB24,
221 .fourcc = V4L2_PIX_FMT_BGR24,
224 .fourcc = V4L2_PIX_FMT_RGB32,
227 .fourcc = V4L2_PIX_FMT_BGR32,
230 .fourcc = V4L2_PIX_FMT_YUYV,
235 .fourcc = V4L2_PIX_FMT_UYVY,
240 .fourcc = V4L2_PIX_FMT_YUV420,
246 .fourcc = V4L2_PIX_FMT_YVU420,
253 .fourcc = V4L2_PIX_FMT_NV12,
260 .fourcc = V4L2_PIX_FMT_YUV422P,
266 .fourcc = V4L2_PIX_FMT_NV16,
275 static const struct ipu_image_pixfmt *get_format(u32 fourcc)
277 const struct ipu_image_pixfmt *ret = NULL;
280 for (i = 0; i < ARRAY_SIZE(image_convert_formats); i++) {
281 if (image_convert_formats[i].fourcc == fourcc) {
282 ret = &image_convert_formats[i];
290 static void dump_format(struct ipu_image_convert_ctx *ctx,
291 struct ipu_image_convert_image *ic_image)
293 struct ipu_image_convert_chan *chan = ctx->chan;
294 struct ipu_image_convert_priv *priv = chan->priv;
296 dev_dbg(priv->ipu->dev,
297 "task %u: ctx %p: %s format: %dx%d (%dx%d tiles of size %dx%d), %c%c%c%c\n",
299 ic_image->type == IMAGE_CONVERT_OUT ? "Output" : "Input",
300 ic_image->base.pix.width, ic_image->base.pix.height,
301 ic_image->num_cols, ic_image->num_rows,
302 ic_image->tile[0].width, ic_image->tile[0].height,
303 ic_image->fmt->fourcc & 0xff,
304 (ic_image->fmt->fourcc >> 8) & 0xff,
305 (ic_image->fmt->fourcc >> 16) & 0xff,
306 (ic_image->fmt->fourcc >> 24) & 0xff);
309 int ipu_image_convert_enum_format(int index, u32 *fourcc)
311 const struct ipu_image_pixfmt *fmt;
313 if (index >= (int)ARRAY_SIZE(image_convert_formats))
317 fmt = &image_convert_formats[index];
318 *fourcc = fmt->fourcc;
321 EXPORT_SYMBOL_GPL(ipu_image_convert_enum_format);
323 static void free_dma_buf(struct ipu_image_convert_priv *priv,
324 struct ipu_image_convert_dma_buf *buf)
327 dma_free_coherent(priv->ipu->dev,
328 buf->len, buf->virt, buf->phys);
333 static int alloc_dma_buf(struct ipu_image_convert_priv *priv,
334 struct ipu_image_convert_dma_buf *buf,
337 buf->len = PAGE_ALIGN(size);
338 buf->virt = dma_alloc_coherent(priv->ipu->dev, buf->len, &buf->phys,
339 GFP_DMA | GFP_KERNEL);
341 dev_err(priv->ipu->dev, "failed to alloc dma buffer\n");
348 static inline int num_stripes(int dim)
352 else if (dim <= 2048)
358 static void calc_tile_dimensions(struct ipu_image_convert_ctx *ctx,
359 struct ipu_image_convert_image *image)
363 for (i = 0; i < ctx->num_tiles; i++) {
364 struct ipu_image_tile *tile = &image->tile[i];
366 tile->height = image->base.pix.height / image->num_rows;
367 tile->width = image->base.pix.width / image->num_cols;
368 tile->size = ((tile->height * image->fmt->bpp) >> 3) *
371 if (image->fmt->planar) {
372 tile->stride = tile->width;
373 tile->rot_stride = tile->height;
376 (image->fmt->bpp * tile->width) >> 3;
378 (image->fmt->bpp * tile->height) >> 3;
384 * Use the rotation transformation to find the tile coordinates
385 * (row, col) of a tile in the destination frame that corresponds
386 * to the given tile coordinates of a source frame. The destination
387 * coordinate is then converted to a tile index.
389 static int transform_tile_index(struct ipu_image_convert_ctx *ctx,
390 int src_row, int src_col)
392 struct ipu_image_convert_chan *chan = ctx->chan;
393 struct ipu_image_convert_priv *priv = chan->priv;
394 struct ipu_image_convert_image *s_image = &ctx->in;
395 struct ipu_image_convert_image *d_image = &ctx->out;
396 int dst_row, dst_col;
398 /* with no rotation it's a 1:1 mapping */
399 if (ctx->rot_mode == IPU_ROTATE_NONE)
400 return src_row * s_image->num_cols + src_col;
403 * before doing the transform, first we have to translate
404 * source row,col for an origin in the center of s_image
406 src_row = src_row * 2 - (s_image->num_rows - 1);
407 src_col = src_col * 2 - (s_image->num_cols - 1);
409 /* do the rotation transform */
410 if (ctx->rot_mode & IPU_ROT_BIT_90) {
419 if (ctx->rot_mode & IPU_ROT_BIT_HFLIP)
421 if (ctx->rot_mode & IPU_ROT_BIT_VFLIP)
424 dev_dbg(priv->ipu->dev, "task %u: ctx %p: [%d,%d] --> [%d,%d]\n",
425 chan->ic_task, ctx, src_col, src_row, dst_col, dst_row);
428 * finally translate dest row,col using an origin in upper
431 dst_row += d_image->num_rows - 1;
432 dst_col += d_image->num_cols - 1;
436 return dst_row * d_image->num_cols + dst_col;
440 * Fill the out_tile_map[] with transformed destination tile indeces.
442 static void calc_out_tile_map(struct ipu_image_convert_ctx *ctx)
444 struct ipu_image_convert_image *s_image = &ctx->in;
445 unsigned int row, col, tile = 0;
447 for (row = 0; row < s_image->num_rows; row++) {
448 for (col = 0; col < s_image->num_cols; col++) {
449 ctx->out_tile_map[tile] =
450 transform_tile_index(ctx, row, col);
456 static void calc_tile_offsets_planar(struct ipu_image_convert_ctx *ctx,
457 struct ipu_image_convert_image *image)
459 struct ipu_image_convert_chan *chan = ctx->chan;
460 struct ipu_image_convert_priv *priv = chan->priv;
461 const struct ipu_image_pixfmt *fmt = image->fmt;
462 unsigned int row, col, tile = 0;
463 u32 H, w, h, y_stride, uv_stride;
464 u32 uv_row_off, uv_col_off, uv_off, u_off, v_off, tmp;
465 u32 y_row_off, y_col_off, y_off;
468 /* setup some convenience vars */
469 H = image->base.pix.height;
471 y_stride = image->stride;
472 uv_stride = y_stride / fmt->uv_width_dec;
476 y_size = H * y_stride;
477 uv_size = y_size / (fmt->uv_width_dec * fmt->uv_height_dec);
479 for (row = 0; row < image->num_rows; row++) {
480 w = image->tile[tile].width;
481 h = image->tile[tile].height;
482 y_row_off = row * h * y_stride;
483 uv_row_off = (row * h * uv_stride) / fmt->uv_height_dec;
485 for (col = 0; col < image->num_cols; col++) {
487 uv_col_off = y_col_off / fmt->uv_width_dec;
491 y_off = y_row_off + y_col_off;
492 uv_off = uv_row_off + uv_col_off;
494 u_off = y_size - y_off + uv_off;
495 v_off = (fmt->uv_packed) ? 0 : u_off + uv_size;
496 if (fmt->uv_swapped) {
502 image->tile[tile].offset = y_off;
503 image->tile[tile].u_off = u_off;
504 image->tile[tile++].v_off = v_off;
506 dev_dbg(priv->ipu->dev,
507 "task %u: ctx %p: %s@[%d,%d]: y_off %08x, u_off %08x, v_off %08x\n",
509 image->type == IMAGE_CONVERT_IN ?
510 "Input" : "Output", row, col,
511 y_off, u_off, v_off);
516 static void calc_tile_offsets_packed(struct ipu_image_convert_ctx *ctx,
517 struct ipu_image_convert_image *image)
519 struct ipu_image_convert_chan *chan = ctx->chan;
520 struct ipu_image_convert_priv *priv = chan->priv;
521 const struct ipu_image_pixfmt *fmt = image->fmt;
522 unsigned int row, col, tile = 0;
523 u32 w, h, bpp, stride;
524 u32 row_off, col_off;
526 /* setup some convenience vars */
527 stride = image->stride;
530 for (row = 0; row < image->num_rows; row++) {
531 w = image->tile[tile].width;
532 h = image->tile[tile].height;
533 row_off = row * h * stride;
535 for (col = 0; col < image->num_cols; col++) {
536 col_off = (col * w * bpp) >> 3;
538 image->tile[tile].offset = row_off + col_off;
539 image->tile[tile].u_off = 0;
540 image->tile[tile++].v_off = 0;
542 dev_dbg(priv->ipu->dev,
543 "task %u: ctx %p: %s@[%d,%d]: phys %08x\n",
545 image->type == IMAGE_CONVERT_IN ?
546 "Input" : "Output", row, col,
552 static void calc_tile_offsets(struct ipu_image_convert_ctx *ctx,
553 struct ipu_image_convert_image *image)
555 if (image->fmt->planar)
556 calc_tile_offsets_planar(ctx, image);
558 calc_tile_offsets_packed(ctx, image);
562 * return the number of runs in given queue (pending_q or done_q)
563 * for this context. hold irqlock when calling.
565 static int get_run_count(struct ipu_image_convert_ctx *ctx,
568 struct ipu_image_convert_run *run;
571 lockdep_assert_held(&ctx->chan->irqlock);
573 list_for_each_entry(run, q, list) {
581 static void convert_stop(struct ipu_image_convert_run *run)
583 struct ipu_image_convert_ctx *ctx = run->ctx;
584 struct ipu_image_convert_chan *chan = ctx->chan;
585 struct ipu_image_convert_priv *priv = chan->priv;
587 dev_dbg(priv->ipu->dev, "%s: task %u: stopping ctx %p run %p\n",
588 __func__, chan->ic_task, ctx, run);
590 /* disable IC tasks and the channels */
591 ipu_ic_task_disable(chan->ic);
592 ipu_idmac_disable_channel(chan->in_chan);
593 ipu_idmac_disable_channel(chan->out_chan);
595 if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
596 ipu_idmac_disable_channel(chan->rotation_in_chan);
597 ipu_idmac_disable_channel(chan->rotation_out_chan);
598 ipu_idmac_unlink(chan->out_chan, chan->rotation_in_chan);
601 ipu_ic_disable(chan->ic);
604 static void init_idmac_channel(struct ipu_image_convert_ctx *ctx,
605 struct ipuv3_channel *channel,
606 struct ipu_image_convert_image *image,
607 enum ipu_rotate_mode rot_mode,
608 bool rot_swap_width_height)
610 struct ipu_image_convert_chan *chan = ctx->chan;
611 unsigned int burst_size;
612 u32 width, height, stride;
613 dma_addr_t addr0, addr1 = 0;
614 struct ipu_image tile_image;
615 unsigned int tile_idx[2];
617 if (image->type == IMAGE_CONVERT_OUT) {
618 tile_idx[0] = ctx->out_tile_map[0];
619 tile_idx[1] = ctx->out_tile_map[1];
625 if (rot_swap_width_height) {
626 width = image->tile[0].height;
627 height = image->tile[0].width;
628 stride = image->tile[0].rot_stride;
629 addr0 = ctx->rot_intermediate[0].phys;
630 if (ctx->double_buffering)
631 addr1 = ctx->rot_intermediate[1].phys;
633 width = image->tile[0].width;
634 height = image->tile[0].height;
635 stride = image->stride;
636 addr0 = image->base.phys0 +
637 image->tile[tile_idx[0]].offset;
638 if (ctx->double_buffering)
639 addr1 = image->base.phys0 +
640 image->tile[tile_idx[1]].offset;
643 ipu_cpmem_zero(channel);
645 memset(&tile_image, 0, sizeof(tile_image));
646 tile_image.pix.width = tile_image.rect.width = width;
647 tile_image.pix.height = tile_image.rect.height = height;
648 tile_image.pix.bytesperline = stride;
649 tile_image.pix.pixelformat = image->fmt->fourcc;
650 tile_image.phys0 = addr0;
651 tile_image.phys1 = addr1;
652 ipu_cpmem_set_image(channel, &tile_image);
654 if (image->fmt->planar && !rot_swap_width_height)
655 ipu_cpmem_set_uv_offset(channel,
656 image->tile[tile_idx[0]].u_off,
657 image->tile[tile_idx[0]].v_off);
660 ipu_cpmem_set_rotation(channel, rot_mode);
662 if (channel == chan->rotation_in_chan ||
663 channel == chan->rotation_out_chan) {
665 ipu_cpmem_set_block_mode(channel);
667 burst_size = (width % 16) ? 8 : 16;
669 ipu_cpmem_set_burstsize(channel, burst_size);
671 ipu_ic_task_idma_init(chan->ic, channel, width, height,
672 burst_size, rot_mode);
674 ipu_cpmem_set_axi_id(channel, 1);
676 ipu_idmac_set_double_buffer(channel, ctx->double_buffering);
679 static int convert_start(struct ipu_image_convert_run *run)
681 struct ipu_image_convert_ctx *ctx = run->ctx;
682 struct ipu_image_convert_chan *chan = ctx->chan;
683 struct ipu_image_convert_priv *priv = chan->priv;
684 struct ipu_image_convert_image *s_image = &ctx->in;
685 struct ipu_image_convert_image *d_image = &ctx->out;
686 enum ipu_color_space src_cs, dest_cs;
687 unsigned int dest_width, dest_height;
690 dev_dbg(priv->ipu->dev, "%s: task %u: starting ctx %p run %p\n",
691 __func__, chan->ic_task, ctx, run);
693 src_cs = ipu_pixelformat_to_colorspace(s_image->fmt->fourcc);
694 dest_cs = ipu_pixelformat_to_colorspace(d_image->fmt->fourcc);
696 if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
697 /* swap width/height for resizer */
698 dest_width = d_image->tile[0].height;
699 dest_height = d_image->tile[0].width;
701 dest_width = d_image->tile[0].width;
702 dest_height = d_image->tile[0].height;
705 /* setup the IC resizer and CSC */
706 ret = ipu_ic_task_init(chan->ic,
707 s_image->tile[0].width,
708 s_image->tile[0].height,
713 dev_err(priv->ipu->dev, "ipu_ic_task_init failed, %d\n", ret);
717 /* init the source MEM-->IC PP IDMAC channel */
718 init_idmac_channel(ctx, chan->in_chan, s_image,
719 IPU_ROTATE_NONE, false);
721 if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
722 /* init the IC PP-->MEM IDMAC channel */
723 init_idmac_channel(ctx, chan->out_chan, d_image,
724 IPU_ROTATE_NONE, true);
726 /* init the MEM-->IC PP ROT IDMAC channel */
727 init_idmac_channel(ctx, chan->rotation_in_chan, d_image,
728 ctx->rot_mode, true);
730 /* init the destination IC PP ROT-->MEM IDMAC channel */
731 init_idmac_channel(ctx, chan->rotation_out_chan, d_image,
732 IPU_ROTATE_NONE, false);
734 /* now link IC PP-->MEM to MEM-->IC PP ROT */
735 ipu_idmac_link(chan->out_chan, chan->rotation_in_chan);
737 /* init the destination IC PP-->MEM IDMAC channel */
738 init_idmac_channel(ctx, chan->out_chan, d_image,
739 ctx->rot_mode, false);
743 ipu_ic_enable(chan->ic);
745 /* set buffers ready */
746 ipu_idmac_select_buffer(chan->in_chan, 0);
747 ipu_idmac_select_buffer(chan->out_chan, 0);
748 if (ipu_rot_mode_is_irt(ctx->rot_mode))
749 ipu_idmac_select_buffer(chan->rotation_out_chan, 0);
750 if (ctx->double_buffering) {
751 ipu_idmac_select_buffer(chan->in_chan, 1);
752 ipu_idmac_select_buffer(chan->out_chan, 1);
753 if (ipu_rot_mode_is_irt(ctx->rot_mode))
754 ipu_idmac_select_buffer(chan->rotation_out_chan, 1);
757 /* enable the channels! */
758 ipu_idmac_enable_channel(chan->in_chan);
759 ipu_idmac_enable_channel(chan->out_chan);
760 if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
761 ipu_idmac_enable_channel(chan->rotation_in_chan);
762 ipu_idmac_enable_channel(chan->rotation_out_chan);
765 ipu_ic_task_enable(chan->ic);
767 ipu_cpmem_dump(chan->in_chan);
768 ipu_cpmem_dump(chan->out_chan);
769 if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
770 ipu_cpmem_dump(chan->rotation_in_chan);
771 ipu_cpmem_dump(chan->rotation_out_chan);
779 /* hold irqlock when calling */
780 static int do_run(struct ipu_image_convert_run *run)
782 struct ipu_image_convert_ctx *ctx = run->ctx;
783 struct ipu_image_convert_chan *chan = ctx->chan;
785 lockdep_assert_held(&chan->irqlock);
787 ctx->in.base.phys0 = run->in_phys;
788 ctx->out.base.phys0 = run->out_phys;
790 ctx->cur_buf_num = 0;
793 /* remove run from pending_q and set as current */
794 list_del(&run->list);
795 chan->current_run = run;
797 return convert_start(run);
800 /* hold irqlock when calling */
801 static void run_next(struct ipu_image_convert_chan *chan)
803 struct ipu_image_convert_priv *priv = chan->priv;
804 struct ipu_image_convert_run *run, *tmp;
807 lockdep_assert_held(&chan->irqlock);
809 list_for_each_entry_safe(run, tmp, &chan->pending_q, list) {
810 /* skip contexts that are aborting */
811 if (run->ctx->aborting) {
812 dev_dbg(priv->ipu->dev,
813 "%s: task %u: skipping aborting ctx %p run %p\n",
814 __func__, chan->ic_task, run->ctx, run);
823 * something went wrong with start, add the run
824 * to done q and continue to the next run in the
828 list_add_tail(&run->list, &chan->done_q);
829 chan->current_run = NULL;
833 static void empty_done_q(struct ipu_image_convert_chan *chan)
835 struct ipu_image_convert_priv *priv = chan->priv;
836 struct ipu_image_convert_run *run;
839 spin_lock_irqsave(&chan->irqlock, flags);
841 while (!list_empty(&chan->done_q)) {
842 run = list_entry(chan->done_q.next,
843 struct ipu_image_convert_run,
846 list_del(&run->list);
848 dev_dbg(priv->ipu->dev,
849 "%s: task %u: completing ctx %p run %p with %d\n",
850 __func__, chan->ic_task, run->ctx, run, run->status);
852 /* call the completion callback and free the run */
853 spin_unlock_irqrestore(&chan->irqlock, flags);
854 run->ctx->complete(run, run->ctx->complete_context);
855 spin_lock_irqsave(&chan->irqlock, flags);
858 spin_unlock_irqrestore(&chan->irqlock, flags);
862 * the bottom half thread clears out the done_q, calling the
863 * completion handler for each.
865 static irqreturn_t do_bh(int irq, void *dev_id)
867 struct ipu_image_convert_chan *chan = dev_id;
868 struct ipu_image_convert_priv *priv = chan->priv;
869 struct ipu_image_convert_ctx *ctx;
872 dev_dbg(priv->ipu->dev, "%s: task %u: enter\n", __func__,
877 spin_lock_irqsave(&chan->irqlock, flags);
880 * the done_q is cleared out, signal any contexts
881 * that are aborting that abort can complete.
883 list_for_each_entry(ctx, &chan->ctx_list, list) {
885 dev_dbg(priv->ipu->dev,
886 "%s: task %u: signaling abort for ctx %p\n",
887 __func__, chan->ic_task, ctx);
888 complete(&ctx->aborted);
892 spin_unlock_irqrestore(&chan->irqlock, flags);
894 dev_dbg(priv->ipu->dev, "%s: task %u: exit\n", __func__,
900 /* hold irqlock when calling */
901 static irqreturn_t do_irq(struct ipu_image_convert_run *run)
903 struct ipu_image_convert_ctx *ctx = run->ctx;
904 struct ipu_image_convert_chan *chan = ctx->chan;
905 struct ipu_image_tile *src_tile, *dst_tile;
906 struct ipu_image_convert_image *s_image = &ctx->in;
907 struct ipu_image_convert_image *d_image = &ctx->out;
908 struct ipuv3_channel *outch;
909 unsigned int dst_idx;
911 lockdep_assert_held(&chan->irqlock);
913 outch = ipu_rot_mode_is_irt(ctx->rot_mode) ?
914 chan->rotation_out_chan : chan->out_chan;
917 * It is difficult to stop the channel DMA before the channels
918 * enter the paused state. Without double-buffering the channels
919 * are always in a paused state when the EOF irq occurs, so it
920 * is safe to stop the channels now. For double-buffering we
921 * just ignore the abort until the operation completes, when it
922 * is safe to shut down.
924 if (ctx->aborting && !ctx->double_buffering) {
930 if (ctx->next_tile == ctx->num_tiles) {
932 * the conversion is complete
940 * not done, place the next tile buffers.
942 if (!ctx->double_buffering) {
944 src_tile = &s_image->tile[ctx->next_tile];
945 dst_idx = ctx->out_tile_map[ctx->next_tile];
946 dst_tile = &d_image->tile[dst_idx];
948 ipu_cpmem_set_buffer(chan->in_chan, 0,
949 s_image->base.phys0 + src_tile->offset);
950 ipu_cpmem_set_buffer(outch, 0,
951 d_image->base.phys0 + dst_tile->offset);
952 if (s_image->fmt->planar)
953 ipu_cpmem_set_uv_offset(chan->in_chan,
956 if (d_image->fmt->planar)
957 ipu_cpmem_set_uv_offset(outch,
961 ipu_idmac_select_buffer(chan->in_chan, 0);
962 ipu_idmac_select_buffer(outch, 0);
964 } else if (ctx->next_tile < ctx->num_tiles - 1) {
966 src_tile = &s_image->tile[ctx->next_tile + 1];
967 dst_idx = ctx->out_tile_map[ctx->next_tile + 1];
968 dst_tile = &d_image->tile[dst_idx];
970 ipu_cpmem_set_buffer(chan->in_chan, ctx->cur_buf_num,
971 s_image->base.phys0 + src_tile->offset);
972 ipu_cpmem_set_buffer(outch, ctx->cur_buf_num,
973 d_image->base.phys0 + dst_tile->offset);
975 ipu_idmac_select_buffer(chan->in_chan, ctx->cur_buf_num);
976 ipu_idmac_select_buffer(outch, ctx->cur_buf_num);
978 ctx->cur_buf_num ^= 1;
984 list_add_tail(&run->list, &chan->done_q);
985 chan->current_run = NULL;
987 return IRQ_WAKE_THREAD;
990 static irqreturn_t norotate_irq(int irq, void *data)
992 struct ipu_image_convert_chan *chan = data;
993 struct ipu_image_convert_ctx *ctx;
994 struct ipu_image_convert_run *run;
998 spin_lock_irqsave(&chan->irqlock, flags);
1000 /* get current run and its context */
1001 run = chan->current_run;
1009 if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
1010 /* this is a rotation operation, just ignore */
1011 spin_unlock_irqrestore(&chan->irqlock, flags);
1017 spin_unlock_irqrestore(&chan->irqlock, flags);
1021 static irqreturn_t rotate_irq(int irq, void *data)
1023 struct ipu_image_convert_chan *chan = data;
1024 struct ipu_image_convert_priv *priv = chan->priv;
1025 struct ipu_image_convert_ctx *ctx;
1026 struct ipu_image_convert_run *run;
1027 unsigned long flags;
1030 spin_lock_irqsave(&chan->irqlock, flags);
1032 /* get current run and its context */
1033 run = chan->current_run;
1041 if (!ipu_rot_mode_is_irt(ctx->rot_mode)) {
1042 /* this was NOT a rotation operation, shouldn't happen */
1043 dev_err(priv->ipu->dev, "Unexpected rotation interrupt\n");
1044 spin_unlock_irqrestore(&chan->irqlock, flags);
1050 spin_unlock_irqrestore(&chan->irqlock, flags);
1055 * try to force the completion of runs for this ctx. Called when
1056 * abort wait times out in ipu_image_convert_abort().
1058 static void force_abort(struct ipu_image_convert_ctx *ctx)
1060 struct ipu_image_convert_chan *chan = ctx->chan;
1061 struct ipu_image_convert_run *run;
1062 unsigned long flags;
1064 spin_lock_irqsave(&chan->irqlock, flags);
1066 run = chan->current_run;
1067 if (run && run->ctx == ctx) {
1070 list_add_tail(&run->list, &chan->done_q);
1071 chan->current_run = NULL;
1075 spin_unlock_irqrestore(&chan->irqlock, flags);
1080 static void release_ipu_resources(struct ipu_image_convert_chan *chan)
1082 if (chan->out_eof_irq >= 0)
1083 free_irq(chan->out_eof_irq, chan);
1084 if (chan->rot_out_eof_irq >= 0)
1085 free_irq(chan->rot_out_eof_irq, chan);
1087 if (!IS_ERR_OR_NULL(chan->in_chan))
1088 ipu_idmac_put(chan->in_chan);
1089 if (!IS_ERR_OR_NULL(chan->out_chan))
1090 ipu_idmac_put(chan->out_chan);
1091 if (!IS_ERR_OR_NULL(chan->rotation_in_chan))
1092 ipu_idmac_put(chan->rotation_in_chan);
1093 if (!IS_ERR_OR_NULL(chan->rotation_out_chan))
1094 ipu_idmac_put(chan->rotation_out_chan);
1095 if (!IS_ERR_OR_NULL(chan->ic))
1096 ipu_ic_put(chan->ic);
1098 chan->in_chan = chan->out_chan = chan->rotation_in_chan =
1099 chan->rotation_out_chan = NULL;
1100 chan->out_eof_irq = chan->rot_out_eof_irq = -1;
1103 static int get_ipu_resources(struct ipu_image_convert_chan *chan)
1105 const struct ipu_image_convert_dma_chan *dma = chan->dma_ch;
1106 struct ipu_image_convert_priv *priv = chan->priv;
1110 chan->ic = ipu_ic_get(priv->ipu, chan->ic_task);
1111 if (IS_ERR(chan->ic)) {
1112 dev_err(priv->ipu->dev, "could not acquire IC\n");
1113 ret = PTR_ERR(chan->ic);
1117 /* get IDMAC channels */
1118 chan->in_chan = ipu_idmac_get(priv->ipu, dma->in);
1119 chan->out_chan = ipu_idmac_get(priv->ipu, dma->out);
1120 if (IS_ERR(chan->in_chan) || IS_ERR(chan->out_chan)) {
1121 dev_err(priv->ipu->dev, "could not acquire idmac channels\n");
1126 chan->rotation_in_chan = ipu_idmac_get(priv->ipu, dma->rot_in);
1127 chan->rotation_out_chan = ipu_idmac_get(priv->ipu, dma->rot_out);
1128 if (IS_ERR(chan->rotation_in_chan) || IS_ERR(chan->rotation_out_chan)) {
1129 dev_err(priv->ipu->dev,
1130 "could not acquire idmac rotation channels\n");
1135 /* acquire the EOF interrupts */
1136 chan->out_eof_irq = ipu_idmac_channel_irq(priv->ipu,
1140 ret = request_threaded_irq(chan->out_eof_irq, norotate_irq, do_bh,
1143 dev_err(priv->ipu->dev, "could not acquire irq %d\n",
1145 chan->out_eof_irq = -1;
1149 chan->rot_out_eof_irq = ipu_idmac_channel_irq(priv->ipu,
1150 chan->rotation_out_chan,
1153 ret = request_threaded_irq(chan->rot_out_eof_irq, rotate_irq, do_bh,
1156 dev_err(priv->ipu->dev, "could not acquire irq %d\n",
1157 chan->rot_out_eof_irq);
1158 chan->rot_out_eof_irq = -1;
1164 release_ipu_resources(chan);
1168 static int fill_image(struct ipu_image_convert_ctx *ctx,
1169 struct ipu_image_convert_image *ic_image,
1170 struct ipu_image *image,
1171 enum ipu_image_convert_type type)
1173 struct ipu_image_convert_priv *priv = ctx->chan->priv;
1175 ic_image->base = *image;
1176 ic_image->type = type;
1178 ic_image->fmt = get_format(image->pix.pixelformat);
1179 if (!ic_image->fmt) {
1180 dev_err(priv->ipu->dev, "pixelformat not supported for %s\n",
1181 type == IMAGE_CONVERT_OUT ? "Output" : "Input");
1185 if (ic_image->fmt->planar)
1186 ic_image->stride = ic_image->base.pix.width;
1188 ic_image->stride = ic_image->base.pix.bytesperline;
1190 calc_tile_dimensions(ctx, ic_image);
1191 calc_tile_offsets(ctx, ic_image);
1196 /* borrowed from drivers/media/v4l2-core/v4l2-common.c */
1197 static unsigned int clamp_align(unsigned int x, unsigned int min,
1198 unsigned int max, unsigned int align)
1200 /* Bits that must be zero to be aligned */
1201 unsigned int mask = ~((1 << align) - 1);
1203 /* Clamp to aligned min and max */
1204 x = clamp(x, (min + ~mask) & mask, max & mask);
1206 /* Round to nearest aligned value */
1208 x = (x + (1 << (align - 1))) & mask;
1214 * We have to adjust the tile width such that the tile physaddrs and
1215 * U and V plane offsets are multiples of 8 bytes as required by
1216 * the IPU DMA Controller. For the planar formats, this corresponds
1217 * to a pixel alignment of 16 (but use a more formal equation since
1218 * the variables are available). For all the packed formats, 8 is
1221 static inline u32 tile_width_align(const struct ipu_image_pixfmt *fmt)
1223 return fmt->planar ? 8 * fmt->uv_width_dec : 8;
1227 * For tile height alignment, we have to ensure that the output tile
1228 * heights are multiples of 8 lines if the IRT is required by the
1229 * given rotation mode (the IRT performs rotations on 8x8 blocks
1230 * at a time). If the IRT is not used, or for input image tiles,
1231 * 2 lines are good enough.
1233 static inline u32 tile_height_align(enum ipu_image_convert_type type,
1234 enum ipu_rotate_mode rot_mode)
1236 return (type == IMAGE_CONVERT_OUT &&
1237 ipu_rot_mode_is_irt(rot_mode)) ? 8 : 2;
1240 /* Adjusts input/output images to IPU restrictions */
1241 void ipu_image_convert_adjust(struct ipu_image *in, struct ipu_image *out,
1242 enum ipu_rotate_mode rot_mode)
1244 const struct ipu_image_pixfmt *infmt, *outfmt;
1245 unsigned int num_in_rows, num_in_cols;
1246 unsigned int num_out_rows, num_out_cols;
1247 u32 w_align, h_align;
1249 infmt = get_format(in->pix.pixelformat);
1250 outfmt = get_format(out->pix.pixelformat);
1252 /* set some default pixel formats if needed */
1254 in->pix.pixelformat = V4L2_PIX_FMT_RGB24;
1255 infmt = get_format(V4L2_PIX_FMT_RGB24);
1258 out->pix.pixelformat = V4L2_PIX_FMT_RGB24;
1259 outfmt = get_format(V4L2_PIX_FMT_RGB24);
1262 /* image converter does not handle fields */
1263 in->pix.field = out->pix.field = V4L2_FIELD_NONE;
1265 /* resizer cannot downsize more than 4:1 */
1266 if (ipu_rot_mode_is_irt(rot_mode)) {
1267 out->pix.height = max_t(__u32, out->pix.height,
1269 out->pix.width = max_t(__u32, out->pix.width,
1270 in->pix.height / 4);
1272 out->pix.width = max_t(__u32, out->pix.width,
1274 out->pix.height = max_t(__u32, out->pix.height,
1275 in->pix.height / 4);
1278 /* get tiling rows/cols from output format */
1279 num_out_rows = num_stripes(out->pix.height);
1280 num_out_cols = num_stripes(out->pix.width);
1281 if (ipu_rot_mode_is_irt(rot_mode)) {
1282 num_in_rows = num_out_cols;
1283 num_in_cols = num_out_rows;
1285 num_in_rows = num_out_rows;
1286 num_in_cols = num_out_cols;
1289 /* align input width/height */
1290 w_align = ilog2(tile_width_align(infmt) * num_in_cols);
1291 h_align = ilog2(tile_height_align(IMAGE_CONVERT_IN, rot_mode) *
1293 in->pix.width = clamp_align(in->pix.width, MIN_W, MAX_W, w_align);
1294 in->pix.height = clamp_align(in->pix.height, MIN_H, MAX_H, h_align);
1296 /* align output width/height */
1297 w_align = ilog2(tile_width_align(outfmt) * num_out_cols);
1298 h_align = ilog2(tile_height_align(IMAGE_CONVERT_OUT, rot_mode) *
1300 out->pix.width = clamp_align(out->pix.width, MIN_W, MAX_W, w_align);
1301 out->pix.height = clamp_align(out->pix.height, MIN_H, MAX_H, h_align);
1303 /* set input/output strides and image sizes */
1304 in->pix.bytesperline = (in->pix.width * infmt->bpp) >> 3;
1305 in->pix.sizeimage = in->pix.height * in->pix.bytesperline;
1306 out->pix.bytesperline = (out->pix.width * outfmt->bpp) >> 3;
1307 out->pix.sizeimage = out->pix.height * out->pix.bytesperline;
1309 EXPORT_SYMBOL_GPL(ipu_image_convert_adjust);
1312 * this is used by ipu_image_convert_prepare() to verify set input and
1313 * output images are valid before starting the conversion. Clients can
1314 * also call it before calling ipu_image_convert_prepare().
1316 int ipu_image_convert_verify(struct ipu_image *in, struct ipu_image *out,
1317 enum ipu_rotate_mode rot_mode)
1319 struct ipu_image testin, testout;
1324 ipu_image_convert_adjust(&testin, &testout, rot_mode);
1326 if (testin.pix.width != in->pix.width ||
1327 testin.pix.height != in->pix.height ||
1328 testout.pix.width != out->pix.width ||
1329 testout.pix.height != out->pix.height)
1334 EXPORT_SYMBOL_GPL(ipu_image_convert_verify);
1337 * Call ipu_image_convert_prepare() to prepare for the conversion of
1338 * given images and rotation mode. Returns a new conversion context.
1340 struct ipu_image_convert_ctx *
1341 ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
1342 struct ipu_image *in, struct ipu_image *out,
1343 enum ipu_rotate_mode rot_mode,
1344 ipu_image_convert_cb_t complete,
1345 void *complete_context)
1347 struct ipu_image_convert_priv *priv = ipu->image_convert_priv;
1348 struct ipu_image_convert_image *s_image, *d_image;
1349 struct ipu_image_convert_chan *chan;
1350 struct ipu_image_convert_ctx *ctx;
1351 unsigned long flags;
1355 if (!in || !out || !complete ||
1356 (ic_task != IC_TASK_VIEWFINDER &&
1357 ic_task != IC_TASK_POST_PROCESSOR))
1358 return ERR_PTR(-EINVAL);
1360 /* verify the in/out images before continuing */
1361 ret = ipu_image_convert_verify(in, out, rot_mode);
1363 dev_err(priv->ipu->dev, "%s: in/out formats invalid\n",
1365 return ERR_PTR(ret);
1368 chan = &priv->chan[ic_task];
1370 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1372 return ERR_PTR(-ENOMEM);
1374 dev_dbg(priv->ipu->dev, "%s: task %u: ctx %p\n", __func__,
1375 chan->ic_task, ctx);
1378 init_completion(&ctx->aborted);
1381 d_image = &ctx->out;
1383 /* set tiling and rotation */
1384 d_image->num_rows = num_stripes(out->pix.height);
1385 d_image->num_cols = num_stripes(out->pix.width);
1386 if (ipu_rot_mode_is_irt(rot_mode)) {
1387 s_image->num_rows = d_image->num_cols;
1388 s_image->num_cols = d_image->num_rows;
1390 s_image->num_rows = d_image->num_rows;
1391 s_image->num_cols = d_image->num_cols;
1394 ctx->num_tiles = d_image->num_cols * d_image->num_rows;
1395 ctx->rot_mode = rot_mode;
1397 ret = fill_image(ctx, s_image, in, IMAGE_CONVERT_IN);
1400 ret = fill_image(ctx, d_image, out, IMAGE_CONVERT_OUT);
1404 calc_out_tile_map(ctx);
1406 dump_format(ctx, s_image);
1407 dump_format(ctx, d_image);
1409 ctx->complete = complete;
1410 ctx->complete_context = complete_context;
1413 * Can we use double-buffering for this operation? If there is
1414 * only one tile (the whole image can be converted in a single
1415 * operation) there's no point in using double-buffering. Also,
1416 * the IPU's IDMAC channels allow only a single U and V plane
1417 * offset shared between both buffers, but these offsets change
1418 * for every tile, and therefore would have to be updated for
1419 * each buffer which is not possible. So double-buffering is
1420 * impossible when either the source or destination images are
1421 * a planar format (YUV420, YUV422P, etc.).
1423 ctx->double_buffering = (ctx->num_tiles > 1 &&
1424 !s_image->fmt->planar &&
1425 !d_image->fmt->planar);
1427 if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
1428 ret = alloc_dma_buf(priv, &ctx->rot_intermediate[0],
1429 d_image->tile[0].size);
1432 if (ctx->double_buffering) {
1433 ret = alloc_dma_buf(priv,
1434 &ctx->rot_intermediate[1],
1435 d_image->tile[0].size);
1437 goto out_free_dmabuf0;
1441 spin_lock_irqsave(&chan->irqlock, flags);
1443 get_res = list_empty(&chan->ctx_list);
1445 list_add_tail(&ctx->list, &chan->ctx_list);
1447 spin_unlock_irqrestore(&chan->irqlock, flags);
1450 ret = get_ipu_resources(chan);
1452 goto out_free_dmabuf1;
1458 free_dma_buf(priv, &ctx->rot_intermediate[1]);
1459 spin_lock_irqsave(&chan->irqlock, flags);
1460 list_del(&ctx->list);
1461 spin_unlock_irqrestore(&chan->irqlock, flags);
1463 free_dma_buf(priv, &ctx->rot_intermediate[0]);
1466 return ERR_PTR(ret);
1468 EXPORT_SYMBOL_GPL(ipu_image_convert_prepare);
1471 * Carry out a single image conversion run. Only the physaddr's of the input
1472 * and output image buffers are needed. The conversion context must have
1473 * been created previously with ipu_image_convert_prepare().
1475 int ipu_image_convert_queue(struct ipu_image_convert_run *run)
1477 struct ipu_image_convert_chan *chan;
1478 struct ipu_image_convert_priv *priv;
1479 struct ipu_image_convert_ctx *ctx;
1480 unsigned long flags;
1483 if (!run || !run->ctx || !run->in_phys || !run->out_phys)
1490 dev_dbg(priv->ipu->dev, "%s: task %u: ctx %p run %p\n", __func__,
1491 chan->ic_task, ctx, run);
1493 INIT_LIST_HEAD(&run->list);
1495 spin_lock_irqsave(&chan->irqlock, flags);
1497 if (ctx->aborting) {
1502 list_add_tail(&run->list, &chan->pending_q);
1504 if (!chan->current_run) {
1507 chan->current_run = NULL;
1510 spin_unlock_irqrestore(&chan->irqlock, flags);
1513 EXPORT_SYMBOL_GPL(ipu_image_convert_queue);
1515 /* Abort any active or pending conversions for this context */
1516 void ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
1518 struct ipu_image_convert_chan *chan = ctx->chan;
1519 struct ipu_image_convert_priv *priv = chan->priv;
1520 struct ipu_image_convert_run *run, *active_run, *tmp;
1521 unsigned long flags;
1525 reinit_completion(&ctx->aborted);
1527 spin_lock_irqsave(&chan->irqlock, flags);
1529 /* move all remaining pending runs in this context to done_q */
1530 list_for_each_entry_safe(run, tmp, &chan->pending_q, list) {
1531 if (run->ctx != ctx)
1534 list_move_tail(&run->list, &chan->done_q);
1537 run_count = get_run_count(ctx, &chan->done_q);
1538 active_run = (chan->current_run && chan->current_run->ctx == ctx) ?
1539 chan->current_run : NULL;
1541 need_abort = (run_count || active_run);
1543 ctx->aborting = need_abort;
1545 spin_unlock_irqrestore(&chan->irqlock, flags);
1548 dev_dbg(priv->ipu->dev,
1549 "%s: task %u: no abort needed for ctx %p\n",
1550 __func__, chan->ic_task, ctx);
1554 dev_dbg(priv->ipu->dev,
1555 "%s: task %u: wait for completion: %d runs, active run %p\n",
1556 __func__, chan->ic_task, run_count, active_run);
1558 ret = wait_for_completion_timeout(&ctx->aborted,
1559 msecs_to_jiffies(10000));
1561 dev_warn(priv->ipu->dev, "%s: timeout\n", __func__);
1565 ctx->aborting = false;
1567 EXPORT_SYMBOL_GPL(ipu_image_convert_abort);
1569 /* Unprepare image conversion context */
1570 void ipu_image_convert_unprepare(struct ipu_image_convert_ctx *ctx)
1572 struct ipu_image_convert_chan *chan = ctx->chan;
1573 struct ipu_image_convert_priv *priv = chan->priv;
1574 unsigned long flags;
1577 /* make sure no runs are hanging around */
1578 ipu_image_convert_abort(ctx);
1580 dev_dbg(priv->ipu->dev, "%s: task %u: removing ctx %p\n", __func__,
1581 chan->ic_task, ctx);
1583 spin_lock_irqsave(&chan->irqlock, flags);
1585 list_del(&ctx->list);
1587 put_res = list_empty(&chan->ctx_list);
1589 spin_unlock_irqrestore(&chan->irqlock, flags);
1592 release_ipu_resources(chan);
1594 free_dma_buf(priv, &ctx->rot_intermediate[1]);
1595 free_dma_buf(priv, &ctx->rot_intermediate[0]);
1599 EXPORT_SYMBOL_GPL(ipu_image_convert_unprepare);
1602 * "Canned" asynchronous single image conversion. Allocates and returns
1603 * a new conversion run. On successful return the caller must free the
1604 * run and call ipu_image_convert_unprepare() after conversion completes.
1606 struct ipu_image_convert_run *
1607 ipu_image_convert(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
1608 struct ipu_image *in, struct ipu_image *out,
1609 enum ipu_rotate_mode rot_mode,
1610 ipu_image_convert_cb_t complete,
1611 void *complete_context)
1613 struct ipu_image_convert_ctx *ctx;
1614 struct ipu_image_convert_run *run;
1617 ctx = ipu_image_convert_prepare(ipu, ic_task, in, out, rot_mode,
1618 complete, complete_context);
1620 return ERR_CAST(ctx);
1622 run = kzalloc(sizeof(*run), GFP_KERNEL);
1624 ipu_image_convert_unprepare(ctx);
1625 return ERR_PTR(-ENOMEM);
1629 run->in_phys = in->phys0;
1630 run->out_phys = out->phys0;
1632 ret = ipu_image_convert_queue(run);
1634 ipu_image_convert_unprepare(ctx);
1636 return ERR_PTR(ret);
1641 EXPORT_SYMBOL_GPL(ipu_image_convert);
1643 /* "Canned" synchronous single image conversion */
1644 static void image_convert_sync_complete(struct ipu_image_convert_run *run,
1647 struct completion *comp = data;
1652 int ipu_image_convert_sync(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
1653 struct ipu_image *in, struct ipu_image *out,
1654 enum ipu_rotate_mode rot_mode)
1656 struct ipu_image_convert_run *run;
1657 struct completion comp;
1660 init_completion(&comp);
1662 run = ipu_image_convert(ipu, ic_task, in, out, rot_mode,
1663 image_convert_sync_complete, &comp);
1665 return PTR_ERR(run);
1667 ret = wait_for_completion_timeout(&comp, msecs_to_jiffies(10000));
1668 ret = (ret == 0) ? -ETIMEDOUT : 0;
1670 ipu_image_convert_unprepare(run->ctx);
1675 EXPORT_SYMBOL_GPL(ipu_image_convert_sync);
1677 int ipu_image_convert_init(struct ipu_soc *ipu, struct device *dev)
1679 struct ipu_image_convert_priv *priv;
1682 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
1686 ipu->image_convert_priv = priv;
1689 for (i = 0; i < IC_NUM_TASKS; i++) {
1690 struct ipu_image_convert_chan *chan = &priv->chan[i];
1694 chan->dma_ch = &image_convert_dma_chan[i];
1695 chan->out_eof_irq = -1;
1696 chan->rot_out_eof_irq = -1;
1698 spin_lock_init(&chan->irqlock);
1699 INIT_LIST_HEAD(&chan->ctx_list);
1700 INIT_LIST_HEAD(&chan->pending_q);
1701 INIT_LIST_HEAD(&chan->done_q);
1707 void ipu_image_convert_exit(struct ipu_soc *ipu)