1 /**************************************************************************
3 * Copyright © 2009-2011 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "vmwgfx_drv.h"
30 #include <drm/ttm/ttm_bo_driver.h>
32 #define VMW_PPN_SIZE (sizeof(unsigned long))
33 /* A future safe maximum remap size. */
34 #define VMW_PPN_PER_REMAP ((31 * 1024) / VMW_PPN_SIZE)
35 #define DMA_ADDR_INVALID ((dma_addr_t) 0)
36 #define DMA_PAGE_INVALID 0UL
38 static int vmw_gmr2_bind(struct vmw_private *dev_priv,
39 struct vmw_piter *iter,
40 unsigned long num_pages,
43 SVGAFifoCmdDefineGMR2 define_cmd;
44 SVGAFifoCmdRemapGMR2 remap_cmd;
47 uint32_t define_size = sizeof(define_cmd) + sizeof(*cmd);
48 uint32_t remap_num = num_pages / VMW_PPN_PER_REMAP + ((num_pages % VMW_PPN_PER_REMAP) > 0);
49 uint32_t remap_size = VMW_PPN_SIZE * num_pages + (sizeof(remap_cmd) + sizeof(*cmd)) * remap_num;
50 uint32_t remap_pos = 0;
51 uint32_t cmd_size = define_size + remap_size;
54 cmd_orig = cmd = vmw_fifo_reserve(dev_priv, cmd_size);
55 if (unlikely(cmd == NULL))
58 define_cmd.gmrId = gmr_id;
59 define_cmd.numPages = num_pages;
61 *cmd++ = SVGA_CMD_DEFINE_GMR2;
62 memcpy(cmd, &define_cmd, sizeof(define_cmd));
63 cmd += sizeof(define_cmd) / sizeof(*cmd);
66 * Need to split the command if there are too many
67 * pages that goes into the gmr.
70 remap_cmd.gmrId = gmr_id;
71 remap_cmd.flags = (VMW_PPN_SIZE > sizeof(*cmd)) ?
72 SVGA_REMAP_GMR2_PPN64 : SVGA_REMAP_GMR2_PPN32;
74 while (num_pages > 0) {
75 unsigned long nr = min(num_pages, (unsigned long)VMW_PPN_PER_REMAP);
77 remap_cmd.offsetPages = remap_pos;
78 remap_cmd.numPages = nr;
80 *cmd++ = SVGA_CMD_REMAP_GMR2;
81 memcpy(cmd, &remap_cmd, sizeof(remap_cmd));
82 cmd += sizeof(remap_cmd) / sizeof(*cmd);
84 for (i = 0; i < nr; ++i) {
85 if (VMW_PPN_SIZE <= 4)
86 *cmd = vmw_piter_dma_addr(iter) >> PAGE_SHIFT;
88 *((uint64_t *)cmd) = vmw_piter_dma_addr(iter) >>
91 cmd += VMW_PPN_SIZE / sizeof(*cmd);
99 BUG_ON(cmd != cmd_orig + cmd_size / sizeof(*cmd));
101 vmw_fifo_commit(dev_priv, cmd_size);
106 static void vmw_gmr2_unbind(struct vmw_private *dev_priv,
109 SVGAFifoCmdDefineGMR2 define_cmd;
110 uint32_t define_size = sizeof(define_cmd) + 4;
113 cmd = vmw_fifo_reserve(dev_priv, define_size);
114 if (unlikely(cmd == NULL)) {
115 DRM_ERROR("GMR2 unbind failed.\n");
118 define_cmd.gmrId = gmr_id;
119 define_cmd.numPages = 0;
121 *cmd++ = SVGA_CMD_DEFINE_GMR2;
122 memcpy(cmd, &define_cmd, sizeof(define_cmd));
124 vmw_fifo_commit(dev_priv, define_size);
128 static void vmw_gmr_free_descriptors(struct device *dev, dma_addr_t desc_dma,
129 struct list_head *desc_pages)
131 struct page *page, *next;
132 struct svga_guest_mem_descriptor *page_virtual;
133 unsigned int desc_per_page = PAGE_SIZE /
134 sizeof(struct svga_guest_mem_descriptor) - 1;
136 if (list_empty(desc_pages))
139 list_for_each_entry_safe(page, next, desc_pages, lru) {
140 list_del_init(&page->lru);
142 if (likely(desc_dma != DMA_ADDR_INVALID)) {
143 dma_unmap_page(dev, desc_dma, PAGE_SIZE,
147 page_virtual = kmap_atomic(page);
148 desc_dma = page_virtual[desc_per_page].ppn << PAGE_SHIFT;
149 kunmap_atomic(page_virtual);
156 * FIXME: Adjust to the ttm lowmem / highmem storage to minimize
157 * the number of used descriptors.
161 static int vmw_gmr_build_descriptors(struct device *dev,
162 struct list_head *desc_pages,
163 struct vmw_piter *iter,
164 unsigned long num_pages,
165 dma_addr_t *first_dma)
168 struct svga_guest_mem_descriptor *page_virtual = NULL;
169 struct svga_guest_mem_descriptor *desc_virtual = NULL;
170 unsigned int desc_per_page;
171 unsigned long prev_pfn;
176 desc_per_page = PAGE_SIZE /
177 sizeof(struct svga_guest_mem_descriptor) - 1;
179 while (likely(num_pages != 0)) {
180 page = alloc_page(__GFP_HIGHMEM);
181 if (unlikely(page == NULL)) {
186 list_add_tail(&page->lru, desc_pages);
187 page_virtual = kmap_atomic(page);
188 desc_virtual = page_virtual - 1;
191 while (likely(num_pages != 0)) {
192 pfn = vmw_piter_dma_addr(iter) >> PAGE_SHIFT;
194 if (pfn != prev_pfn + 1) {
196 if (desc_virtual - page_virtual ==
200 (++desc_virtual)->ppn = cpu_to_le32(pfn);
201 desc_virtual->num_pages = cpu_to_le32(1);
204 le32_to_cpu(desc_virtual->num_pages);
205 desc_virtual->num_pages = cpu_to_le32(tmp + 1);
209 vmw_piter_next(iter);
212 (++desc_virtual)->ppn = DMA_PAGE_INVALID;
213 desc_virtual->num_pages = cpu_to_le32(0);
214 kunmap_atomic(page_virtual);
218 list_for_each_entry_reverse(page, desc_pages, lru) {
219 page_virtual = kmap_atomic(page);
220 page_virtual[desc_per_page].ppn = desc_dma >> PAGE_SHIFT;
221 kunmap_atomic(page_virtual);
222 desc_dma = dma_map_page(dev, page, 0, PAGE_SIZE,
225 if (unlikely(dma_mapping_error(dev, desc_dma)))
228 *first_dma = desc_dma;
232 vmw_gmr_free_descriptors(dev, DMA_ADDR_INVALID, desc_pages);
236 static void vmw_gmr_fire_descriptors(struct vmw_private *dev_priv,
237 int gmr_id, dma_addr_t desc_dma)
239 mutex_lock(&dev_priv->hw_mutex);
241 vmw_write(dev_priv, SVGA_REG_GMR_ID, gmr_id);
243 vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, desc_dma >> PAGE_SHIFT);
246 mutex_unlock(&dev_priv->hw_mutex);
250 int vmw_gmr_bind(struct vmw_private *dev_priv,
251 const struct vmw_sg_table *vsgt,
252 unsigned long num_pages,
255 struct list_head desc_pages;
256 dma_addr_t desc_dma = 0;
257 struct device *dev = dev_priv->dev->dev;
258 struct vmw_piter data_iter;
261 vmw_piter_start(&data_iter, vsgt, 0);
263 if (unlikely(!vmw_piter_next(&data_iter)))
266 if (likely(dev_priv->capabilities & SVGA_CAP_GMR2))
267 return vmw_gmr2_bind(dev_priv, &data_iter, num_pages, gmr_id);
269 if (unlikely(!(dev_priv->capabilities & SVGA_CAP_GMR)))
272 if (vsgt->num_regions > dev_priv->max_gmr_descriptors)
275 INIT_LIST_HEAD(&desc_pages);
277 ret = vmw_gmr_build_descriptors(dev, &desc_pages, &data_iter,
278 num_pages, &desc_dma);
279 if (unlikely(ret != 0))
282 vmw_gmr_fire_descriptors(dev_priv, gmr_id, desc_dma);
283 vmw_gmr_free_descriptors(dev, desc_dma, &desc_pages);
289 void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id)
291 if (likely(dev_priv->capabilities & SVGA_CAP_GMR2)) {
292 vmw_gmr2_unbind(dev_priv, gmr_id);
296 mutex_lock(&dev_priv->hw_mutex);
297 vmw_write(dev_priv, SVGA_REG_GMR_ID, gmr_id);
299 vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, 0);
301 mutex_unlock(&dev_priv->hw_mutex);