drivers/gpu/drm/virtio/virtgpu_fence.c

   1 /*
   2  * Copyright (C) 2015 Red Hat, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  */
  25
  26 #include <trace/events/dma_fence.h>
  27
  28 #include "virtgpu_drv.h"
  29
  30 static const char *virtio_get_driver_name(struct dma_fence *f)
  31 {
  32         return "virtio_gpu";
  33 }
  34
  35 static const char *virtio_get_timeline_name(struct dma_fence *f)
  36 {
  37         return "controlq";
  38 }
  39
  40 bool virtio_fence_signaled(struct dma_fence *f)
  41 {
  42         struct virtio_gpu_fence *fence = to_virtio_fence(f);
  43
  44         if (WARN_ON_ONCE(fence->f.seqno == 0))
  45                 /* leaked fence outside driver before completing
  46                  * initialization with virtio_gpu_fence_emit */
  47                 return false;
  48         if (atomic64_read(&fence->drv->last_seq) >= fence->f.seqno)
  49                 return true;
  50         return false;
  51 }
  52
  53 static void virtio_fence_value_str(struct dma_fence *f, char *str, int size)
  54 {
  55         snprintf(str, size, "%llu", f->seqno);
  56 }
  57
  58 static void virtio_timeline_value_str(struct dma_fence *f, char *str, int size)
  59 {
  60         struct virtio_gpu_fence *fence = to_virtio_fence(f);
  61
  62         snprintf(str, size, "%llu", (u64)atomic64_read(&fence->drv->last_seq));
  63 }
  64
  65 static const struct dma_fence_ops virtio_fence_ops = {
  66         .get_driver_name     = virtio_get_driver_name,
  67         .get_timeline_name   = virtio_get_timeline_name,
  68         .signaled            = virtio_fence_signaled,
  69         .fence_value_str     = virtio_fence_value_str,
  70         .timeline_value_str  = virtio_timeline_value_str,
  71 };
  72
  73 struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev)
  74 {
  75         struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
  76         struct virtio_gpu_fence *fence = kzalloc(sizeof(struct virtio_gpu_fence),
  77                                                         GFP_KERNEL);
  78         if (!fence)
  79                 return fence;
  80
  81         fence->drv = drv;
  82
  83         /* This only partially initializes the fence because the seqno is
  84          * unknown yet.  The fence must not be used outside of the driver
  85          * until virtio_gpu_fence_emit is called.
  86          */
  87         dma_fence_init(&fence->f, &virtio_fence_ops, &drv->lock, drv->context, 0);
  88
  89         return fence;
  90 }
  91
  92 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
  93                           struct virtio_gpu_ctrl_hdr *cmd_hdr,
  94                           struct virtio_gpu_fence *fence)
  95 {
  96         struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
  97         unsigned long irq_flags;
  98
  99         spin_lock_irqsave(&drv->lock, irq_flags);
 100         fence->f.seqno = ++drv->sync_seq;
 101         dma_fence_get(&fence->f);
 102         list_add_tail(&fence->node, &drv->fences);
 103         spin_unlock_irqrestore(&drv->lock, irq_flags);
 104
 105         trace_dma_fence_emit(&fence->f);
 106
 107         cmd_hdr->flags |= cpu_to_le32(VIRTIO_GPU_FLAG_FENCE);
 108         cmd_hdr->fence_id = cpu_to_le64(fence->f.seqno);
 109 }
 110
 111 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vgdev,
 112                                     u64 last_seq)
 113 {
 114         struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
 115         struct virtio_gpu_fence *fence, *tmp;
 116         unsigned long irq_flags;
 117
 118         spin_lock_irqsave(&drv->lock, irq_flags);
 119         atomic64_set(&vgdev->fence_drv.last_seq, last_seq);
 120         list_for_each_entry_safe(fence, tmp, &drv->fences, node) {
 121                 if (last_seq < fence->f.seqno)
 122                         continue;
 123                 dma_fence_signal_locked(&fence->f);
 124                 list_del(&fence->node);
 125                 dma_fence_put(&fence->f);
 126         }
 127         spin_unlock_irqrestore(&drv->lock, irq_flags);
 128 }