2 * Copyright (C) 2015 Red Hat, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 #include <linux/virtio.h>
30 #include <linux/virtio_ids.h>
31 #include <linux/virtio_config.h>
32 #include <linux/virtio_gpu.h>
34 #include <drm/drm_atomic.h>
35 #include <drm/drm_encoder.h>
36 #include <drm/drm_fb_helper.h>
37 #include <drm/drm_gem.h>
38 #include <drm/drm_gem_shmem_helper.h>
39 #include <drm/drm_ioctl.h>
40 #include <drm/drm_probe_helper.h>
41 #include <drm/virtgpu_drm.h>
43 #define DRIVER_NAME "virtio_gpu"
44 #define DRIVER_DESC "virtio GPU"
45 #define DRIVER_DATE "0"
47 #define DRIVER_MAJOR 0
48 #define DRIVER_MINOR 1
49 #define DRIVER_PATCHLEVEL 0
51 struct virtio_gpu_object_params {
68 struct virtio_gpu_object {
69 struct drm_gem_shmem_object base;
70 uint32_t hw_res_handle;
72 struct sg_table *pages;
77 #define gem_to_virtio_gpu_obj(gobj) \
78 container_of((gobj), struct virtio_gpu_object, base.base)
80 struct virtio_gpu_object_array {
81 struct ww_acquire_ctx ticket;
82 struct list_head next;
84 struct drm_gem_object *objs[];
87 struct virtio_gpu_vbuffer;
88 struct virtio_gpu_device;
90 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
91 struct virtio_gpu_vbuffer *vbuf);
93 struct virtio_gpu_fence_driver {
97 struct list_head fences;
101 struct virtio_gpu_fence {
103 struct virtio_gpu_fence_driver *drv;
104 struct list_head node;
106 #define to_virtio_fence(x) \
107 container_of(x, struct virtio_gpu_fence, f)
109 struct virtio_gpu_vbuffer {
118 virtio_gpu_resp_cb resp_cb;
120 struct virtio_gpu_object_array *objs;
121 struct list_head list;
124 struct virtio_gpu_output {
126 struct drm_crtc crtc;
127 struct drm_connector conn;
128 struct drm_encoder enc;
129 struct virtio_gpu_display_one info;
130 struct virtio_gpu_update_cursor cursor;
136 #define drm_crtc_to_virtio_gpu_output(x) \
137 container_of(x, struct virtio_gpu_output, crtc)
138 #define drm_connector_to_virtio_gpu_output(x) \
139 container_of(x, struct virtio_gpu_output, conn)
140 #define drm_encoder_to_virtio_gpu_output(x) \
141 container_of(x, struct virtio_gpu_output, enc)
143 struct virtio_gpu_framebuffer {
144 struct drm_framebuffer base;
145 struct virtio_gpu_fence *fence;
147 #define to_virtio_gpu_framebuffer(x) \
148 container_of(x, struct virtio_gpu_framebuffer, base)
150 struct virtio_gpu_queue {
151 struct virtqueue *vq;
153 wait_queue_head_t ack_queue;
154 struct work_struct dequeue_work;
157 struct virtio_gpu_drv_capset {
159 uint32_t max_version;
163 struct virtio_gpu_drv_cap_cache {
164 struct list_head head;
172 struct virtio_gpu_device {
174 struct drm_device *ddev;
176 struct virtio_device *vdev;
178 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
179 uint32_t num_scanouts;
181 struct virtio_gpu_queue ctrlq;
182 struct virtio_gpu_queue cursorq;
183 struct kmem_cache *vbufs;
186 struct ida resource_ida;
188 wait_queue_head_t resp_wq;
189 /* current display info */
190 spinlock_t display_info_lock;
191 bool display_info_pending;
193 struct virtio_gpu_fence_driver fence_drv;
195 struct ida ctx_id_ida;
200 struct work_struct config_changed_work;
202 struct work_struct obj_free_work;
203 spinlock_t obj_free_lock;
204 struct list_head obj_free_list;
206 struct virtio_gpu_drv_capset *capsets;
207 uint32_t num_capsets;
208 struct list_head cap_cache;
211 struct virtio_gpu_fpriv {
216 #define DRM_VIRTIO_NUM_IOCTLS 10
217 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
220 int virtio_gpu_init(struct drm_device *dev);
221 void virtio_gpu_deinit(struct drm_device *dev);
222 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
223 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
226 void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
227 int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
228 void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
229 int virtio_gpu_gem_create(struct drm_file *file,
230 struct drm_device *dev,
231 struct virtio_gpu_object_params *params,
232 struct drm_gem_object **obj_p,
234 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
235 struct drm_file *file);
236 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
237 struct drm_file *file);
238 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
239 struct drm_device *dev,
240 struct drm_mode_create_dumb *args);
241 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
242 struct drm_device *dev,
243 uint32_t handle, uint64_t *offset_p);
245 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
246 struct virtio_gpu_object_array*
247 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
248 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
249 struct drm_gem_object *obj);
250 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
251 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
252 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
253 struct dma_fence *fence);
254 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
255 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
256 struct virtio_gpu_object_array *objs);
257 void virtio_gpu_array_put_free_work(struct work_struct *work);
260 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
261 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
262 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
263 struct virtio_gpu_object *bo,
264 struct virtio_gpu_object_params *params,
265 struct virtio_gpu_object_array *objs,
266 struct virtio_gpu_fence *fence);
267 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
268 uint32_t resource_id);
269 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
271 uint32_t width, uint32_t height,
272 uint32_t x, uint32_t y,
273 struct virtio_gpu_object_array *objs,
274 struct virtio_gpu_fence *fence);
275 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
276 uint32_t resource_id,
277 uint32_t x, uint32_t y,
278 uint32_t width, uint32_t height);
279 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
280 uint32_t scanout_id, uint32_t resource_id,
281 uint32_t width, uint32_t height,
282 uint32_t x, uint32_t y);
283 int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
284 struct virtio_gpu_object *obj,
285 struct virtio_gpu_fence *fence);
286 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
287 struct virtio_gpu_object *obj);
288 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
289 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
290 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
291 struct virtio_gpu_output *output);
292 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
293 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
294 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
295 int idx, int version,
296 struct virtio_gpu_drv_cap_cache **cache_p);
297 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
298 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
299 uint32_t nlen, const char *name);
300 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
302 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
304 struct virtio_gpu_object_array *objs);
305 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
307 struct virtio_gpu_object_array *objs);
308 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
309 void *data, uint32_t data_size,
311 struct virtio_gpu_object_array *objs,
312 struct virtio_gpu_fence *fence);
313 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
315 uint64_t offset, uint32_t level,
316 struct drm_virtgpu_3d_box *box,
317 struct virtio_gpu_object_array *objs,
318 struct virtio_gpu_fence *fence);
319 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
321 uint64_t offset, uint32_t level,
322 struct drm_virtgpu_3d_box *box,
323 struct virtio_gpu_object_array *objs,
324 struct virtio_gpu_fence *fence);
326 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
327 struct virtio_gpu_object *bo,
328 struct virtio_gpu_object_params *params,
329 struct virtio_gpu_object_array *objs,
330 struct virtio_gpu_fence *fence);
331 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
332 void virtio_gpu_cursor_ack(struct virtqueue *vq);
333 void virtio_gpu_fence_ack(struct virtqueue *vq);
334 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
335 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
336 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
338 /* virtio_gpu_display.c */
339 int virtio_gpu_framebuffer_init(struct drm_device *dev,
340 struct virtio_gpu_framebuffer *vgfb,
341 const struct drm_mode_fb_cmd2 *mode_cmd,
342 struct drm_gem_object *obj);
343 void virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
344 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
346 /* virtio_gpu_plane.c */
347 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
348 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
349 enum drm_plane_type type,
352 /* virtio_gpu_fence.c */
353 bool virtio_fence_signaled(struct dma_fence *f);
354 struct virtio_gpu_fence *virtio_gpu_fence_alloc(
355 struct virtio_gpu_device *vgdev);
356 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
357 struct virtio_gpu_ctrl_hdr *cmd_hdr,
358 struct virtio_gpu_fence *fence);
359 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
362 /* virtio_gpu_object */
363 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
365 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
366 struct virtio_gpu_object_params *params,
367 struct virtio_gpu_object **bo_ptr,
368 struct virtio_gpu_fence *fence);
370 /* virtgpu_prime.c */
371 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
372 struct drm_device *dev, struct dma_buf_attachment *attach,
373 struct sg_table *sgt);
375 static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
377 return drm_vma_node_offset_addr(&bo->base.base.vma_node);
381 int virtio_gpu_debugfs_init(struct drm_minor *minor);