1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2020 VeriSilicon Holdings Co., Ltd.
9 #include <linux/version.h>
10 #include <linux/mm_types.h>
12 #include <drm/drm_modes.h>
13 #if KERNEL_VERSION(5, 5, 0) > LINUX_VERSION_CODE
20 #include "vs_dc_dec.h"
21 #ifdef CONFIG_VERISILICON_MMU
22 #include "vs_dc_mmu.h"
26 void (*dump_enable)(struct device *dev, dma_addr_t addr,
28 void (*dump_disable)(struct device *dev);
32 enum dc_hw_plane_id id;
36 struct vs_crtc *crtc[DC_DISPLAY_NUM];
38 #ifdef CONFIG_VERISILICON_DEC
39 struct dc_dec400l dec400l;
42 void __iomem *pmu_base;
44 unsigned int pix_clk_rate; /* in KHz */
46 struct reset_control *resets;
47 struct clk_bulk_data *clks;
53 struct vs_dc_plane planes[PLANE_NUM];
55 const struct vs_dc_funcs *funcs;
58 struct clk *axicfg0_axi;
66 struct clk *hdmitx0_mclk;
69 struct clk *dc8200_clk_pix0;
70 struct clk *dc8200_clk_pix1;
71 struct clk *dc8200_axi;
72 struct clk *dc8200_core;
73 struct clk *dc8200_ahb;
75 struct clk *vout_top_axi;
76 struct clk *vout_top_lcd;
78 struct clk *hdmitx0_pixelclk;
79 struct clk *dc8200_pix0;
80 struct clk *dc8200_clk_pix0_out;
81 struct clk *dc8200_clk_pix1_out;
83 struct reset_control *vout_resets;
86 struct reset_control *dc8200_rst_axi;
87 struct reset_control *dc8200_rst_core;
88 struct reset_control *dc8200_rst_ahb;
90 struct reset_control *rst_vout_src;
91 struct reset_control *noc_disp;
95 struct regmap *dss_regmap;
101 extern struct platform_driver dc_platform_driver;
102 extern struct platform_driver starfive_dsi_platform_driver;
103 extern int init_seeed_panel(void);
104 extern void exit_seeed_panel(void);
106 #endif /* __VS_DC_H__ */