drivers/gpu/drm/vc4/vc4_kms.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2015 Broadcom
   4  */
   5
   6 /**
   7  * DOC: VC4 KMS
   8  *
   9  * This is the general code for implementing KMS mode setting that
  10  * doesn't clearly associate with any of the other objects (plane,
  11  * crtc, HDMI encoder).
  12  */
  13
  14 #include <drm/drm_atomic.h>
  15 #include <drm/drm_atomic_helper.h>
  16 #include <drm/drm_crtc.h>
  17 #include <drm/drm_gem_framebuffer_helper.h>
  18 #include <drm/drm_plane_helper.h>
  19 #include <drm/drm_probe_helper.h>
  20 #include <drm/drm_vblank.h>
  21
  22 #include "vc4_drv.h"
  23 #include "vc4_regs.h"
  24
  25 struct vc4_ctm_state {
  26         struct drm_private_state base;
  27         struct drm_color_ctm *ctm;
  28         int fifo;
  29 };
  30
  31 static struct vc4_ctm_state *to_vc4_ctm_state(struct drm_private_state *priv)
  32 {
  33         return container_of(priv, struct vc4_ctm_state, base);
  34 }
  35
  36 struct vc4_load_tracker_state {
  37         struct drm_private_state base;
  38         u64 hvs_load;
  39         u64 membus_load;
  40 };
  41
  42 static struct vc4_load_tracker_state *
  43 to_vc4_load_tracker_state(struct drm_private_state *priv)
  44 {
  45         return container_of(priv, struct vc4_load_tracker_state, base);
  46 }
  47
  48 static struct vc4_ctm_state *vc4_get_ctm_state(struct drm_atomic_state *state,
  49                                                struct drm_private_obj *manager)
  50 {
  51         struct drm_device *dev = state->dev;
  52         struct vc4_dev *vc4 = dev->dev_private;
  53         struct drm_private_state *priv_state;
  54         int ret;
  55
  56         ret = drm_modeset_lock(&vc4->ctm_state_lock, state->acquire_ctx);
  57         if (ret)
  58                 return ERR_PTR(ret);
  59
  60         priv_state = drm_atomic_get_private_obj_state(state, manager);
  61         if (IS_ERR(priv_state))
  62                 return ERR_CAST(priv_state);
  63
  64         return to_vc4_ctm_state(priv_state);
  65 }
  66
  67 static struct drm_private_state *
  68 vc4_ctm_duplicate_state(struct drm_private_obj *obj)
  69 {
  70         struct vc4_ctm_state *state;
  71
  72         state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL);
  73         if (!state)
  74                 return NULL;
  75
  76         __drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
  77
  78         return &state->base;
  79 }
  80
  81 static void vc4_ctm_destroy_state(struct drm_private_obj *obj,
  82                                   struct drm_private_state *state)
  83 {
  84         struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(state);
  85
  86         kfree(ctm_state);
  87 }
  88
  89 static const struct drm_private_state_funcs vc4_ctm_state_funcs = {
  90         .atomic_duplicate_state = vc4_ctm_duplicate_state,
  91         .atomic_destroy_state = vc4_ctm_destroy_state,
  92 };
  93
  94 /* Converts a DRM S31.32 value to the HW S0.9 format. */
  95 static u16 vc4_ctm_s31_32_to_s0_9(u64 in)
  96 {
  97         u16 r;
  98
  99         /* Sign bit. */
 100         r = in & BIT_ULL(63) ? BIT(9) : 0;
 101
 102         if ((in & GENMASK_ULL(62, 32)) > 0) {
 103                 /* We have zero integer bits so we can only saturate here. */
 104                 r |= GENMASK(8, 0);
 105         } else {
 106                 /* Otherwise take the 9 most important fractional bits. */
 107                 r |= (in >> 23) & GENMASK(8, 0);
 108         }
 109
 110         return r;
 111 }
 112
 113 static void
 114 vc4_ctm_commit(struct vc4_dev *vc4, struct drm_atomic_state *state)
 115 {
 116         struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(vc4->ctm_manager.state);
 117         struct drm_color_ctm *ctm = ctm_state->ctm;
 118
 119         if (vc4->firmware_kms)
 120                 return;
 121
 122         if (ctm_state->fifo) {
 123                 HVS_WRITE(SCALER_OLEDCOEF2,
 124                           VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]),
 125                                         SCALER_OLEDCOEF2_R_TO_R) |
 126                           VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[3]),
 127                                         SCALER_OLEDCOEF2_R_TO_G) |
 128                           VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[6]),
 129                                         SCALER_OLEDCOEF2_R_TO_B));
 130                 HVS_WRITE(SCALER_OLEDCOEF1,
 131                           VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[1]),
 132                                         SCALER_OLEDCOEF1_G_TO_R) |
 133                           VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[4]),
 134                                         SCALER_OLEDCOEF1_G_TO_G) |
 135                           VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[7]),
 136                                         SCALER_OLEDCOEF1_G_TO_B));
 137                 HVS_WRITE(SCALER_OLEDCOEF0,
 138                           VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[2]),
 139                                         SCALER_OLEDCOEF0_B_TO_R) |
 140                           VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[5]),
 141                                         SCALER_OLEDCOEF0_B_TO_G) |
 142                           VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[8]),
 143                                         SCALER_OLEDCOEF0_B_TO_B));
 144         }
 145
 146         HVS_WRITE(SCALER_OLEDOFFS,
 147                   VC4_SET_FIELD(ctm_state->fifo, SCALER_OLEDOFFS_DISPFIFO));
 148 }
 149
 150 static void
 151 vc4_atomic_complete_commit(struct drm_atomic_state *state)
 152 {
 153         struct drm_device *dev = state->dev;
 154         struct vc4_dev *vc4 = to_vc4_dev(dev);
 155         struct vc4_crtc *vc4_crtc;
 156         int i;
 157
 158         for (i = 0; i < dev->mode_config.num_crtc; i++) {
 159                 if (!state->crtcs[i].ptr || !state->crtcs[i].commit)
 160                         continue;
 161
 162                 vc4_crtc = to_vc4_crtc(state->crtcs[i].ptr);
 163                 vc4_hvs_mask_underrun(dev, vc4_crtc->channel);
 164         }
 165
 166         drm_atomic_helper_wait_for_fences(dev, state, false);
 167
 168         drm_atomic_helper_wait_for_dependencies(state);
 169
 170         drm_atomic_helper_commit_modeset_disables(dev, state);
 171
 172         if (!vc4->firmware_kms)
 173                 vc4_ctm_commit(vc4, state);
 174
 175         drm_atomic_helper_commit_planes(dev, state, 0);
 176
 177         drm_atomic_helper_commit_modeset_enables(dev, state);
 178
 179         drm_atomic_helper_fake_vblank(state);
 180
 181         drm_atomic_helper_commit_hw_done(state);
 182
 183         drm_atomic_helper_wait_for_flip_done(dev, state);
 184
 185         drm_atomic_helper_cleanup_planes(dev, state);
 186
 187         drm_atomic_helper_commit_cleanup_done(state);
 188
 189         drm_atomic_state_put(state);
 190
 191         up(&vc4->async_modeset);
 192 }
 193
 194 static void commit_work(struct work_struct *work)
 195 {
 196         struct drm_atomic_state *state = container_of(work,
 197                                                       struct drm_atomic_state,
 198                                                       commit_work);
 199         vc4_atomic_complete_commit(state);
 200 }
 201
 202 /**
 203  * vc4_atomic_commit - commit validated state object
 204  * @dev: DRM device
 205  * @state: the driver state object
 206  * @nonblock: nonblocking commit
 207  *
 208  * This function commits a with drm_atomic_helper_check() pre-validated state
 209  * object. This can still fail when e.g. the framebuffer reservation fails. For
 210  * now this doesn't implement asynchronous commits.
 211  *
 212  * RETURNS
 213  * Zero for success or -errno.
 214  */
 215 static int vc4_atomic_commit(struct drm_device *dev,
 216                              struct drm_atomic_state *state,
 217                              bool nonblock)
 218 {
 219         struct vc4_dev *vc4 = to_vc4_dev(dev);
 220         int ret;
 221
 222         if (state->async_update) {
 223                 ret = down_interruptible(&vc4->async_modeset);
 224                 if (ret)
 225                         return ret;
 226
 227                 ret = drm_atomic_helper_prepare_planes(dev, state);
 228                 if (ret) {
 229                         up(&vc4->async_modeset);
 230                         return ret;
 231                 }
 232
 233                 drm_atomic_helper_async_commit(dev, state);
 234
 235                 drm_atomic_helper_cleanup_planes(dev, state);
 236
 237                 up(&vc4->async_modeset);
 238
 239                 return 0;
 240         }
 241
 242         /* We know for sure we don't want an async update here. Set
 243          * state->legacy_cursor_update to false to prevent
 244          * drm_atomic_helper_setup_commit() from auto-completing
 245          * commit->flip_done.
 246          */
 247         if (!vc4->firmware_kms)
 248                 state->legacy_cursor_update = false;
 249         ret = drm_atomic_helper_setup_commit(state, nonblock);
 250         if (ret)
 251                 return ret;
 252
 253         INIT_WORK(&state->commit_work, commit_work);
 254
 255         ret = down_interruptible(&vc4->async_modeset);
 256         if (ret)
 257                 return ret;
 258
 259         ret = drm_atomic_helper_prepare_planes(dev, state);
 260         if (ret) {
 261                 up(&vc4->async_modeset);
 262                 return ret;
 263         }
 264
 265         if (!nonblock) {
 266                 ret = drm_atomic_helper_wait_for_fences(dev, state, true);
 267                 if (ret) {
 268                         drm_atomic_helper_cleanup_planes(dev, state);
 269                         up(&vc4->async_modeset);
 270                         return ret;
 271                 }
 272         }
 273
 274         /*
 275          * This is the point of no return - everything below never fails except
 276          * when the hw goes bonghits. Which means we can commit the new state on
 277          * the software side now.
 278          */
 279
 280         BUG_ON(drm_atomic_helper_swap_state(state, false) < 0);
 281
 282         /*
 283          * Everything below can be run asynchronously without the need to grab
 284          * any modeset locks at all under one condition: It must be guaranteed
 285          * that the asynchronous work has either been cancelled (if the driver
 286          * supports it, which at least requires that the framebuffers get
 287          * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
 288          * before the new state gets committed on the software side with
 289          * drm_atomic_helper_swap_state().
 290          *
 291          * This scheme allows new atomic state updates to be prepared and
 292          * checked in parallel to the asynchronous completion of the previous
 293          * update. Which is important since compositors need to figure out the
 294          * composition of the next frame right after having submitted the
 295          * current layout.
 296          */
 297
 298         drm_atomic_state_get(state);
 299         if (nonblock)
 300                 queue_work(system_unbound_wq, &state->commit_work);
 301         else
 302                 vc4_atomic_complete_commit(state);
 303
 304         return 0;
 305 }
 306
 307 static struct drm_framebuffer *vc4_fb_create(struct drm_device *dev,
 308                                              struct drm_file *file_priv,
 309                                              const struct drm_mode_fb_cmd2 *mode_cmd)
 310 {
 311         struct drm_mode_fb_cmd2 mode_cmd_local;
 312
 313         /* If the user didn't specify a modifier, use the
 314          * vc4_set_tiling_ioctl() state for the BO.
 315          */
 316         if (!(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
 317                 struct drm_gem_object *gem_obj;
 318                 struct vc4_bo *bo;
 319
 320                 gem_obj = drm_gem_object_lookup(file_priv,
 321                                                 mode_cmd->handles[0]);
 322                 if (!gem_obj) {
 323                         DRM_DEBUG("Failed to look up GEM BO %d\n",
 324                                   mode_cmd->handles[0]);
 325                         return ERR_PTR(-ENOENT);
 326                 }
 327                 bo = to_vc4_bo(gem_obj);
 328
 329                 mode_cmd_local = *mode_cmd;
 330
 331                 if (bo->t_format) {
 332                         mode_cmd_local.modifier[0] =
 333                                 DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED;
 334                 } else {
 335                         mode_cmd_local.modifier[0] = DRM_FORMAT_MOD_NONE;
 336                 }
 337
 338                 drm_gem_object_put_unlocked(gem_obj);
 339
 340                 mode_cmd = &mode_cmd_local;
 341         }
 342
 343         return drm_gem_fb_create(dev, file_priv, mode_cmd);
 344 }
 345
 346 /* Our CTM has some peculiar limitations: we can only enable it for one CRTC
 347  * at a time and the HW only supports S0.9 scalars. To account for the latter,
 348  * we don't allow userland to set a CTM that we have no hope of approximating.
 349  */
 350 static int
 351 vc4_ctm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
 352 {
 353         struct vc4_dev *vc4 = to_vc4_dev(dev);
 354         struct vc4_ctm_state *ctm_state = NULL;
 355         struct drm_crtc *crtc;
 356         struct drm_crtc_state *old_crtc_state, *new_crtc_state;
 357         struct drm_color_ctm *ctm;
 358         int i;
 359
 360         for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
 361                 /* CTM is being disabled. */
 362                 if (!new_crtc_state->ctm && old_crtc_state->ctm) {
 363                         ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
 364                         if (IS_ERR(ctm_state))
 365                                 return PTR_ERR(ctm_state);
 366                         ctm_state->fifo = 0;
 367                 }
 368         }
 369
 370         for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
 371                 if (new_crtc_state->ctm == old_crtc_state->ctm)
 372                         continue;
 373
 374                 if (!ctm_state) {
 375                         ctm_state = vc4_get_ctm_state(state, &vc4->ctm_manager);
 376                         if (IS_ERR(ctm_state))
 377                                 return PTR_ERR(ctm_state);
 378                 }
 379
 380                 /* CTM is being enabled or the matrix changed. */
 381                 if (new_crtc_state->ctm) {
 382                         /* fifo is 1-based since 0 disables CTM. */
 383                         int fifo = to_vc4_crtc(crtc)->channel + 1;
 384
 385                         /* Check userland isn't trying to turn on CTM for more
 386                          * than one CRTC at a time.
 387                          */
 388                         if (ctm_state->fifo && ctm_state->fifo != fifo) {
 389                                 DRM_DEBUG_DRIVER("Too many CTM configured\n");
 390                                 return -EINVAL;
 391                         }
 392
 393                         /* Check we can approximate the specified CTM.
 394                          * We disallow scalars |c| > 1.0 since the HW has
 395                          * no integer bits.
 396                          */
 397                         ctm = new_crtc_state->ctm->data;
 398                         for (i = 0; i < ARRAY_SIZE(ctm->matrix); i++) {
 399                                 u64 val = ctm->matrix[i];
 400
 401                                 val &= ~BIT_ULL(63);
 402                                 if (val > BIT_ULL(32))
 403                                         return -EINVAL;
 404                         }
 405
 406                         ctm_state->fifo = fifo;
 407                         ctm_state->ctm = ctm;
 408                 }
 409         }
 410
 411         return 0;
 412 }
 413
 414 static int vc4_load_tracker_atomic_check(struct drm_atomic_state *state)
 415 {
 416         struct drm_plane_state *old_plane_state, *new_plane_state;
 417         struct vc4_dev *vc4 = to_vc4_dev(state->dev);
 418         struct vc4_load_tracker_state *load_state;
 419         struct drm_private_state *priv_state;
 420         struct drm_plane *plane;
 421         int i;
 422
 423         priv_state = drm_atomic_get_private_obj_state(state,
 424                                                       &vc4->load_tracker);
 425         if (IS_ERR(priv_state))
 426                 return PTR_ERR(priv_state);
 427
 428         load_state = to_vc4_load_tracker_state(priv_state);
 429         for_each_oldnew_plane_in_state(state, plane, old_plane_state,
 430                                        new_plane_state, i) {
 431                 struct vc4_plane_state *vc4_plane_state;
 432
 433                 if (old_plane_state->fb && old_plane_state->crtc) {
 434                         vc4_plane_state = to_vc4_plane_state(old_plane_state);
 435                         load_state->membus_load -= vc4_plane_state->membus_load;
 436                         load_state->hvs_load -= vc4_plane_state->hvs_load;
 437                 }
 438
 439                 if (new_plane_state->fb && new_plane_state->crtc) {
 440                         vc4_plane_state = to_vc4_plane_state(new_plane_state);
 441                         load_state->membus_load += vc4_plane_state->membus_load;
 442                         load_state->hvs_load += vc4_plane_state->hvs_load;
 443                 }
 444         }
 445
 446         /* Don't check the load when the tracker is disabled. */
 447         if (!vc4->load_tracker_enabled)
 448                 return 0;
 449
 450         /* The absolute limit is 2Gbyte/sec, but let's take a margin to let
 451          * the system work when other blocks are accessing the memory.
 452          */
 453         if (load_state->membus_load > SZ_1G + SZ_512M)
 454                 return -ENOSPC;
 455
 456         /* HVS clock is supposed to run @ 250Mhz, let's take a margin and
 457          * consider the maximum number of cycles is 240M.
 458          */
 459         if (load_state->hvs_load > 240000000ULL)
 460                 return -ENOSPC;
 461
 462         return 0;
 463 }
 464
 465 static struct drm_private_state *
 466 vc4_load_tracker_duplicate_state(struct drm_private_obj *obj)
 467 {
 468         struct vc4_load_tracker_state *state;
 469
 470         state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL);
 471         if (!state)
 472                 return NULL;
 473
 474         __drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
 475
 476         return &state->base;
 477 }
 478
 479 static void vc4_load_tracker_destroy_state(struct drm_private_obj *obj,
 480                                            struct drm_private_state *state)
 481 {
 482         struct vc4_load_tracker_state *load_state;
 483
 484         load_state = to_vc4_load_tracker_state(state);
 485         kfree(load_state);
 486 }
 487
 488 static const struct drm_private_state_funcs vc4_load_tracker_state_funcs = {
 489         .atomic_duplicate_state = vc4_load_tracker_duplicate_state,
 490         .atomic_destroy_state = vc4_load_tracker_destroy_state,
 491 };
 492
 493 static int
 494 vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
 495 {
 496         int ret;
 497
 498         ret = vc4_ctm_atomic_check(dev, state);
 499         if (ret < 0)
 500                 return ret;
 501
 502         ret = drm_atomic_helper_check(dev, state);
 503         if (ret)
 504                 return ret;
 505
 506         return vc4_load_tracker_atomic_check(state);
 507 }
 508
 509 static const struct drm_mode_config_funcs vc4_mode_funcs = {
 510         .atomic_check = vc4_atomic_check,
 511         .atomic_commit = vc4_atomic_commit,
 512         .fb_create = vc4_fb_create,
 513 };
 514
 515 int vc4_kms_load(struct drm_device *dev)
 516 {
 517         struct vc4_dev *vc4 = to_vc4_dev(dev);
 518         struct vc4_ctm_state *ctm_state;
 519         struct vc4_load_tracker_state *load_state;
 520         int ret;
 521
 522         /* Start with the load tracker enabled. Can be disabled through the
 523          * debugfs load_tracker file.
 524          */
 525         vc4->load_tracker_enabled = true;
 526
 527         sema_init(&vc4->async_modeset, 1);
 528
 529         /* Set support for vblank irq fast disable, before drm_vblank_init() */
 530         dev->vblank_disable_immediate = true;
 531
 532         dev->irq_enabled = true;
 533         ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
 534         if (ret < 0) {
 535                 dev_err(dev->dev, "failed to initialize vblank\n");
 536                 return ret;
 537         }
 538
 539         dev->mode_config.max_width = 7680;
 540         dev->mode_config.max_height = 7680;
 541         dev->mode_config.funcs = &vc4_mode_funcs;
 542         dev->mode_config.preferred_depth = 24;
 543         dev->mode_config.async_page_flip = true;
 544         dev->mode_config.allow_fb_modifiers = true;
 545         dev->mode_config.normalize_zpos = true;
 546
 547         drm_modeset_lock_init(&vc4->ctm_state_lock);
 548
 549         ctm_state = kzalloc(sizeof(*ctm_state), GFP_KERNEL);
 550         if (!ctm_state)
 551                 return -ENOMEM;
 552
 553         drm_atomic_private_obj_init(dev, &vc4->ctm_manager, &ctm_state->base,
 554                                     &vc4_ctm_state_funcs);
 555
 556         load_state = kzalloc(sizeof(*load_state), GFP_KERNEL);
 557         if (!load_state) {
 558                 drm_atomic_private_obj_fini(&vc4->ctm_manager);
 559                 return -ENOMEM;
 560         }
 561
 562         drm_atomic_private_obj_init(dev, &vc4->load_tracker, &load_state->base,
 563                                     &vc4_load_tracker_state_funcs);
 564
 565         drm_mode_config_reset(dev);
 566
 567         drm_kms_helper_poll_init(dev);
 568
 569         return 0;
 570 }