4 #include <drm/drm_connector.h>
6 #include <sound/dmaengine_pcm.h>
11 /* VC4 HDMI encoder KMS struct */
12 struct vc4_hdmi_encoder {
13 struct vc4_encoder base;
17 static inline struct vc4_hdmi_encoder *
18 to_vc4_hdmi_encoder(struct drm_encoder *encoder)
20 return container_of(encoder, struct vc4_hdmi_encoder, base.base);
24 struct vc4_hdmi_register;
25 struct vc4_hdmi_connector_state;
27 enum vc4_hdmi_phy_channel {
34 struct vc4_hdmi_variant {
35 /* Encoder Type for that controller */
36 enum vc4_encoder_type encoder_type;
39 const char *card_name;
41 /* Filename to expose the registers in debugfs */
42 const char *debugfs_name;
44 /* Maximum pixel clock supported by the controller (in Hz) */
45 unsigned long long max_pixel_clock;
47 /* List of the registers available on that variant */
48 const struct vc4_hdmi_register *registers;
50 /* Number of registers on that variant */
51 unsigned int num_registers;
54 * The variants don't map the lane in the same order in the
55 * PHY, so this is an array mapping the HDMI channel (index)
56 * to the PHY lane (value).
58 enum vc4_hdmi_phy_channel phy_lane_mapping[4];
60 /* The BCM2711 cannot deal with odd horizontal pixel timings */
61 bool unsupported_odd_h_timings;
64 * The BCM2711 CEC/hotplug IRQ controller is shared between the
65 * two HDMI controllers, and we have a proper irqchip driver for
68 bool external_irq_controller;
70 /* Callback to get the resources (memory region, interrupts,
71 * clocks, etc) for that variant.
73 int (*init_resources)(struct vc4_hdmi *vc4_hdmi);
75 /* Callback to reset the HDMI block */
76 void (*reset)(struct vc4_hdmi *vc4_hdmi);
78 /* Callback to enable / disable the CSC */
79 void (*csc_setup)(struct vc4_hdmi *vc4_hdmi,
80 struct drm_connector_state *state,
81 const struct drm_display_mode *mode);
83 /* Callback to configure the video timings in the HDMI block */
84 void (*set_timings)(struct vc4_hdmi *vc4_hdmi,
85 struct drm_connector_state *state,
86 struct drm_display_mode *mode);
88 /* Callback to initialize the PHY according to the connector state */
89 void (*phy_init)(struct vc4_hdmi *vc4_hdmi,
90 struct vc4_hdmi_connector_state *vc4_conn_state);
92 /* Callback to disable the PHY */
93 void (*phy_disable)(struct vc4_hdmi *vc4_hdmi);
95 /* Callback to enable the RNG in the PHY */
96 void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi);
98 /* Callback to disable the RNG in the PHY */
99 void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi);
101 /* Callback to get channel map */
102 u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask);
104 /* Enables HDR metadata */
107 /* Callback for hardware specific hotplug detect */
108 bool (*hp_detect)(struct vc4_hdmi *vc4_hdmi);
111 /* HDMI audio information */
112 struct vc4_hdmi_audio {
113 struct snd_soc_card card;
114 struct snd_soc_dai_link link;
115 struct snd_soc_dai_link_component cpu;
116 struct snd_soc_dai_link_component codec;
117 struct snd_soc_dai_link_component platform;
118 struct snd_dmaengine_dai_dma_data dma_data;
119 struct hdmi_audio_infoframe infoframe;
120 struct platform_device *codec_pdev;
124 enum vc4_hdmi_output_format {
126 VC4_HDMI_OUTPUT_YUV422,
127 VC4_HDMI_OUTPUT_YUV444,
128 VC4_HDMI_OUTPUT_YUV420,
131 /* General HDMI hardware state. */
133 struct vc4_hdmi_audio audio;
135 struct platform_device *pdev;
136 const struct vc4_hdmi_variant *variant;
138 struct vc4_hdmi_encoder encoder;
139 struct drm_connector connector;
141 struct delayed_work scrambling_work;
143 struct drm_property *broadcast_rgb_property;
145 struct i2c_adapter *ddc;
146 void __iomem *hdmicore_regs;
147 void __iomem *hd_regs;
150 void __iomem *cec_regs;
152 void __iomem *csc_regs;
154 void __iomem *dvp_regs;
156 void __iomem *phy_regs;
158 void __iomem *ram_regs;
160 void __iomem *rm_regs;
162 struct gpio_desc *hpd_gpio;
165 * On some systems (like the RPi4), some modes are in the same
166 * frequency range than the WiFi channels (1440p@60Hz for
167 * example). Should we take evasive actions because that system
168 * has a wifi adapter?
170 bool disable_wifi_frequencies;
173 * Even if HDMI0 on the RPi4 can output modes requiring a pixel
174 * rate higher than 297MHz, it needs some adjustments in the
175 * config.txt file to be able to do so and thus won't always be
180 struct cec_adapter *cec_adap;
181 struct cec_msg cec_rx_msg;
185 struct clk *cec_clock;
186 struct clk *pixel_clock;
187 struct clk *hsm_clock;
188 struct clk *audio_clock;
189 struct clk *pixel_bvb_clock;
191 struct reset_control *reset;
193 struct debugfs_regset32 hdmi_regset;
194 struct debugfs_regset32 hd_regset;
197 * @hw_lock: Spinlock protecting device register access.
202 * @mutex: Mutex protecting the driver access across multiple
203 * frameworks (KMS, ALSA).
205 * NOTE: While supported, CEC has been left out since
206 * cec_s_phys_addr_from_edid() might call .adap_enable and lead to a
207 * reentrancy issue between .get_modes (or .detect) and .adap_enable.
208 * Since we don't share any state between the CEC hooks and KMS', it's
209 * not a big deal. The only trouble might come from updating the CEC
210 * clock divider which might be affected by a modeset, but CEC should
211 * be resilient to that.
216 * @saved_adjusted_mode: Copy of @drm_crtc_state.adjusted_mode
217 * for use by ALSA hooks and interrupt handlers. Protected by @mutex.
219 struct drm_display_mode saved_adjusted_mode;
222 * @output_enabled: Is the HDMI controller currently active?
223 * Protected by @mutex.
228 * @scdc_enabled: Is the HDMI controller currently running with
229 * the scrambler on? Protected by @mutex.
234 * @output_bpc: Copy of @vc4_connector_state.output_bpc for use
235 * outside of KMS hooks. Protected by @mutex.
237 unsigned int output_bpc;
240 * @output_format: Copy of @vc4_connector_state.output_format
241 * for use outside of KMS hooks. Protected by @mutex.
243 enum vc4_hdmi_output_format output_format;
246 * @broadcast_rgb: Copy of @vc4_connector_state.broadcast_rgb
247 * for use outside of KMS hooks. Protected by @mutex.
251 /* VC5 debugfs regset */
252 struct debugfs_regset32 cec_regset;
253 struct debugfs_regset32 csc_regset;
254 struct debugfs_regset32 dvp_regset;
255 struct debugfs_regset32 phy_regset;
256 struct debugfs_regset32 ram_regset;
257 struct debugfs_regset32 rm_regset;
260 static inline struct vc4_hdmi *
261 connector_to_vc4_hdmi(struct drm_connector *connector)
263 return container_of(connector, struct vc4_hdmi, connector);
266 static inline struct vc4_hdmi *
267 encoder_to_vc4_hdmi(struct drm_encoder *encoder)
269 struct vc4_hdmi_encoder *_encoder = to_vc4_hdmi_encoder(encoder);
271 return container_of(_encoder, struct vc4_hdmi, encoder);
274 struct vc4_hdmi_connector_state {
275 struct drm_connector_state base;
276 unsigned long long pixel_rate;
277 unsigned int output_bpc;
278 enum vc4_hdmi_output_format output_format;
282 static inline struct vc4_hdmi_connector_state *
283 conn_state_to_vc4_hdmi_conn_state(struct drm_connector_state *conn_state)
285 return container_of(conn_state, struct vc4_hdmi_connector_state, base);
288 static inline const struct vc4_hdmi_connector_state *
289 const_conn_state_to_vc4_hdmi_conn_state(const struct drm_connector_state *conn_state)
291 return container_of(conn_state, struct vc4_hdmi_connector_state, base);
294 void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
295 struct vc4_hdmi_connector_state *vc4_conn_state);
296 void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
297 void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
298 void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
300 void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
301 struct vc4_hdmi_connector_state *vc4_conn_state);
302 void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
303 void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
304 void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
306 #endif /* _VC4_HDMI_H_ */