1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Broadcom
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 * DOC: VC4 firmware KMS module.
13 * As a hack to get us from the current closed source driver world
14 * toward a totally open stack, implement KMS on top of the Raspberry
15 * Pi's firmware display stack.
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_crtc_helper.h>
20 #include <drm/drm_drv.h>
21 #include <drm/drm_fb_cma_helper.h>
22 #include <drm/drm_fourcc.h>
23 #include <drm/drm_gem_atomic_helper.h>
24 #include <drm/drm_plane_helper.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_vblank.h>
28 #include <linux/component.h>
29 #include <linux/clk.h>
30 #include <linux/debugfs.h>
31 #include <linux/module.h>
33 #include <soc/bcm2835/raspberrypi-firmware.h>
37 #include "vc_image_types.h"
39 int fkms_max_refresh_rate = 85;
40 module_param(fkms_max_refresh_rate, int, 0644);
41 MODULE_PARM_DESC(fkms_max_refresh_rate, "Max supported refresh rate");
43 struct get_display_cfg {
44 u32 max_pixel_clock[2]; //Max pixel clock for each display
48 struct get_display_cfg cfg;
52 #define PLANES_PER_CRTC 8
66 u32 src_x; /* 16p16 */
67 u32 src_y; /* 16p16 */
69 u32 src_w; /* 16p16 */
70 u32 src_h; /* 16p16 */
83 u32 planes[4]; /* DMA address of each plane */
88 /* Values for the transform field */
89 #define TRANSFORM_NO_ROTATE 0
90 #define TRANSFORM_ROTATE_180 BIT(1)
91 #define TRANSFORM_FLIP_HRIZ BIT(16)
92 #define TRANSFORM_FLIP_VERT BIT(17)
94 struct mailbox_set_plane {
95 struct rpi_firmware_property_tag_header tag;
96 struct set_plane plane;
99 struct mailbox_blank_display {
100 struct rpi_firmware_property_tag_header tag1;
102 struct rpi_firmware_property_tag_header tag2;
106 struct mailbox_display_pwr {
107 struct rpi_firmware_property_tag_header tag1;
112 struct mailbox_get_edid {
113 struct rpi_firmware_property_tag_header tag1;
124 u32 clock; /* in kHz */
145 #define TIMINGS_FLAGS_H_SYNC_POS BIT(0)
146 #define TIMINGS_FLAGS_H_SYNC_NEG 0
147 #define TIMINGS_FLAGS_V_SYNC_POS BIT(1)
148 #define TIMINGS_FLAGS_V_SYNC_NEG 0
149 #define TIMINGS_FLAGS_INTERLACE BIT(2)
151 #define TIMINGS_FLAGS_ASPECT_MASK GENMASK(7, 4)
152 #define TIMINGS_FLAGS_ASPECT_NONE (0 << 4)
153 #define TIMINGS_FLAGS_ASPECT_4_3 (1 << 4)
154 #define TIMINGS_FLAGS_ASPECT_16_9 (2 << 4)
155 #define TIMINGS_FLAGS_ASPECT_64_27 (3 << 4)
156 #define TIMINGS_FLAGS_ASPECT_256_135 (4 << 4)
158 /* Limited range RGB flag. Not set corresponds to full range. */
159 #define TIMINGS_FLAGS_RGB_LIMITED BIT(8)
160 /* DVI monitor, therefore disable infoframes. Not set corresponds to HDMI. */
161 #define TIMINGS_FLAGS_DVI BIT(9)
163 #define TIMINGS_FLAGS_DBL_CLK BIT(10)
166 struct mailbox_set_mode {
167 struct rpi_firmware_property_tag_header tag1;
168 struct set_timings timings;
171 static const struct vc_image_format {
172 u32 drm; /* DRM_FORMAT_* */
173 u32 vc_image; /* VC_IMAGE_* */
175 } vc_image_formats[] = {
177 .drm = DRM_FORMAT_XRGB8888,
178 .vc_image = VC_IMAGE_XRGB8888,
181 .drm = DRM_FORMAT_ARGB8888,
182 .vc_image = VC_IMAGE_ARGB8888,
185 * FIXME: Need to resolve which DRM format goes to which vc_image format
186 * for the remaining RGBA and RGBX formats.
188 * .drm = DRM_FORMAT_ABGR8888,
189 * .vc_image = VC_IMAGE_RGBA8888,
192 * .drm = DRM_FORMAT_XBGR8888,
193 * .vc_image = VC_IMAGE_RGBA8888,
197 .drm = DRM_FORMAT_RGB565,
198 .vc_image = VC_IMAGE_RGB565,
201 .drm = DRM_FORMAT_RGB888,
202 .vc_image = VC_IMAGE_BGR888,
205 .drm = DRM_FORMAT_BGR888,
206 .vc_image = VC_IMAGE_RGB888,
209 .drm = DRM_FORMAT_YUV422,
210 .vc_image = VC_IMAGE_YUV422PLANAR,
213 .drm = DRM_FORMAT_YUV420,
214 .vc_image = VC_IMAGE_YUV420,
217 .drm = DRM_FORMAT_YVU420,
218 .vc_image = VC_IMAGE_YUV420,
222 .drm = DRM_FORMAT_NV12,
223 .vc_image = VC_IMAGE_YUV420SP,
226 .drm = DRM_FORMAT_NV21,
227 .vc_image = VC_IMAGE_YUV420SP,
231 .drm = DRM_FORMAT_P030,
232 .vc_image = VC_IMAGE_YUV10COL,
236 static const struct vc_image_format *vc4_get_vc_image_fmt(u32 drm_format)
240 for (i = 0; i < ARRAY_SIZE(vc_image_formats); i++) {
241 if (vc_image_formats[i].drm == drm_format)
242 return &vc_image_formats[i];
248 /* The firmware delivers a vblank interrupt to us through the SMI
249 * hardware, which has only this one register.
254 #define SMICS_INTERRUPTS (BIT(9) | BIT(10) | BIT(11))
256 /* Flag to denote that the firmware is giving multiple display callbacks */
257 #define SMI_NEW 0xabcd0000
259 #define vc4_crtc vc4_kms_crtc
260 #define to_vc4_crtc to_vc4_kms_crtc
262 struct drm_crtc base;
263 struct drm_encoder *encoder;
264 struct drm_connector *connector;
267 struct drm_pending_vblank_event *event;
273 static inline struct vc4_crtc *to_vc4_crtc(struct drm_crtc *crtc)
275 return container_of(crtc, struct vc4_crtc, base);
278 struct vc4_fkms_encoder {
279 struct drm_encoder base;
281 bool rgb_range_selectable;
285 static inline struct vc4_fkms_encoder *
286 to_vc4_fkms_encoder(struct drm_encoder *encoder)
288 return container_of(encoder, struct vc4_fkms_encoder, base);
291 /* "Broadcast RGB" property.
292 * Allows overriding of HDMI full or limited range RGB
294 #define VC4_BROADCAST_RGB_AUTO 0
295 #define VC4_BROADCAST_RGB_FULL 1
296 #define VC4_BROADCAST_RGB_LIMITED 2
298 /* VC4 FKMS connector KMS struct */
299 struct vc4_fkms_connector {
300 struct drm_connector base;
302 /* Since the connector is attached to just the one encoder,
303 * this is the reference to it so we can do the best_encoder()
306 struct drm_encoder *encoder;
307 struct vc4_dev *vc4_dev;
311 struct drm_property *broadcast_rgb_property;
314 static inline struct vc4_fkms_connector *
315 to_vc4_fkms_connector(struct drm_connector *connector)
317 return container_of(connector, struct vc4_fkms_connector, base);
320 /* VC4 FKMS connector state */
321 struct vc4_fkms_connector_state {
322 struct drm_connector_state base;
327 #define to_vc4_fkms_connector_state(x) \
328 container_of(x, struct vc4_fkms_connector_state, base)
330 static u32 vc4_get_display_type(u32 display_number)
332 const u32 display_types[] = {
333 /* The firmware display (DispmanX) IDs map to specific types in
336 DRM_MODE_ENCODER_DSI, /* MAIN_LCD - DSI or DPI */
337 DRM_MODE_ENCODER_DSI, /* AUX_LCD */
338 DRM_MODE_ENCODER_TMDS, /* HDMI0 */
339 DRM_MODE_ENCODER_TVDAC, /* VEC */
340 DRM_MODE_ENCODER_NONE, /* FORCE_LCD */
341 DRM_MODE_ENCODER_NONE, /* FORCE_TV */
342 DRM_MODE_ENCODER_NONE, /* FORCE_OTHER */
343 DRM_MODE_ENCODER_TMDS, /* HDMI1 */
344 DRM_MODE_ENCODER_NONE, /* FORCE_TV2 */
346 return display_number > ARRAY_SIZE(display_types) - 1 ?
347 DRM_MODE_ENCODER_NONE : display_types[display_number];
350 /* Firmware's structure for making an FB mbox call. */
352 u32 xres, yres, xres_virtual, yres_virtual;
354 u32 xoffset, yoffset;
360 struct vc4_fkms_plane {
361 struct drm_plane base;
362 struct fbinfo_s *fbinfo;
363 dma_addr_t fbinfo_bus_addr;
365 struct mailbox_set_plane mb;
368 static inline struct vc4_fkms_plane *to_vc4_fkms_plane(struct drm_plane *plane)
370 return (struct vc4_fkms_plane *)plane;
373 static int vc4_plane_set_blank(struct drm_plane *plane, bool blank)
375 struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
376 struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane);
377 struct mailbox_set_plane blank_mb = {
378 .tag = { RPI_FIRMWARE_SET_PLANE, sizeof(struct set_plane), 0 },
380 .display = vc4_plane->mb.plane.display,
381 .plane_id = vc4_plane->mb.plane.plane_id,
384 static const char * const plane_types[] = {
391 DRM_DEBUG_ATOMIC("[PLANE:%d:%s] %s plane %s",
392 plane->base.id, plane->name, plane_types[plane->type],
393 blank ? "blank" : "unblank");
396 ret = rpi_firmware_property_list(vc4->firmware, &blank_mb,
399 ret = rpi_firmware_property_list(vc4->firmware, &vc4_plane->mb,
400 sizeof(vc4_plane->mb));
402 WARN_ONCE(ret, "%s: firmware call failed. Please update your firmware",
407 static void vc4_fkms_crtc_get_margins(struct drm_crtc_state *state,
408 unsigned int *left, unsigned int *right,
409 unsigned int *top, unsigned int *bottom)
411 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
412 struct drm_connector_state *conn_state;
413 struct drm_connector *conn;
416 *left = vc4_state->margins.left;
417 *right = vc4_state->margins.right;
418 *top = vc4_state->margins.top;
419 *bottom = vc4_state->margins.bottom;
421 /* We have to interate over all new connector states because
422 * vc4_fkms_crtc_get_margins() might be called before
423 * vc4_fkms_crtc_atomic_check() which means margins info in
424 * vc4_crtc_state might be outdated.
426 for_each_new_connector_in_state(state->state, conn, conn_state, i) {
427 if (conn_state->crtc != state->crtc)
430 *left = conn_state->tv.margins.left;
431 *right = conn_state->tv.margins.right;
432 *top = conn_state->tv.margins.top;
433 *bottom = conn_state->tv.margins.bottom;
438 static int vc4_fkms_margins_adj(struct drm_plane_state *pstate,
439 struct set_plane *plane)
441 unsigned int left, right, top, bottom;
442 int adjhdisplay, adjvdisplay;
443 struct drm_crtc_state *crtc_state;
445 crtc_state = drm_atomic_get_new_crtc_state(pstate->state,
448 vc4_fkms_crtc_get_margins(crtc_state, &left, &right, &top, &bottom);
450 if (!left && !right && !top && !bottom)
453 if (left + right >= crtc_state->mode.hdisplay ||
454 top + bottom >= crtc_state->mode.vdisplay)
457 adjhdisplay = crtc_state->mode.hdisplay - (left + right);
458 plane->dst_x = DIV_ROUND_CLOSEST(plane->dst_x * adjhdisplay,
459 (int)crtc_state->mode.hdisplay);
460 plane->dst_x += left;
461 if (plane->dst_x > (int)(crtc_state->mode.hdisplay - right))
462 plane->dst_x = crtc_state->mode.hdisplay - right;
464 adjvdisplay = crtc_state->mode.vdisplay - (top + bottom);
465 plane->dst_y = DIV_ROUND_CLOSEST(plane->dst_y * adjvdisplay,
466 (int)crtc_state->mode.vdisplay);
468 if (plane->dst_y > (int)(crtc_state->mode.vdisplay - bottom))
469 plane->dst_y = crtc_state->mode.vdisplay - bottom;
471 plane->dst_w = DIV_ROUND_CLOSEST(plane->dst_w * adjhdisplay,
472 crtc_state->mode.hdisplay);
473 plane->dst_h = DIV_ROUND_CLOSEST(plane->dst_h * adjvdisplay,
474 crtc_state->mode.vdisplay);
476 if (!plane->dst_w || !plane->dst_h)
482 static void vc4_plane_atomic_update(struct drm_plane *plane,
483 struct drm_atomic_state *old_state)
485 struct drm_plane_state *state = plane->state;
488 * Do NOT set now, as we haven't checked if the crtc is active or not.
489 * Set from vc4_plane_set_blank instead.
491 * If the CRTC is on (or going to be on) and we're enabled,
492 * then unblank. Otherwise, stay blank until CRTC enable.
494 if (state->crtc->state->active)
495 vc4_plane_set_blank(plane, false);
498 static void vc4_plane_atomic_disable(struct drm_plane *plane,
499 struct drm_atomic_state *old_state)
501 struct drm_plane_state *state = plane->state;
502 struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane);
504 DRM_DEBUG_ATOMIC("[PLANE:%d:%s] plane disable %dx%d@%d +%d,%d\n",
505 plane->base.id, plane->name,
508 vc4_plane->mb.plane.vc_image_type,
511 vc4_plane_set_blank(plane, true);
514 static bool plane_enabled(struct drm_plane_state *state)
516 return state->fb && state->crtc;
519 static int vc4_plane_to_mb(struct drm_plane *plane,
520 struct mailbox_set_plane *mb,
521 struct drm_plane_state *state)
523 struct drm_framebuffer *fb = state->fb;
524 struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
525 const struct drm_format_info *drm_fmt = fb->format;
526 const struct vc_image_format *vc_fmt =
527 vc4_get_vc_image_fmt(drm_fmt->format);
528 int num_planes = fb->format->num_planes;
529 unsigned int rotation;
531 mb->plane.vc_image_type = vc_fmt->vc_image;
532 mb->plane.width = fb->width;
533 mb->plane.height = fb->height;
534 mb->plane.pitch = fb->pitches[0];
535 mb->plane.src_w = state->src_w;
536 mb->plane.src_h = state->src_h;
537 mb->plane.src_x = state->src_x;
538 mb->plane.src_y = state->src_y;
539 mb->plane.dst_w = state->crtc_w;
540 mb->plane.dst_h = state->crtc_h;
541 mb->plane.dst_x = state->crtc_x;
542 mb->plane.dst_y = state->crtc_y;
543 mb->plane.alpha = state->alpha >> 8;
544 mb->plane.layer = state->normalized_zpos ?
545 state->normalized_zpos : -127;
546 mb->plane.num_planes = num_planes;
547 mb->plane.is_vu = vc_fmt->is_vu;
548 mb->plane.planes[0] = bo->paddr + fb->offsets[0];
550 rotation = drm_rotation_simplify(state->rotation,
555 mb->plane.transform = TRANSFORM_NO_ROTATE;
556 if (rotation & DRM_MODE_REFLECT_X)
557 mb->plane.transform |= TRANSFORM_FLIP_HRIZ;
558 if (rotation & DRM_MODE_REFLECT_Y)
559 mb->plane.transform |= TRANSFORM_FLIP_VERT;
561 vc4_fkms_margins_adj(state, &mb->plane);
563 if (num_planes > 1) {
564 /* Assume this must be YUV */
565 /* Makes assumptions on the stride for the chroma planes as we
566 * can't easily plumb in non-standard pitches.
568 mb->plane.planes[1] = bo->paddr + fb->offsets[1];
570 mb->plane.planes[2] = bo->paddr + fb->offsets[2];
572 mb->plane.planes[2] = 0;
574 /* Special case the YUV420 with U and V as line interleaved
575 * planes as we have special handling for that case.
577 if (num_planes == 3 &&
578 (fb->offsets[2] - fb->offsets[1]) == fb->pitches[1])
579 mb->plane.vc_image_type = VC_IMAGE_YUV420_S;
581 switch (state->color_encoding) {
583 case DRM_COLOR_YCBCR_BT601:
584 if (state->color_range == DRM_COLOR_YCBCR_LIMITED_RANGE)
585 mb->plane.color_encoding =
586 VC_IMAGE_YUVINFO_CSC_ITUR_BT601;
588 mb->plane.color_encoding =
589 VC_IMAGE_YUVINFO_CSC_JPEG_JFIF;
591 case DRM_COLOR_YCBCR_BT709:
592 /* Currently no support for a full range BT709 */
593 mb->plane.color_encoding =
594 VC_IMAGE_YUVINFO_CSC_ITUR_BT709;
596 case DRM_COLOR_YCBCR_BT2020:
597 /* Currently no support for a full range BT2020 */
598 mb->plane.color_encoding =
599 VC_IMAGE_YUVINFO_CSC_REC_2020;
603 mb->plane.planes[1] = 0;
604 mb->plane.planes[2] = 0;
606 mb->plane.planes[3] = 0;
608 switch (fourcc_mod_broadcom_mod(fb->modifier)) {
609 case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED:
610 switch (mb->plane.vc_image_type) {
611 case VC_IMAGE_XRGB8888:
612 mb->plane.vc_image_type = VC_IMAGE_TF_RGBX32;
614 case VC_IMAGE_ARGB8888:
615 mb->plane.vc_image_type = VC_IMAGE_TF_RGBA32;
617 case VC_IMAGE_RGB565:
618 mb->plane.vc_image_type = VC_IMAGE_TF_RGB565;
622 case DRM_FORMAT_MOD_BROADCOM_SAND128:
623 switch (mb->plane.vc_image_type) {
624 case VC_IMAGE_YUV420SP:
625 mb->plane.vc_image_type = VC_IMAGE_YUV_UV;
627 /* VC_IMAGE_YUV10COL could be included in here, but it is only
628 * valid as a SAND128 format, so the table at the top will have
629 * already set the correct format.
632 /* Note that the column pitch is passed across in lines, not
635 mb->plane.pitch = fourcc_mod_broadcom_param(fb->modifier);
639 DRM_DEBUG_ATOMIC("[PLANE:%d:%s] plane update %dx%d@%d +dst(%d,%d, %d,%d) +src(%d,%d, %d,%d) 0x%08x/%08x/%08x/%d, alpha %u zpos %u\n",
640 plane->base.id, plane->name,
643 mb->plane.vc_image_type,
657 state->normalized_zpos);
662 static int vc4_plane_atomic_check(struct drm_plane *plane,
663 struct drm_atomic_state *state)
665 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
667 struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane);
669 if (!plane_enabled(new_plane_state))
672 return vc4_plane_to_mb(plane, &vc4_plane->mb, new_plane_state);
675 /* Called during init to allocate the plane's atomic state. */
676 static void vc4_plane_reset(struct drm_plane *plane)
678 struct vc4_plane_state *vc4_state;
680 WARN_ON(plane->state);
682 vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
686 __drm_atomic_helper_plane_reset(plane, &vc4_state->base);
689 static void vc4_plane_destroy(struct drm_plane *plane)
691 drm_plane_cleanup(plane);
694 static bool vc4_fkms_format_mod_supported(struct drm_plane *plane,
698 /* Support T_TILING for RGB formats only. */
700 case DRM_FORMAT_XRGB8888:
701 case DRM_FORMAT_ARGB8888:
702 case DRM_FORMAT_RGB565:
704 case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED:
705 case DRM_FORMAT_MOD_LINEAR:
710 case DRM_FORMAT_NV12:
711 switch (fourcc_mod_broadcom_mod(modifier)) {
712 case DRM_FORMAT_MOD_LINEAR:
713 case DRM_FORMAT_MOD_BROADCOM_SAND128:
718 case DRM_FORMAT_P030:
719 switch (fourcc_mod_broadcom_mod(modifier)) {
720 case DRM_FORMAT_MOD_BROADCOM_SAND128:
725 case DRM_FORMAT_NV21:
726 case DRM_FORMAT_RGB888:
727 case DRM_FORMAT_BGR888:
728 case DRM_FORMAT_YUV422:
729 case DRM_FORMAT_YUV420:
730 case DRM_FORMAT_YVU420:
732 return (modifier == DRM_FORMAT_MOD_LINEAR);
736 static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane)
738 struct vc4_plane_state *vc4_state;
740 if (WARN_ON(!plane->state))
743 vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
747 __drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base);
749 return &vc4_state->base;
752 static const struct drm_plane_funcs vc4_plane_funcs = {
753 .update_plane = drm_atomic_helper_update_plane,
754 .disable_plane = drm_atomic_helper_disable_plane,
755 .destroy = vc4_plane_destroy,
756 .set_property = NULL,
757 .reset = vc4_plane_reset,
758 .atomic_duplicate_state = vc4_plane_duplicate_state,
759 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
760 .format_mod_supported = vc4_fkms_format_mod_supported,
763 static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = {
764 .prepare_fb = drm_gem_plane_helper_prepare_fb,
766 .atomic_check = vc4_plane_atomic_check,
767 .atomic_update = vc4_plane_atomic_update,
768 .atomic_disable = vc4_plane_atomic_disable,
771 static struct drm_plane *vc4_fkms_plane_init(struct drm_device *dev,
772 enum drm_plane_type type,
776 struct drm_plane *plane = NULL;
777 struct vc4_fkms_plane *vc4_plane;
778 u32 formats[ARRAY_SIZE(vc_image_formats)];
779 unsigned int default_zpos = 0;
782 static const uint64_t modifiers[] = {
783 DRM_FORMAT_MOD_LINEAR,
784 /* VC4_T_TILED should come after linear, because we
785 * would prefer to scan out linear (less bus traffic).
787 DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED,
788 DRM_FORMAT_MOD_BROADCOM_SAND128,
789 DRM_FORMAT_MOD_INVALID,
793 vc4_plane = devm_kzalloc(dev->dev, sizeof(*vc4_plane),
800 for (i = 0; i < ARRAY_SIZE(vc_image_formats); i++)
801 formats[num_formats++] = vc_image_formats[i].drm;
803 plane = &vc4_plane->base;
804 ret = drm_universal_plane_init(dev, plane, 0,
806 formats, num_formats, modifiers,
809 /* FIXME: Do we need to be checking return values from all these calls?
811 drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
813 drm_plane_create_alpha_property(plane);
814 drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,
816 DRM_MODE_ROTATE_180 |
819 drm_plane_create_color_properties(plane,
820 BIT(DRM_COLOR_YCBCR_BT601) |
821 BIT(DRM_COLOR_YCBCR_BT709) |
822 BIT(DRM_COLOR_YCBCR_BT2020),
823 BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
824 BIT(DRM_COLOR_YCBCR_FULL_RANGE),
825 DRM_COLOR_YCBCR_BT709,
826 DRM_COLOR_YCBCR_LIMITED_RANGE);
829 * Default frame buffer setup is with FB on -127, and raspistill etc
830 * tend to drop overlays on layer 2. Cursor plane was on layer +127.
832 * For F-KMS the mailbox call allows for a s8.
833 * Remap zpos 0 to -127 for the background layer, but leave all the
834 * other layers as requested by KMS.
838 case DRM_PLANE_TYPE_PRIMARY:
841 case DRM_PLANE_TYPE_OVERLAY:
844 case DRM_PLANE_TYPE_CURSOR:
848 drm_plane_create_zpos_property(plane, default_zpos, 0, 127);
850 /* Prepare the static elements of the mailbox structure */
851 vc4_plane->mb.tag.tag = RPI_FIRMWARE_SET_PLANE;
852 vc4_plane->mb.tag.buf_size = sizeof(struct set_plane);
853 vc4_plane->mb.tag.req_resp_size = 0;
854 vc4_plane->mb.plane.display = display_num;
855 vc4_plane->mb.plane.plane_id = plane_id;
856 vc4_plane->mb.plane.layer = default_zpos ? default_zpos : -127;
861 vc4_plane_destroy(plane);
866 static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
868 struct drm_device *dev = crtc->dev;
869 struct vc4_dev *vc4 = to_vc4_dev(dev);
870 struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
871 struct drm_display_mode *mode = &crtc->state->adjusted_mode;
872 struct vc4_fkms_encoder *vc4_encoder =
873 to_vc4_fkms_encoder(vc4_crtc->encoder);
874 struct mailbox_set_mode mb = {
875 .tag1 = { RPI_FIRMWARE_SET_TIMING,
876 sizeof(struct set_timings), 0},
878 union hdmi_infoframe frame;
881 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, vc4_crtc->connector, mode);
883 DRM_ERROR("couldn't fill AVI infoframe\n");
887 DRM_DEBUG_KMS("Setting mode for display num %u mode name %s, clk %d, h(disp %d, start %d, end %d, total %d, skew %d) v(disp %d, start %d, end %d, total %d, scan %d), vrefresh %d, par %u, flags 0x%04x\n",
888 vc4_crtc->display_number, mode->name, mode->clock,
889 mode->hdisplay, mode->hsync_start, mode->hsync_end,
890 mode->htotal, mode->hskew, mode->vdisplay,
891 mode->vsync_start, mode->vsync_end, mode->vtotal,
892 mode->vscan, drm_mode_vrefresh(mode),
893 mode->picture_aspect_ratio, mode->flags);
894 mb.timings.display = vc4_crtc->display_number;
896 mb.timings.clock = mode->clock;
897 mb.timings.hdisplay = mode->hdisplay;
898 mb.timings.hsync_start = mode->hsync_start;
899 mb.timings.hsync_end = mode->hsync_end;
900 mb.timings.htotal = mode->htotal;
901 mb.timings.hskew = mode->hskew;
902 mb.timings.vdisplay = mode->vdisplay;
903 mb.timings.vsync_start = mode->vsync_start;
904 mb.timings.vsync_end = mode->vsync_end;
905 mb.timings.vtotal = mode->vtotal;
906 mb.timings.vscan = mode->vscan;
907 mb.timings.vrefresh = drm_mode_vrefresh(mode);
908 mb.timings.flags = 0;
909 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
910 mb.timings.flags |= TIMINGS_FLAGS_H_SYNC_POS;
911 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
912 mb.timings.flags |= TIMINGS_FLAGS_V_SYNC_POS;
914 switch (frame.avi.picture_aspect) {
916 case HDMI_PICTURE_ASPECT_NONE:
917 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_NONE;
919 case HDMI_PICTURE_ASPECT_4_3:
920 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_4_3;
922 case HDMI_PICTURE_ASPECT_16_9:
923 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_16_9;
925 case HDMI_PICTURE_ASPECT_64_27:
926 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_64_27;
928 case HDMI_PICTURE_ASPECT_256_135:
929 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_256_135;
933 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
934 mb.timings.flags |= TIMINGS_FLAGS_INTERLACE;
935 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
936 mb.timings.flags |= TIMINGS_FLAGS_DBL_CLK;
938 mb.timings.video_id_code = frame.avi.video_code;
940 if (!vc4_encoder->hdmi_monitor) {
941 mb.timings.flags |= TIMINGS_FLAGS_DVI;
943 struct vc4_fkms_connector_state *conn_state =
944 to_vc4_fkms_connector_state(vc4_crtc->connector->state);
946 if (conn_state->broadcast_rgb == VC4_BROADCAST_RGB_AUTO) {
947 /* See CEA-861-E - 5.1 Default Encoding Parameters */
948 if (drm_default_rgb_quant_range(mode) ==
949 HDMI_QUANTIZATION_RANGE_LIMITED)
950 mb.timings.flags |= TIMINGS_FLAGS_RGB_LIMITED;
952 if (conn_state->broadcast_rgb ==
953 VC4_BROADCAST_RGB_LIMITED)
954 mb.timings.flags |= TIMINGS_FLAGS_RGB_LIMITED;
956 /* If not using the default range, then do not provide
957 * a VIC as the HDMI spec requires that we do not
958 * signal the opposite of the defined range in the AVI
961 if (!!(mb.timings.flags & TIMINGS_FLAGS_RGB_LIMITED) !=
962 (drm_default_rgb_quant_range(mode) ==
963 HDMI_QUANTIZATION_RANGE_LIMITED))
964 mb.timings.video_id_code = 0;
969 * FIXME: To implement
970 * switch(mode->flag & DRM_MODE_FLAG_3D_MASK) {
971 * case DRM_MODE_FLAG_3D_NONE:
972 * case DRM_MODE_FLAG_3D_FRAME_PACKING:
973 * case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
974 * case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
975 * case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
976 * case DRM_MODE_FLAG_3D_L_DEPTH:
977 * case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
978 * case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
979 * case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
983 ret = rpi_firmware_property_list(vc4->firmware, &mb, sizeof(mb));
986 static void vc4_crtc_disable(struct drm_crtc *crtc,
987 struct drm_atomic_state *state)
989 struct drm_device *dev = crtc->dev;
990 struct drm_plane *plane;
992 DRM_DEBUG_KMS("[CRTC:%d] vblanks off.\n",
994 drm_crtc_vblank_off(crtc);
996 /* Always turn the planes off on CRTC disable. In DRM, planes
997 * are enabled/disabled through the update/disable hooks
998 * above, and the CRTC enable/disable independently controls
999 * whether anything scans out at all, but the firmware doesn't
1000 * give us a CRTC-level control for that.
1003 drm_atomic_crtc_for_each_plane(plane, crtc)
1004 vc4_plane_atomic_disable(plane, state);
1007 * Make sure we issue a vblank event after disabling the CRTC if
1008 * someone was waiting it.
1010 if (crtc->state->event) {
1011 unsigned long flags;
1013 spin_lock_irqsave(&dev->event_lock, flags);
1014 drm_crtc_send_vblank_event(crtc, crtc->state->event);
1015 crtc->state->event = NULL;
1016 spin_unlock_irqrestore(&dev->event_lock, flags);
1020 static void vc4_crtc_consume_event(struct drm_crtc *crtc)
1022 struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
1023 struct drm_device *dev = crtc->dev;
1024 unsigned long flags;
1026 if (!crtc->state->event)
1029 crtc->state->event->pipe = drm_crtc_index(crtc);
1031 WARN_ON(drm_crtc_vblank_get(crtc) != 0);
1033 spin_lock_irqsave(&dev->event_lock, flags);
1034 vc4_crtc->event = crtc->state->event;
1035 crtc->state->event = NULL;
1036 spin_unlock_irqrestore(&dev->event_lock, flags);
1039 static void vc4_crtc_enable(struct drm_crtc *crtc,
1040 struct drm_atomic_state *state)
1042 struct drm_plane *plane;
1044 DRM_DEBUG_KMS("[CRTC:%d] vblanks on.\n",
1046 drm_crtc_vblank_on(crtc);
1047 vc4_crtc_consume_event(crtc);
1049 /* Unblank the planes (if they're supposed to be displayed). */
1050 drm_atomic_crtc_for_each_plane(plane, crtc)
1051 if (plane->state->fb)
1052 vc4_plane_set_blank(plane, plane->state->visible);
1055 static enum drm_mode_status
1056 vc4_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
1058 struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
1059 struct drm_device *dev = crtc->dev;
1060 struct vc4_dev *vc4 = to_vc4_dev(dev);
1061 struct vc4_fkms *fkms = vc4->fkms;
1063 /* Do not allow doublescan modes from user space */
1064 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
1065 DRM_DEBUG_KMS("[CRTC:%d] Doublescan mode rejected.\n",
1067 return MODE_NO_DBLESCAN;
1070 /* Disable refresh rates > defined threshold (default 85Hz) as limited
1073 if (drm_mode_vrefresh(mode) > fkms_max_refresh_rate)
1074 return MODE_BAD_VVALUE;
1076 /* Limit the pixel clock based on the HDMI clock limits from the
1079 switch (vc4_crtc->display_number) {
1081 if (fkms->cfg.max_pixel_clock[0] &&
1082 mode->clock > fkms->cfg.max_pixel_clock[0])
1083 return MODE_CLOCK_HIGH;
1086 if (fkms->cfg.max_pixel_clock[1] &&
1087 mode->clock > fkms->cfg.max_pixel_clock[1])
1088 return MODE_CLOCK_HIGH;
1092 /* Pi4 can't generate odd horizontal timings on HDMI, so reject modes
1093 * that would set them.
1095 if (fkms->bcm2711 &&
1096 (vc4_crtc->display_number == 2 || vc4_crtc->display_number == 7) &&
1097 !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
1098 ((mode->hdisplay | /* active */
1099 (mode->hsync_start - mode->hdisplay) | /* front porch */
1100 (mode->hsync_end - mode->hsync_start) | /* sync pulse */
1101 (mode->htotal - mode->hsync_end)) & 1)) /* back porch */ {
1102 DRM_DEBUG_KMS("[CRTC:%d] Odd timing rejected %u %u %u %u.\n",
1103 crtc->base.id, mode->hdisplay, mode->hsync_start,
1104 mode->hsync_end, mode->htotal);
1105 return MODE_H_ILLEGAL;
1111 static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
1112 struct drm_atomic_state *state)
1114 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
1116 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
1117 struct drm_connector *conn;
1118 struct drm_connector_state *conn_state;
1121 DRM_DEBUG_KMS("[CRTC:%d] crtc_atomic_check.\n", crtc->base.id);
1123 for_each_new_connector_in_state(crtc_state->state, conn, conn_state, i) {
1124 if (conn_state->crtc != crtc)
1127 vc4_state->margins.left = conn_state->tv.margins.left;
1128 vc4_state->margins.right = conn_state->tv.margins.right;
1129 vc4_state->margins.top = conn_state->tv.margins.top;
1130 vc4_state->margins.bottom = conn_state->tv.margins.bottom;
1136 static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
1137 struct drm_atomic_state *state)
1139 struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
1142 DRM_DEBUG_KMS("[CRTC:%d] crtc_atomic_flush.\n",
1144 if (crtc->state->active && old_state->active && crtc->state->event)
1145 vc4_crtc_consume_event(crtc);
1148 static void vc4_crtc_handle_page_flip(struct vc4_crtc *vc4_crtc)
1150 struct drm_crtc *crtc = &vc4_crtc->base;
1151 struct drm_device *dev = crtc->dev;
1152 unsigned long flags;
1154 spin_lock_irqsave(&dev->event_lock, flags);
1155 if (vc4_crtc->event) {
1156 drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
1157 vc4_crtc->event = NULL;
1158 drm_crtc_vblank_put(crtc);
1160 spin_unlock_irqrestore(&dev->event_lock, flags);
1163 static irqreturn_t vc4_crtc_irq_handler(int irq, void *data)
1165 struct vc4_crtc **crtc_list = data;
1167 u32 stat = readl(crtc_list[0]->regs + SMICS);
1168 irqreturn_t ret = IRQ_NONE;
1171 if (stat & SMICS_INTERRUPTS) {
1172 writel(0, crtc_list[0]->regs + SMICS);
1174 chan = readl(crtc_list[0]->regs + SMIDSW0);
1176 if ((chan & 0xFFFF0000) != SMI_NEW) {
1177 /* Older firmware. Treat the one interrupt as vblank/
1178 * complete for all crtcs.
1180 for (i = 0; crtc_list[i]; i++) {
1181 if (crtc_list[i]->vblank_enabled)
1182 drm_crtc_handle_vblank(&crtc_list[i]->base);
1183 vc4_crtc_handle_page_flip(crtc_list[i]);
1187 writel(SMI_NEW, crtc_list[0]->regs + SMIDSW0);
1188 if (crtc_list[0]->vblank_enabled)
1189 drm_crtc_handle_vblank(&crtc_list[0]->base);
1190 vc4_crtc_handle_page_flip(crtc_list[0]);
1194 /* Check for the secondary display too */
1195 chan = readl(crtc_list[0]->regs + SMIDSW1);
1198 writel(SMI_NEW, crtc_list[0]->regs + SMIDSW1);
1200 if (crtc_list[1]->vblank_enabled)
1201 drm_crtc_handle_vblank(&crtc_list[1]->base);
1202 vc4_crtc_handle_page_flip(crtc_list[1]);
1213 static int vc4_fkms_page_flip(struct drm_crtc *crtc,
1214 struct drm_framebuffer *fb,
1215 struct drm_pending_vblank_event *event,
1217 struct drm_modeset_acquire_ctx *ctx)
1219 if (flags & DRM_MODE_PAGE_FLIP_ASYNC) {
1220 DRM_ERROR("Async flips aren't allowed\n");
1224 return drm_atomic_helper_page_flip(crtc, fb, event, flags, ctx);
1227 static struct drm_crtc_state *
1228 vc4_fkms_crtc_duplicate_state(struct drm_crtc *crtc)
1230 struct vc4_crtc_state *vc4_state, *old_vc4_state;
1232 vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
1236 old_vc4_state = to_vc4_crtc_state(crtc->state);
1237 vc4_state->margins = old_vc4_state->margins;
1239 __drm_atomic_helper_crtc_duplicate_state(crtc, &vc4_state->base);
1240 return &vc4_state->base;
1244 vc4_fkms_crtc_reset(struct drm_crtc *crtc)
1247 __drm_atomic_helper_crtc_destroy_state(crtc->state);
1249 crtc->state = kzalloc(sizeof(*crtc->state), GFP_KERNEL);
1251 crtc->state->crtc = crtc;
1254 static int vc4_fkms_enable_vblank(struct drm_crtc *crtc)
1256 struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
1258 DRM_DEBUG_KMS("[CRTC:%d] enable_vblank.\n",
1260 vc4_crtc->vblank_enabled = true;
1265 static void vc4_fkms_disable_vblank(struct drm_crtc *crtc)
1267 struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
1269 DRM_DEBUG_KMS("[CRTC:%d] disable_vblank.\n",
1271 vc4_crtc->vblank_enabled = false;
1274 static const struct drm_crtc_funcs vc4_crtc_funcs = {
1275 .set_config = drm_atomic_helper_set_config,
1276 .destroy = drm_crtc_cleanup,
1277 .page_flip = vc4_fkms_page_flip,
1278 .set_property = NULL,
1279 .cursor_set = NULL, /* handled by drm_mode_cursor_universal */
1280 .cursor_move = NULL, /* handled by drm_mode_cursor_universal */
1281 .reset = vc4_fkms_crtc_reset,
1282 .atomic_duplicate_state = vc4_fkms_crtc_duplicate_state,
1283 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
1284 .enable_vblank = vc4_fkms_enable_vblank,
1285 .disable_vblank = vc4_fkms_disable_vblank,
1288 static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
1289 .mode_set_nofb = vc4_crtc_mode_set_nofb,
1290 .mode_valid = vc4_crtc_mode_valid,
1291 .atomic_check = vc4_crtc_atomic_check,
1292 .atomic_flush = vc4_crtc_atomic_flush,
1293 .atomic_enable = vc4_crtc_enable,
1294 .atomic_disable = vc4_crtc_disable,
1297 static const struct of_device_id vc4_firmware_kms_dt_match[] = {
1298 { .compatible = "raspberrypi,rpi-firmware-kms" },
1299 { .compatible = "raspberrypi,rpi-firmware-kms-2711",
1300 .data = (void *)1 },
1304 static enum drm_connector_status
1305 vc4_fkms_connector_detect(struct drm_connector *connector, bool force)
1307 DRM_DEBUG_KMS("connector detect.\n");
1308 return connector_status_connected;
1311 /* Queries the firmware to populate a drm_mode structure for this display */
1312 static int vc4_fkms_get_fw_mode(struct vc4_fkms_connector *fkms_connector,
1313 struct drm_display_mode *mode)
1315 struct vc4_dev *vc4 = fkms_connector->vc4_dev;
1316 struct set_timings timings = { 0 };
1319 timings.display = fkms_connector->display_number;
1321 ret = rpi_firmware_property(vc4->firmware,
1322 RPI_FIRMWARE_GET_DISPLAY_TIMING, &timings,
1324 if (ret || !timings.clock)
1325 /* No mode returned - abort */
1328 /* Equivalent to DRM_MODE macro. */
1329 memset(mode, 0, sizeof(*mode));
1330 strncpy(mode->name, "FIXED_MODE", sizeof(mode->name));
1332 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1333 mode->clock = timings.clock;
1334 mode->hdisplay = timings.hdisplay;
1335 mode->hsync_start = timings.hsync_start;
1336 mode->hsync_end = timings.hsync_end;
1337 mode->htotal = timings.htotal;
1339 mode->vdisplay = timings.vdisplay;
1340 mode->vsync_start = timings.vsync_start;
1341 mode->vsync_end = timings.vsync_end;
1342 mode->vtotal = timings.vtotal;
1343 mode->vscan = timings.vscan;
1345 if (timings.flags & TIMINGS_FLAGS_H_SYNC_POS)
1346 mode->flags |= DRM_MODE_FLAG_PHSYNC;
1348 mode->flags |= DRM_MODE_FLAG_NHSYNC;
1350 if (timings.flags & TIMINGS_FLAGS_V_SYNC_POS)
1351 mode->flags |= DRM_MODE_FLAG_PVSYNC;
1353 mode->flags |= DRM_MODE_FLAG_NVSYNC;
1355 if (timings.flags & TIMINGS_FLAGS_INTERLACE)
1356 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1361 static int vc4_fkms_get_edid_block(void *data, u8 *buf, unsigned int block,
1364 struct vc4_fkms_connector *fkms_connector =
1365 (struct vc4_fkms_connector *)data;
1366 struct vc4_dev *vc4 = fkms_connector->vc4_dev;
1367 struct mailbox_get_edid mb = {
1368 .tag1 = { RPI_FIRMWARE_GET_EDID_BLOCK_DISPLAY,
1371 .display_number = fkms_connector->display_number,
1375 ret = rpi_firmware_property_list(vc4->firmware, &mb, sizeof(mb));
1378 memcpy(buf, mb.edid, len);
1383 static int vc4_fkms_connector_get_modes(struct drm_connector *connector)
1385 struct vc4_fkms_connector *fkms_connector =
1386 to_vc4_fkms_connector(connector);
1387 struct drm_encoder *encoder = fkms_connector->encoder;
1388 struct vc4_fkms_encoder *vc4_encoder = to_vc4_fkms_encoder(encoder);
1389 struct drm_display_mode fw_mode;
1390 struct drm_display_mode *mode;
1394 if (!vc4_fkms_get_fw_mode(fkms_connector, &fw_mode)) {
1395 drm_mode_debug_printmodeline(&fw_mode);
1396 mode = drm_mode_duplicate(connector->dev,
1398 drm_mode_probed_add(connector, mode);
1399 num_modes = 1; /* 1 mode */
1401 edid = drm_do_get_edid(connector, vc4_fkms_get_edid_block,
1404 /* FIXME: Can we do CEC?
1405 * cec_s_phys_addr_from_edid(vc4->hdmi->cec_adap, edid);
1410 vc4_encoder->hdmi_monitor = drm_detect_hdmi_monitor(edid);
1412 drm_connector_update_edid_property(connector, edid);
1413 num_modes = drm_add_edid_modes(connector, edid);
1420 /* This is the DSI panel resolution. Use this as a default should the firmware
1421 * not respond to our request for the timings.
1423 static const struct drm_display_mode lcd_mode = {
1424 DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1426 800, 800 + 1, 800 + 1 + 2, 800 + 1 + 2 + 46, 0,
1427 480, 480 + 7, 480 + 7 + 2, 480 + 7 + 2 + 21, 0,
1431 static int vc4_fkms_lcd_connector_get_modes(struct drm_connector *connector)
1433 struct vc4_fkms_connector *fkms_connector =
1434 to_vc4_fkms_connector(connector);
1435 struct drm_display_mode *mode;
1436 struct drm_display_mode fw_mode;
1438 if (!vc4_fkms_get_fw_mode(fkms_connector, &fw_mode) && fw_mode.clock)
1439 mode = drm_mode_duplicate(connector->dev,
1442 mode = drm_mode_duplicate(connector->dev,
1446 DRM_ERROR("Failed to create a new display mode\n");
1450 drm_mode_probed_add(connector, mode);
1452 /* We have one mode */
1456 static struct drm_encoder *
1457 vc4_fkms_connector_best_encoder(struct drm_connector *connector)
1459 struct vc4_fkms_connector *fkms_connector =
1460 to_vc4_fkms_connector(connector);
1461 DRM_DEBUG_KMS("best_connector.\n");
1462 return fkms_connector->encoder;
1465 static void vc4_fkms_connector_destroy(struct drm_connector *connector)
1467 DRM_DEBUG_KMS("[CONNECTOR:%d] destroy.\n",
1468 connector->base.id);
1469 drm_connector_unregister(connector);
1470 drm_connector_cleanup(connector);
1474 * vc4_connector_duplicate_state - duplicate connector state
1475 * @connector: digital connector
1477 * Allocates and returns a copy of the connector state (both common and
1478 * digital connector specific) for the specified connector.
1480 * Returns: The newly allocated connector state, or NULL on failure.
1482 struct drm_connector_state *
1483 vc4_connector_duplicate_state(struct drm_connector *connector)
1485 struct vc4_fkms_connector_state *state;
1487 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
1491 __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
1492 return &state->base;
1496 * vc4_connector_atomic_get_property - hook for connector->atomic_get_property.
1497 * @connector: Connector to get the property for.
1498 * @state: Connector state to retrieve the property from.
1499 * @property: Property to retrieve.
1500 * @val: Return value for the property.
1502 * Returns the atomic property value for a digital connector.
1504 int vc4_connector_atomic_get_property(struct drm_connector *connector,
1505 const struct drm_connector_state *state,
1506 struct drm_property *property,
1509 struct vc4_fkms_connector *fkms_connector =
1510 to_vc4_fkms_connector(connector);
1511 struct vc4_fkms_connector_state *vc4_conn_state =
1512 to_vc4_fkms_connector_state(state);
1514 if (property == fkms_connector->broadcast_rgb_property) {
1515 *val = vc4_conn_state->broadcast_rgb;
1517 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
1518 property->base.id, property->name);
1526 * vc4_connector_atomic_set_property - hook for connector->atomic_set_property.
1527 * @connector: Connector to set the property for.
1528 * @state: Connector state to set the property on.
1529 * @property: Property to set.
1530 * @val: New value for the property.
1532 * Sets the atomic property value for a digital connector.
1534 int vc4_connector_atomic_set_property(struct drm_connector *connector,
1535 struct drm_connector_state *state,
1536 struct drm_property *property,
1539 struct vc4_fkms_connector *fkms_connector =
1540 to_vc4_fkms_connector(connector);
1541 struct vc4_fkms_connector_state *vc4_conn_state =
1542 to_vc4_fkms_connector_state(state);
1544 if (property == fkms_connector->broadcast_rgb_property) {
1545 vc4_conn_state->broadcast_rgb = val;
1549 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
1550 property->base.id, property->name);
1554 int vc4_connector_atomic_check(struct drm_connector *connector,
1555 struct drm_atomic_state *state)
1557 struct drm_connector_state *old_state =
1558 drm_atomic_get_old_connector_state(state, connector);
1559 struct vc4_fkms_connector_state *vc4_old_state =
1560 to_vc4_fkms_connector_state(old_state);
1561 struct drm_connector_state *new_state =
1562 drm_atomic_get_new_connector_state(state, connector);
1563 struct vc4_fkms_connector_state *vc4_new_state =
1564 to_vc4_fkms_connector_state(new_state);
1565 struct drm_crtc *crtc = new_state->crtc;
1570 if (vc4_old_state->broadcast_rgb != vc4_new_state->broadcast_rgb) {
1571 struct drm_crtc_state *crtc_state;
1573 crtc_state = drm_atomic_get_crtc_state(state, crtc);
1574 if (IS_ERR(crtc_state))
1575 return PTR_ERR(crtc_state);
1577 crtc_state->mode_changed = true;
1582 static void vc4_hdmi_connector_reset(struct drm_connector *connector)
1584 drm_atomic_helper_connector_reset(connector);
1585 drm_atomic_helper_connector_tv_reset(connector);
1588 static const struct drm_connector_funcs vc4_fkms_connector_funcs = {
1589 .detect = vc4_fkms_connector_detect,
1590 .fill_modes = drm_helper_probe_single_connector_modes,
1591 .destroy = vc4_fkms_connector_destroy,
1592 .reset = vc4_hdmi_connector_reset,
1593 .atomic_duplicate_state = vc4_connector_duplicate_state,
1594 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1595 .atomic_get_property = vc4_connector_atomic_get_property,
1596 .atomic_set_property = vc4_connector_atomic_set_property,
1599 static const struct drm_connector_helper_funcs vc4_fkms_connector_helper_funcs = {
1600 .get_modes = vc4_fkms_connector_get_modes,
1601 .best_encoder = vc4_fkms_connector_best_encoder,
1602 .atomic_check = vc4_connector_atomic_check,
1605 static const struct drm_connector_helper_funcs vc4_fkms_lcd_conn_helper_funcs = {
1606 .get_modes = vc4_fkms_lcd_connector_get_modes,
1607 .best_encoder = vc4_fkms_connector_best_encoder,
1610 static const struct drm_prop_enum_list broadcast_rgb_names[] = {
1611 { VC4_BROADCAST_RGB_AUTO, "Automatic" },
1612 { VC4_BROADCAST_RGB_FULL, "Full" },
1613 { VC4_BROADCAST_RGB_LIMITED, "Limited 16:235" },
1617 vc4_attach_broadcast_rgb_property(struct vc4_fkms_connector *fkms_connector)
1619 struct drm_device *dev = fkms_connector->base.dev;
1620 struct drm_property *prop;
1622 prop = fkms_connector->broadcast_rgb_property;
1624 prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM,
1626 broadcast_rgb_names,
1627 ARRAY_SIZE(broadcast_rgb_names));
1631 fkms_connector->broadcast_rgb_property = prop;
1634 drm_object_attach_property(&fkms_connector->base.base, prop, 0);
1637 static struct drm_connector *
1638 vc4_fkms_connector_init(struct drm_device *dev, struct drm_encoder *encoder,
1641 struct drm_connector *connector = NULL;
1642 struct vc4_fkms_connector *fkms_connector;
1643 struct vc4_fkms_connector_state *conn_state = NULL;
1644 struct vc4_dev *vc4_dev = to_vc4_dev(dev);
1647 DRM_DEBUG_KMS("connector_init, display_num %u\n", display_num);
1649 fkms_connector = devm_kzalloc(dev->dev, sizeof(*fkms_connector),
1651 if (!fkms_connector)
1652 return ERR_PTR(-ENOMEM);
1655 * Allocate enough memory to hold vc4_fkms_connector_state,
1657 conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
1659 kfree(fkms_connector);
1660 return ERR_PTR(-ENOMEM);
1663 connector = &fkms_connector->base;
1665 fkms_connector->encoder = encoder;
1666 fkms_connector->display_number = display_num;
1667 fkms_connector->display_type = vc4_get_display_type(display_num);
1668 fkms_connector->vc4_dev = vc4_dev;
1670 __drm_atomic_helper_connector_reset(connector,
1673 if (fkms_connector->display_type == DRM_MODE_ENCODER_DSI) {
1674 drm_connector_init(dev, connector, &vc4_fkms_connector_funcs,
1675 DRM_MODE_CONNECTOR_DSI);
1676 drm_connector_helper_add(connector,
1677 &vc4_fkms_lcd_conn_helper_funcs);
1678 connector->interlace_allowed = 0;
1679 } else if (fkms_connector->display_type == DRM_MODE_ENCODER_TVDAC) {
1680 drm_connector_init(dev, connector, &vc4_fkms_connector_funcs,
1681 DRM_MODE_CONNECTOR_Composite);
1682 drm_connector_helper_add(connector,
1683 &vc4_fkms_lcd_conn_helper_funcs);
1684 connector->interlace_allowed = 1;
1686 drm_connector_init(dev, connector, &vc4_fkms_connector_funcs,
1687 DRM_MODE_CONNECTOR_HDMIA);
1688 drm_connector_helper_add(connector,
1689 &vc4_fkms_connector_helper_funcs);
1690 connector->interlace_allowed = 1;
1693 ret = drm_mode_create_tv_margin_properties(dev);
1697 drm_connector_attach_tv_margin_properties(connector);
1699 connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
1700 DRM_CONNECTOR_POLL_DISCONNECT);
1702 connector->doublescan_allowed = 0;
1704 vc4_attach_broadcast_rgb_property(fkms_connector);
1706 drm_connector_attach_encoder(connector, encoder);
1712 vc4_fkms_connector_destroy(connector);
1714 return ERR_PTR(ret);
1717 static void vc4_fkms_encoder_destroy(struct drm_encoder *encoder)
1719 DRM_DEBUG_KMS("Encoder_destroy\n");
1720 drm_encoder_cleanup(encoder);
1723 static const struct drm_encoder_funcs vc4_fkms_encoder_funcs = {
1724 .destroy = vc4_fkms_encoder_destroy,
1727 static void vc4_fkms_display_power(struct drm_encoder *encoder, bool power)
1729 struct vc4_fkms_encoder *vc4_encoder = to_vc4_fkms_encoder(encoder);
1730 struct vc4_dev *vc4 = to_vc4_dev(encoder->dev);
1732 struct mailbox_display_pwr pwr = {
1733 .tag1 = {RPI_FIRMWARE_SET_DISPLAY_POWER, 8, 0, },
1734 .display = vc4_encoder->display_num,
1735 .state = power ? 1 : 0,
1738 rpi_firmware_property_list(vc4->firmware, &pwr, sizeof(pwr));
1741 static void vc4_fkms_encoder_enable(struct drm_encoder *encoder)
1743 vc4_fkms_display_power(encoder, true);
1744 DRM_DEBUG_KMS("Encoder_enable\n");
1747 static void vc4_fkms_encoder_disable(struct drm_encoder *encoder)
1749 vc4_fkms_display_power(encoder, false);
1750 DRM_DEBUG_KMS("Encoder_disable\n");
1753 static const struct drm_encoder_helper_funcs vc4_fkms_encoder_helper_funcs = {
1754 .enable = vc4_fkms_encoder_enable,
1755 .disable = vc4_fkms_encoder_disable,
1758 static int vc4_fkms_create_screen(struct device *dev, struct drm_device *drm,
1759 int display_idx, int display_ref,
1760 struct vc4_crtc **ret_crtc)
1762 struct vc4_dev *vc4 = to_vc4_dev(drm);
1763 struct vc4_crtc *vc4_crtc;
1764 struct vc4_fkms_encoder *vc4_encoder;
1765 struct drm_crtc *crtc;
1766 struct drm_plane *destroy_plane, *temp;
1767 struct mailbox_blank_display blank = {
1768 .tag1 = {RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM, 4, 0, },
1769 .display = display_idx,
1770 .tag2 = { RPI_FIRMWARE_FRAMEBUFFER_BLANK, 4, 0, },
1773 struct drm_plane *planes[PLANES_PER_CRTC];
1776 vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL);
1779 crtc = &vc4_crtc->base;
1781 vc4_crtc->display_number = display_ref;
1782 vc4_crtc->display_type = vc4_get_display_type(display_ref);
1784 /* Blank the firmware provided framebuffer */
1785 rpi_firmware_property_list(vc4->firmware, &blank, sizeof(blank));
1787 for (i = 0; i < PLANES_PER_CRTC; i++) {
1788 planes[i] = vc4_fkms_plane_init(drm,
1790 DRM_PLANE_TYPE_PRIMARY :
1791 (i == PLANES_PER_CRTC - 1) ?
1792 DRM_PLANE_TYPE_CURSOR :
1793 DRM_PLANE_TYPE_OVERLAY,
1795 i + (display_idx * PLANES_PER_CRTC)
1797 if (IS_ERR(planes[i])) {
1798 dev_err(dev, "failed to construct plane %u\n", i);
1799 ret = PTR_ERR(planes[i]);
1804 drm_crtc_init_with_planes(drm, crtc, planes[0],
1805 planes[PLANES_PER_CRTC - 1], &vc4_crtc_funcs,
1807 drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs);
1809 /* Update the possible_crtcs mask for the overlay plane(s) */
1810 for (i = 1; i < (PLANES_PER_CRTC - 1); i++)
1811 planes[i]->possible_crtcs = drm_crtc_mask(crtc);
1813 vc4_encoder = devm_kzalloc(dev, sizeof(*vc4_encoder), GFP_KERNEL);
1816 vc4_crtc->encoder = &vc4_encoder->base;
1818 vc4_encoder->display_num = display_ref;
1819 vc4_encoder->base.possible_crtcs |= drm_crtc_mask(crtc);
1821 drm_encoder_init(drm, &vc4_encoder->base, &vc4_fkms_encoder_funcs,
1822 vc4_crtc->display_type, NULL);
1823 drm_encoder_helper_add(&vc4_encoder->base,
1824 &vc4_fkms_encoder_helper_funcs);
1826 vc4_crtc->connector = vc4_fkms_connector_init(drm, &vc4_encoder->base,
1828 if (IS_ERR(vc4_crtc->connector)) {
1829 ret = PTR_ERR(vc4_crtc->connector);
1830 goto err_destroy_encoder;
1833 *ret_crtc = vc4_crtc;
1837 err_destroy_encoder:
1838 vc4_fkms_encoder_destroy(vc4_crtc->encoder);
1839 list_for_each_entry_safe(destroy_plane, temp,
1840 &drm->mode_config.plane_list, head) {
1841 if (destroy_plane->possible_crtcs == 1 << drm_crtc_index(crtc))
1842 destroy_plane->funcs->destroy(destroy_plane);
1848 static int vc4_fkms_bind(struct device *dev, struct device *master, void *data)
1850 struct platform_device *pdev = to_platform_device(dev);
1851 struct drm_device *drm = dev_get_drvdata(master);
1852 struct vc4_dev *vc4 = to_vc4_dev(drm);
1853 struct device_node *firmware_node;
1854 const struct of_device_id *match;
1855 struct vc4_crtc **crtc_list;
1856 u32 num_displays, display_num;
1857 struct vc4_fkms *fkms;
1861 vc4->firmware_kms = true;
1863 fkms = devm_kzalloc(dev, sizeof(*fkms), GFP_KERNEL);
1867 match = of_match_device(vc4_firmware_kms_dt_match, dev);
1871 fkms->bcm2711 = true;
1873 firmware_node = of_parse_phandle(dev->of_node, "brcm,firmware", 0);
1874 vc4->firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node);
1875 if (!vc4->firmware) {
1876 DRM_DEBUG("Failed to get Raspberry Pi firmware reference.\n");
1877 return -EPROBE_DEFER;
1879 of_node_put(firmware_node);
1881 ret = rpi_firmware_property(vc4->firmware,
1882 RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS,
1883 &num_displays, sizeof(u32));
1885 /* If we fail to get the number of displays, then
1886 * assume old firmware that doesn't have the mailbox call, so just
1891 DRM_WARN("Unable to determine number of displays - assuming 1\n");
1895 ret = rpi_firmware_property(vc4->firmware,
1896 RPI_FIRMWARE_GET_DISPLAY_CFG,
1897 &fkms->cfg, sizeof(fkms->cfg));
1901 /* The firmware works in Hz. This will be compared against kHz, so div
1902 * 1000 now rather than multiple times later.
1904 fkms->cfg.max_pixel_clock[0] /= 1000;
1905 fkms->cfg.max_pixel_clock[1] /= 1000;
1907 /* Allocate a list, with space for a NULL on the end */
1908 crtc_list = devm_kzalloc(dev, sizeof(crtc_list) * (num_displays + 1),
1913 for (display_num = 0; display_num < num_displays; display_num++) {
1914 display_id = display_num;
1915 ret = rpi_firmware_property(vc4->firmware,
1916 RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_ID,
1917 &display_id, sizeof(display_id));
1918 /* FIXME: Determine the correct error handling here.
1919 * Should we fail to create the one "screen" but keep the
1920 * others, or fail the whole thing?
1923 DRM_ERROR("Failed to get display id %u\n", display_num);
1925 ret = vc4_fkms_create_screen(dev, drm, display_num, display_id,
1926 &crtc_list[display_num]);
1928 DRM_ERROR("Oh dear, failed to create display %u\n",
1932 if (num_displays > 0) {
1933 /* Map the SMI interrupt reg */
1934 crtc_list[0]->regs = vc4_ioremap_regs(pdev, 0);
1935 if (IS_ERR(crtc_list[0]->regs))
1936 DRM_ERROR("Oh dear, failed to map registers\n");
1938 writel(0, crtc_list[0]->regs + SMICS);
1939 ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
1940 vc4_crtc_irq_handler, 0,
1941 "vc4 firmware kms", crtc_list);
1943 DRM_ERROR("Oh dear, failed to register IRQ\n");
1945 DRM_WARN("No displays found. Consider forcing hotplug if HDMI is attached\n");
1950 platform_set_drvdata(pdev, crtc_list);
1955 static void vc4_fkms_unbind(struct device *dev, struct device *master,
1958 struct platform_device *pdev = to_platform_device(dev);
1959 struct vc4_crtc **crtc_list = dev_get_drvdata(dev);
1962 for (i = 0; crtc_list[i]; i++) {
1963 vc4_fkms_connector_destroy(crtc_list[i]->connector);
1964 vc4_fkms_encoder_destroy(crtc_list[i]->encoder);
1965 drm_crtc_cleanup(&crtc_list[i]->base);
1968 platform_set_drvdata(pdev, NULL);
1971 static const struct component_ops vc4_fkms_ops = {
1972 .bind = vc4_fkms_bind,
1973 .unbind = vc4_fkms_unbind,
1976 static int vc4_fkms_probe(struct platform_device *pdev)
1978 return component_add(&pdev->dev, &vc4_fkms_ops);
1981 static int vc4_fkms_remove(struct platform_device *pdev)
1983 component_del(&pdev->dev, &vc4_fkms_ops);
1987 struct platform_driver vc4_firmware_kms_driver = {
1988 .probe = vc4_fkms_probe,
1989 .remove = vc4_fkms_remove,
1991 .name = "vc4_firmware_kms",
1992 .of_match_table = vc4_firmware_kms_dt_match,