drm/vc4: Add firmware-kms mode
[platform/kernel/linux-rpi.git] / drivers / gpu / drm / vc4 / vc4_firmware_kms.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2016 Broadcom
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  */
9
10 /**
11  * DOC: VC4 firmware KMS module.
12  *
13  * As a hack to get us from the current closed source driver world
14  * toward a totally open stack, implement KMS on top of the Raspberry
15  * Pi's firmware display stack.
16  */
17
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_crtc_helper.h>
20 #include <drm/drm_drv.h>
21 #include <drm/drm_fb_cma_helper.h>
22 #include <drm/drm_fourcc.h>
23 #include <drm/drm_gem_atomic_helper.h>
24 #include <drm/drm_plane_helper.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_vblank.h>
27
28 #include <linux/component.h>
29 #include <linux/clk.h>
30 #include <linux/debugfs.h>
31 #include <linux/module.h>
32
33 #include <soc/bcm2835/raspberrypi-firmware.h>
34
35 #include "vc4_drv.h"
36 #include "vc4_regs.h"
37 #include "vc_image_types.h"
38
39 int fkms_max_refresh_rate = 85;
40 module_param(fkms_max_refresh_rate, int, 0644);
41 MODULE_PARM_DESC(fkms_max_refresh_rate, "Max supported refresh rate");
42
43 struct get_display_cfg {
44         u32  max_pixel_clock[2];  //Max pixel clock for each display
45 };
46
47 struct vc4_fkms {
48         struct get_display_cfg cfg;
49         bool bcm2711;
50 };
51
52 #define PLANES_PER_CRTC         8
53
54 struct set_plane {
55         u8 display;
56         u8 plane_id;
57         u8 vc_image_type;
58         s8 layer;
59
60         u16 width;
61         u16 height;
62
63         u16 pitch;
64         u16 vpitch;
65
66         u32 src_x;      /* 16p16 */
67         u32 src_y;      /* 16p16 */
68
69         u32 src_w;      /* 16p16 */
70         u32 src_h;      /* 16p16 */
71
72         s16 dst_x;
73         s16 dst_y;
74
75         u16 dst_w;
76         u16 dst_h;
77
78         u8 alpha;
79         u8 num_planes;
80         u8 is_vu;
81         u8 color_encoding;
82
83         u32 planes[4];  /* DMA address of each plane */
84
85         u32 transform;
86 };
87
88 /* Values for the transform field */
89 #define TRANSFORM_NO_ROTATE     0
90 #define TRANSFORM_ROTATE_180    BIT(1)
91 #define TRANSFORM_FLIP_HRIZ     BIT(16)
92 #define TRANSFORM_FLIP_VERT     BIT(17)
93
94 struct mailbox_set_plane {
95         struct rpi_firmware_property_tag_header tag;
96         struct set_plane plane;
97 };
98
99 struct mailbox_blank_display {
100         struct rpi_firmware_property_tag_header tag1;
101         u32 display;
102         struct rpi_firmware_property_tag_header tag2;
103         u32 blank;
104 };
105
106 struct mailbox_display_pwr {
107         struct rpi_firmware_property_tag_header tag1;
108         u32 display;
109         u32 state;
110 };
111
112 struct mailbox_get_edid {
113         struct rpi_firmware_property_tag_header tag1;
114         u32 block;
115         u32 display_number;
116         u8 edid[128];
117 };
118
119 struct set_timings {
120         u8 display;
121         u8 padding;
122         u16 video_id_code;
123
124         u32 clock;              /* in kHz */
125
126         u16 hdisplay;
127         u16 hsync_start;
128
129         u16 hsync_end;
130         u16 htotal;
131
132         u16 hskew;
133         u16 vdisplay;
134
135         u16 vsync_start;
136         u16 vsync_end;
137
138         u16 vtotal;
139         u16 vscan;
140
141         u16 vrefresh;
142         u16 padding2;
143
144         u32 flags;
145 #define  TIMINGS_FLAGS_H_SYNC_POS       BIT(0)
146 #define  TIMINGS_FLAGS_H_SYNC_NEG       0
147 #define  TIMINGS_FLAGS_V_SYNC_POS       BIT(1)
148 #define  TIMINGS_FLAGS_V_SYNC_NEG       0
149 #define  TIMINGS_FLAGS_INTERLACE        BIT(2)
150
151 #define TIMINGS_FLAGS_ASPECT_MASK       GENMASK(7, 4)
152 #define TIMINGS_FLAGS_ASPECT_NONE       (0 << 4)
153 #define TIMINGS_FLAGS_ASPECT_4_3        (1 << 4)
154 #define TIMINGS_FLAGS_ASPECT_16_9       (2 << 4)
155 #define TIMINGS_FLAGS_ASPECT_64_27      (3 << 4)
156 #define TIMINGS_FLAGS_ASPECT_256_135    (4 << 4)
157
158 /* Limited range RGB flag. Not set corresponds to full range. */
159 #define TIMINGS_FLAGS_RGB_LIMITED       BIT(8)
160 /* DVI monitor, therefore disable infoframes. Not set corresponds to HDMI. */
161 #define TIMINGS_FLAGS_DVI               BIT(9)
162 /* Double clock */
163 #define TIMINGS_FLAGS_DBL_CLK           BIT(10)
164 };
165
166 struct mailbox_set_mode {
167         struct rpi_firmware_property_tag_header tag1;
168         struct set_timings timings;
169 };
170
171 static const struct vc_image_format {
172         u32 drm;        /* DRM_FORMAT_* */
173         u32 vc_image;   /* VC_IMAGE_* */
174         u32 is_vu;
175 } vc_image_formats[] = {
176         {
177                 .drm = DRM_FORMAT_XRGB8888,
178                 .vc_image = VC_IMAGE_XRGB8888,
179         },
180         {
181                 .drm = DRM_FORMAT_ARGB8888,
182                 .vc_image = VC_IMAGE_ARGB8888,
183         },
184 /*
185  *      FIXME: Need to resolve which DRM format goes to which vc_image format
186  *      for the remaining RGBA and RGBX formats.
187  *      {
188  *              .drm = DRM_FORMAT_ABGR8888,
189  *              .vc_image = VC_IMAGE_RGBA8888,
190  *      },
191  *      {
192  *              .drm = DRM_FORMAT_XBGR8888,
193  *              .vc_image = VC_IMAGE_RGBA8888,
194  *      },
195  */
196         {
197                 .drm = DRM_FORMAT_RGB565,
198                 .vc_image = VC_IMAGE_RGB565,
199         },
200         {
201                 .drm = DRM_FORMAT_RGB888,
202                 .vc_image = VC_IMAGE_BGR888,
203         },
204         {
205                 .drm = DRM_FORMAT_BGR888,
206                 .vc_image = VC_IMAGE_RGB888,
207         },
208         {
209                 .drm = DRM_FORMAT_YUV422,
210                 .vc_image = VC_IMAGE_YUV422PLANAR,
211         },
212         {
213                 .drm = DRM_FORMAT_YUV420,
214                 .vc_image = VC_IMAGE_YUV420,
215         },
216         {
217                 .drm = DRM_FORMAT_YVU420,
218                 .vc_image = VC_IMAGE_YUV420,
219                 .is_vu = 1,
220         },
221         {
222                 .drm = DRM_FORMAT_NV12,
223                 .vc_image = VC_IMAGE_YUV420SP,
224         },
225         {
226                 .drm = DRM_FORMAT_NV21,
227                 .vc_image = VC_IMAGE_YUV420SP,
228                 .is_vu = 1,
229         },
230         {
231                 .drm = DRM_FORMAT_P030,
232                 .vc_image = VC_IMAGE_YUV10COL,
233         },
234 };
235
236 static const struct vc_image_format *vc4_get_vc_image_fmt(u32 drm_format)
237 {
238         unsigned int i;
239
240         for (i = 0; i < ARRAY_SIZE(vc_image_formats); i++) {
241                 if (vc_image_formats[i].drm == drm_format)
242                         return &vc_image_formats[i];
243         }
244
245         return NULL;
246 }
247
248 /* The firmware delivers a vblank interrupt to us through the SMI
249  * hardware, which has only this one register.
250  */
251 #define SMICS 0x0
252 #define SMIDSW0 0x14
253 #define SMIDSW1 0x1C
254 #define SMICS_INTERRUPTS (BIT(9) | BIT(10) | BIT(11))
255
256 /* Flag to denote that the firmware is giving multiple display callbacks */
257 #define SMI_NEW 0xabcd0000
258
259 #define vc4_crtc vc4_kms_crtc
260 #define to_vc4_crtc to_vc4_kms_crtc
261 struct vc4_crtc {
262         struct drm_crtc base;
263         struct drm_encoder *encoder;
264         struct drm_connector *connector;
265         void __iomem *regs;
266
267         struct drm_pending_vblank_event *event;
268         bool vblank_enabled;
269         u32 display_number;
270         u32 display_type;
271 };
272
273 static inline struct vc4_crtc *to_vc4_crtc(struct drm_crtc *crtc)
274 {
275         return container_of(crtc, struct vc4_crtc, base);
276 }
277
278 struct vc4_fkms_encoder {
279         struct drm_encoder base;
280         bool hdmi_monitor;
281         bool rgb_range_selectable;
282         int display_num;
283 };
284
285 static inline struct vc4_fkms_encoder *
286 to_vc4_fkms_encoder(struct drm_encoder *encoder)
287 {
288         return container_of(encoder, struct vc4_fkms_encoder, base);
289 }
290
291 /* "Broadcast RGB" property.
292  * Allows overriding of HDMI full or limited range RGB
293  */
294 #define VC4_BROADCAST_RGB_AUTO 0
295 #define VC4_BROADCAST_RGB_FULL 1
296 #define VC4_BROADCAST_RGB_LIMITED 2
297
298 /* VC4 FKMS connector KMS struct */
299 struct vc4_fkms_connector {
300         struct drm_connector base;
301
302         /* Since the connector is attached to just the one encoder,
303          * this is the reference to it so we can do the best_encoder()
304          * hook.
305          */
306         struct drm_encoder *encoder;
307         struct vc4_dev *vc4_dev;
308         u32 display_number;
309         u32 display_type;
310
311         struct drm_property *broadcast_rgb_property;
312 };
313
314 static inline struct vc4_fkms_connector *
315 to_vc4_fkms_connector(struct drm_connector *connector)
316 {
317         return container_of(connector, struct vc4_fkms_connector, base);
318 }
319
320 /* VC4 FKMS connector state */
321 struct vc4_fkms_connector_state {
322         struct drm_connector_state base;
323
324         int broadcast_rgb;
325 };
326
327 #define to_vc4_fkms_connector_state(x) \
328                         container_of(x, struct vc4_fkms_connector_state, base)
329
330 static u32 vc4_get_display_type(u32 display_number)
331 {
332         const u32 display_types[] = {
333                 /* The firmware display (DispmanX) IDs map to specific types in
334                  * a fixed manner.
335                  */
336                 DRM_MODE_ENCODER_DSI,   /* MAIN_LCD - DSI or DPI */
337                 DRM_MODE_ENCODER_DSI,   /* AUX_LCD */
338                 DRM_MODE_ENCODER_TMDS,  /* HDMI0 */
339                 DRM_MODE_ENCODER_TVDAC, /* VEC */
340                 DRM_MODE_ENCODER_NONE,  /* FORCE_LCD */
341                 DRM_MODE_ENCODER_NONE,  /* FORCE_TV */
342                 DRM_MODE_ENCODER_NONE,  /* FORCE_OTHER */
343                 DRM_MODE_ENCODER_TMDS,  /* HDMI1 */
344                 DRM_MODE_ENCODER_NONE,  /* FORCE_TV2 */
345         };
346         return display_number > ARRAY_SIZE(display_types) - 1 ?
347                         DRM_MODE_ENCODER_NONE : display_types[display_number];
348 }
349
350 /* Firmware's structure for making an FB mbox call. */
351 struct fbinfo_s {
352         u32 xres, yres, xres_virtual, yres_virtual;
353         u32 pitch, bpp;
354         u32 xoffset, yoffset;
355         u32 base;
356         u32 screen_size;
357         u16 cmap[256];
358 };
359
360 struct vc4_fkms_plane {
361         struct drm_plane base;
362         struct fbinfo_s *fbinfo;
363         dma_addr_t fbinfo_bus_addr;
364         u32 pitch;
365         struct mailbox_set_plane mb;
366 };
367
368 static inline struct vc4_fkms_plane *to_vc4_fkms_plane(struct drm_plane *plane)
369 {
370         return (struct vc4_fkms_plane *)plane;
371 }
372
373 static int vc4_plane_set_blank(struct drm_plane *plane, bool blank)
374 {
375         struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
376         struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane);
377         struct mailbox_set_plane blank_mb = {
378                 .tag = { RPI_FIRMWARE_SET_PLANE, sizeof(struct set_plane), 0 },
379                 .plane = {
380                         .display = vc4_plane->mb.plane.display,
381                         .plane_id = vc4_plane->mb.plane.plane_id,
382                 }
383         };
384         static const char * const plane_types[] = {
385                                                         "overlay",
386                                                         "primary",
387                                                         "cursor"
388                                                   };
389         int ret;
390
391         DRM_DEBUG_ATOMIC("[PLANE:%d:%s] %s plane %s",
392                          plane->base.id, plane->name, plane_types[plane->type],
393                          blank ? "blank" : "unblank");
394
395         if (blank)
396                 ret = rpi_firmware_property_list(vc4->firmware, &blank_mb,
397                                                  sizeof(blank_mb));
398         else
399                 ret = rpi_firmware_property_list(vc4->firmware, &vc4_plane->mb,
400                                                  sizeof(vc4_plane->mb));
401
402         WARN_ONCE(ret, "%s: firmware call failed. Please update your firmware",
403                   __func__);
404         return ret;
405 }
406
407 static void vc4_fkms_crtc_get_margins(struct drm_crtc_state *state,
408                                       unsigned int *left, unsigned int *right,
409                                       unsigned int *top, unsigned int *bottom)
410 {
411         struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
412         struct drm_connector_state *conn_state;
413         struct drm_connector *conn;
414         int i;
415
416         *left = vc4_state->margins.left;
417         *right = vc4_state->margins.right;
418         *top = vc4_state->margins.top;
419         *bottom = vc4_state->margins.bottom;
420
421         /* We have to interate over all new connector states because
422          * vc4_fkms_crtc_get_margins() might be called before
423          * vc4_fkms_crtc_atomic_check() which means margins info in
424          * vc4_crtc_state might be outdated.
425          */
426         for_each_new_connector_in_state(state->state, conn, conn_state, i) {
427                 if (conn_state->crtc != state->crtc)
428                         continue;
429
430                 *left = conn_state->tv.margins.left;
431                 *right = conn_state->tv.margins.right;
432                 *top = conn_state->tv.margins.top;
433                 *bottom = conn_state->tv.margins.bottom;
434                 break;
435         }
436 }
437
438 static int vc4_fkms_margins_adj(struct drm_plane_state *pstate,
439                                 struct set_plane *plane)
440 {
441         unsigned int left, right, top, bottom;
442         int adjhdisplay, adjvdisplay;
443         struct drm_crtc_state *crtc_state;
444
445         crtc_state = drm_atomic_get_new_crtc_state(pstate->state,
446                                                    pstate->crtc);
447
448         vc4_fkms_crtc_get_margins(crtc_state, &left, &right, &top, &bottom);
449
450         if (!left && !right && !top && !bottom)
451                 return 0;
452
453         if (left + right >= crtc_state->mode.hdisplay ||
454             top + bottom >= crtc_state->mode.vdisplay)
455                 return -EINVAL;
456
457         adjhdisplay = crtc_state->mode.hdisplay - (left + right);
458         plane->dst_x = DIV_ROUND_CLOSEST(plane->dst_x * adjhdisplay,
459                                          (int)crtc_state->mode.hdisplay);
460         plane->dst_x += left;
461         if (plane->dst_x > (int)(crtc_state->mode.hdisplay - right))
462                 plane->dst_x = crtc_state->mode.hdisplay - right;
463
464         adjvdisplay = crtc_state->mode.vdisplay - (top + bottom);
465         plane->dst_y = DIV_ROUND_CLOSEST(plane->dst_y * adjvdisplay,
466                                          (int)crtc_state->mode.vdisplay);
467         plane->dst_y += top;
468         if (plane->dst_y > (int)(crtc_state->mode.vdisplay - bottom))
469                 plane->dst_y = crtc_state->mode.vdisplay - bottom;
470
471         plane->dst_w = DIV_ROUND_CLOSEST(plane->dst_w * adjhdisplay,
472                                          crtc_state->mode.hdisplay);
473         plane->dst_h = DIV_ROUND_CLOSEST(plane->dst_h * adjvdisplay,
474                                          crtc_state->mode.vdisplay);
475
476         if (!plane->dst_w || !plane->dst_h)
477                 return -EINVAL;
478
479         return 0;
480 }
481
482 static void vc4_plane_atomic_update(struct drm_plane *plane,
483                                     struct drm_atomic_state *old_state)
484 {
485         struct drm_plane_state *state = plane->state;
486
487         /*
488          * Do NOT set now, as we haven't checked if the crtc is active or not.
489          * Set from vc4_plane_set_blank instead.
490          *
491          * If the CRTC is on (or going to be on) and we're enabled,
492          * then unblank.  Otherwise, stay blank until CRTC enable.
493          */
494         if (state->crtc->state->active)
495                 vc4_plane_set_blank(plane, false);
496 }
497
498 static void vc4_plane_atomic_disable(struct drm_plane *plane,
499                                      struct drm_atomic_state *old_state)
500 {
501         struct drm_plane_state *state = plane->state;
502         struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane);
503
504         DRM_DEBUG_ATOMIC("[PLANE:%d:%s] plane disable %dx%d@%d +%d,%d\n",
505                          plane->base.id, plane->name,
506                          state->crtc_w,
507                          state->crtc_h,
508                          vc4_plane->mb.plane.vc_image_type,
509                          state->crtc_x,
510                          state->crtc_y);
511         vc4_plane_set_blank(plane, true);
512 }
513
514 static bool plane_enabled(struct drm_plane_state *state)
515 {
516         return state->fb && state->crtc;
517 }
518
519 static int vc4_plane_to_mb(struct drm_plane *plane,
520                            struct mailbox_set_plane *mb,
521                            struct drm_plane_state *state)
522 {
523         struct drm_framebuffer *fb = state->fb;
524         struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
525         const struct drm_format_info *drm_fmt = fb->format;
526         const struct vc_image_format *vc_fmt =
527                                         vc4_get_vc_image_fmt(drm_fmt->format);
528         int num_planes = fb->format->num_planes;
529         unsigned int rotation;
530
531         mb->plane.vc_image_type = vc_fmt->vc_image;
532         mb->plane.width = fb->width;
533         mb->plane.height = fb->height;
534         mb->plane.pitch = fb->pitches[0];
535         mb->plane.src_w = state->src_w;
536         mb->plane.src_h = state->src_h;
537         mb->plane.src_x = state->src_x;
538         mb->plane.src_y = state->src_y;
539         mb->plane.dst_w = state->crtc_w;
540         mb->plane.dst_h = state->crtc_h;
541         mb->plane.dst_x = state->crtc_x;
542         mb->plane.dst_y = state->crtc_y;
543         mb->plane.alpha = state->alpha >> 8;
544         mb->plane.layer = state->normalized_zpos ?
545                                         state->normalized_zpos : -127;
546         mb->plane.num_planes = num_planes;
547         mb->plane.is_vu = vc_fmt->is_vu;
548         mb->plane.planes[0] = bo->paddr + fb->offsets[0];
549
550         rotation = drm_rotation_simplify(state->rotation,
551                                          DRM_MODE_ROTATE_0 |
552                                          DRM_MODE_REFLECT_X |
553                                          DRM_MODE_REFLECT_Y);
554
555         mb->plane.transform = TRANSFORM_NO_ROTATE;
556         if (rotation & DRM_MODE_REFLECT_X)
557                 mb->plane.transform |= TRANSFORM_FLIP_HRIZ;
558         if (rotation & DRM_MODE_REFLECT_Y)
559                 mb->plane.transform |= TRANSFORM_FLIP_VERT;
560
561         vc4_fkms_margins_adj(state, &mb->plane);
562
563         if (num_planes > 1) {
564                 /* Assume this must be YUV */
565                 /* Makes assumptions on the stride for the chroma planes as we
566                  * can't easily plumb in non-standard pitches.
567                  */
568                 mb->plane.planes[1] = bo->paddr + fb->offsets[1];
569                 if (num_planes > 2)
570                         mb->plane.planes[2] = bo->paddr + fb->offsets[2];
571                 else
572                         mb->plane.planes[2] = 0;
573
574                 /* Special case the YUV420 with U and V as line interleaved
575                  * planes as we have special handling for that case.
576                  */
577                 if (num_planes == 3 &&
578                     (fb->offsets[2] - fb->offsets[1]) == fb->pitches[1])
579                         mb->plane.vc_image_type = VC_IMAGE_YUV420_S;
580
581                 switch (state->color_encoding) {
582                 default:
583                 case DRM_COLOR_YCBCR_BT601:
584                         if (state->color_range == DRM_COLOR_YCBCR_LIMITED_RANGE)
585                                 mb->plane.color_encoding =
586                                                 VC_IMAGE_YUVINFO_CSC_ITUR_BT601;
587                         else
588                                 mb->plane.color_encoding =
589                                                 VC_IMAGE_YUVINFO_CSC_JPEG_JFIF;
590                         break;
591                 case DRM_COLOR_YCBCR_BT709:
592                         /* Currently no support for a full range BT709 */
593                         mb->plane.color_encoding =
594                                                 VC_IMAGE_YUVINFO_CSC_ITUR_BT709;
595                         break;
596                 case DRM_COLOR_YCBCR_BT2020:
597                         /* Currently no support for a full range BT2020 */
598                         mb->plane.color_encoding =
599                                         VC_IMAGE_YUVINFO_CSC_REC_2020;
600                         break;
601                 }
602         } else {
603                 mb->plane.planes[1] = 0;
604                 mb->plane.planes[2] = 0;
605         }
606         mb->plane.planes[3] = 0;
607
608         switch (fourcc_mod_broadcom_mod(fb->modifier)) {
609         case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED:
610                 switch (mb->plane.vc_image_type) {
611                 case VC_IMAGE_XRGB8888:
612                         mb->plane.vc_image_type = VC_IMAGE_TF_RGBX32;
613                         break;
614                 case VC_IMAGE_ARGB8888:
615                         mb->plane.vc_image_type = VC_IMAGE_TF_RGBA32;
616                         break;
617                 case VC_IMAGE_RGB565:
618                         mb->plane.vc_image_type = VC_IMAGE_TF_RGB565;
619                         break;
620                 }
621                 break;
622         case DRM_FORMAT_MOD_BROADCOM_SAND128:
623                 switch (mb->plane.vc_image_type) {
624                 case VC_IMAGE_YUV420SP:
625                         mb->plane.vc_image_type = VC_IMAGE_YUV_UV;
626                         break;
627                 /* VC_IMAGE_YUV10COL could be included in here, but it is only
628                  * valid as a SAND128 format, so the table at the top will have
629                  * already set the correct format.
630                  */
631                 }
632                 /* Note that the column pitch is passed across in lines, not
633                  * bytes.
634                  */
635                 mb->plane.pitch = fourcc_mod_broadcom_param(fb->modifier);
636                 break;
637         }
638
639         DRM_DEBUG_ATOMIC("[PLANE:%d:%s] plane update %dx%d@%d +dst(%d,%d, %d,%d) +src(%d,%d, %d,%d) 0x%08x/%08x/%08x/%d, alpha %u zpos %u\n",
640                          plane->base.id, plane->name,
641                          mb->plane.width,
642                          mb->plane.height,
643                          mb->plane.vc_image_type,
644                          state->crtc_x,
645                          state->crtc_y,
646                          state->crtc_w,
647                          state->crtc_h,
648                          mb->plane.src_x,
649                          mb->plane.src_y,
650                          mb->plane.src_w,
651                          mb->plane.src_h,
652                          mb->plane.planes[0],
653                          mb->plane.planes[1],
654                          mb->plane.planes[2],
655                          fb->pitches[0],
656                          state->alpha,
657                          state->normalized_zpos);
658
659         return 0;
660 }
661
662 static int vc4_plane_atomic_check(struct drm_plane *plane,
663                                   struct drm_atomic_state *state)
664 {
665         struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
666                                                                                  plane);
667         struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane);
668
669         if (!plane_enabled(new_plane_state))
670                 return 0;
671
672         return vc4_plane_to_mb(plane, &vc4_plane->mb, new_plane_state);
673 }
674
675 /* Called during init to allocate the plane's atomic state. */
676 static void vc4_plane_reset(struct drm_plane *plane)
677 {
678         struct vc4_plane_state *vc4_state;
679
680         WARN_ON(plane->state);
681
682         vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
683         if (!vc4_state)
684                 return;
685
686         __drm_atomic_helper_plane_reset(plane, &vc4_state->base);
687 }
688
689 static void vc4_plane_destroy(struct drm_plane *plane)
690 {
691         drm_plane_cleanup(plane);
692 }
693
694 static bool vc4_fkms_format_mod_supported(struct drm_plane *plane,
695                                           uint32_t format,
696                                           uint64_t modifier)
697 {
698         /* Support T_TILING for RGB formats only. */
699         switch (format) {
700         case DRM_FORMAT_XRGB8888:
701         case DRM_FORMAT_ARGB8888:
702         case DRM_FORMAT_RGB565:
703                 switch (modifier) {
704                 case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED:
705                 case DRM_FORMAT_MOD_LINEAR:
706                         return true;
707                 default:
708                         return false;
709                 }
710         case DRM_FORMAT_NV12:
711                 switch (fourcc_mod_broadcom_mod(modifier)) {
712                 case DRM_FORMAT_MOD_LINEAR:
713                 case DRM_FORMAT_MOD_BROADCOM_SAND128:
714                         return true;
715                 default:
716                         return false;
717                 }
718         case DRM_FORMAT_P030:
719                 switch (fourcc_mod_broadcom_mod(modifier)) {
720                 case DRM_FORMAT_MOD_BROADCOM_SAND128:
721                         return true;
722                 default:
723                         return false;
724                 }
725         case DRM_FORMAT_NV21:
726         case DRM_FORMAT_RGB888:
727         case DRM_FORMAT_BGR888:
728         case DRM_FORMAT_YUV422:
729         case DRM_FORMAT_YUV420:
730         case DRM_FORMAT_YVU420:
731         default:
732                 return (modifier == DRM_FORMAT_MOD_LINEAR);
733         }
734 }
735
736 static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane)
737 {
738         struct vc4_plane_state *vc4_state;
739
740         if (WARN_ON(!plane->state))
741                 return NULL;
742
743         vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
744         if (!vc4_state)
745                 return NULL;
746
747         __drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base);
748
749         return &vc4_state->base;
750 }
751
752 static const struct drm_plane_funcs vc4_plane_funcs = {
753         .update_plane = drm_atomic_helper_update_plane,
754         .disable_plane = drm_atomic_helper_disable_plane,
755         .destroy = vc4_plane_destroy,
756         .set_property = NULL,
757         .reset = vc4_plane_reset,
758         .atomic_duplicate_state = vc4_plane_duplicate_state,
759         .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
760         .format_mod_supported = vc4_fkms_format_mod_supported,
761 };
762
763 static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = {
764         .prepare_fb = drm_gem_plane_helper_prepare_fb,
765         .cleanup_fb = NULL,
766         .atomic_check = vc4_plane_atomic_check,
767         .atomic_update = vc4_plane_atomic_update,
768         .atomic_disable = vc4_plane_atomic_disable,
769 };
770
771 static struct drm_plane *vc4_fkms_plane_init(struct drm_device *dev,
772                                              enum drm_plane_type type,
773                                              u8 display_num,
774                                              u8 plane_id)
775 {
776         struct drm_plane *plane = NULL;
777         struct vc4_fkms_plane *vc4_plane;
778         u32 formats[ARRAY_SIZE(vc_image_formats)];
779         unsigned int default_zpos = 0;
780         u32 num_formats = 0;
781         int ret = 0;
782         static const uint64_t modifiers[] = {
783                 DRM_FORMAT_MOD_LINEAR,
784                 /* VC4_T_TILED should come after linear, because we
785                  * would prefer to scan out linear (less bus traffic).
786                  */
787                 DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED,
788                 DRM_FORMAT_MOD_BROADCOM_SAND128,
789                 DRM_FORMAT_MOD_INVALID,
790         };
791         int i;
792
793         vc4_plane = devm_kzalloc(dev->dev, sizeof(*vc4_plane),
794                                  GFP_KERNEL);
795         if (!vc4_plane) {
796                 ret = -ENOMEM;
797                 goto fail;
798         }
799
800         for (i = 0; i < ARRAY_SIZE(vc_image_formats); i++)
801                 formats[num_formats++] = vc_image_formats[i].drm;
802
803         plane = &vc4_plane->base;
804         ret = drm_universal_plane_init(dev, plane, 0,
805                                        &vc4_plane_funcs,
806                                        formats, num_formats, modifiers,
807                                        type, NULL);
808
809         /* FIXME: Do we need to be checking return values from all these calls?
810          */
811         drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
812
813         drm_plane_create_alpha_property(plane);
814         drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,
815                                            DRM_MODE_ROTATE_0 |
816                                            DRM_MODE_ROTATE_180 |
817                                            DRM_MODE_REFLECT_X |
818                                            DRM_MODE_REFLECT_Y);
819         drm_plane_create_color_properties(plane,
820                                           BIT(DRM_COLOR_YCBCR_BT601) |
821                                           BIT(DRM_COLOR_YCBCR_BT709) |
822                                           BIT(DRM_COLOR_YCBCR_BT2020),
823                                           BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
824                                           BIT(DRM_COLOR_YCBCR_FULL_RANGE),
825                                           DRM_COLOR_YCBCR_BT709,
826                                           DRM_COLOR_YCBCR_LIMITED_RANGE);
827
828         /*
829          * Default frame buffer setup is with FB on -127, and raspistill etc
830          * tend to drop overlays on layer 2. Cursor plane was on layer +127.
831          *
832          * For F-KMS the mailbox call allows for a s8.
833          * Remap zpos 0 to -127 for the background layer, but leave all the
834          * other layers as requested by KMS.
835          */
836         switch (type) {
837         default:
838         case DRM_PLANE_TYPE_PRIMARY:
839                 default_zpos = 0;
840                 break;
841         case DRM_PLANE_TYPE_OVERLAY:
842                 default_zpos = 1;
843                 break;
844         case DRM_PLANE_TYPE_CURSOR:
845                 default_zpos = 2;
846                 break;
847         }
848         drm_plane_create_zpos_property(plane, default_zpos, 0, 127);
849
850         /* Prepare the static elements of the mailbox structure */
851         vc4_plane->mb.tag.tag = RPI_FIRMWARE_SET_PLANE;
852         vc4_plane->mb.tag.buf_size = sizeof(struct set_plane);
853         vc4_plane->mb.tag.req_resp_size = 0;
854         vc4_plane->mb.plane.display = display_num;
855         vc4_plane->mb.plane.plane_id = plane_id;
856         vc4_plane->mb.plane.layer = default_zpos ? default_zpos : -127;
857
858         return plane;
859 fail:
860         if (plane)
861                 vc4_plane_destroy(plane);
862
863         return ERR_PTR(ret);
864 }
865
866 static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
867 {
868         struct drm_device *dev = crtc->dev;
869         struct vc4_dev *vc4 = to_vc4_dev(dev);
870         struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
871         struct drm_display_mode *mode = &crtc->state->adjusted_mode;
872         struct vc4_fkms_encoder *vc4_encoder =
873                                         to_vc4_fkms_encoder(vc4_crtc->encoder);
874         struct mailbox_set_mode mb = {
875                 .tag1 = { RPI_FIRMWARE_SET_TIMING,
876                           sizeof(struct set_timings), 0},
877         };
878         union hdmi_infoframe frame;
879         int ret;
880
881         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, vc4_crtc->connector, mode);
882         if (ret < 0) {
883                 DRM_ERROR("couldn't fill AVI infoframe\n");
884                 return;
885         }
886
887         DRM_DEBUG_KMS("Setting mode for display num %u mode name %s, clk %d, h(disp %d, start %d, end %d, total %d, skew %d) v(disp %d, start %d, end %d, total %d, scan %d), vrefresh %d, par %u, flags 0x%04x\n",
888                       vc4_crtc->display_number, mode->name, mode->clock,
889                       mode->hdisplay, mode->hsync_start, mode->hsync_end,
890                       mode->htotal, mode->hskew, mode->vdisplay,
891                       mode->vsync_start, mode->vsync_end, mode->vtotal,
892                       mode->vscan, drm_mode_vrefresh(mode),
893                       mode->picture_aspect_ratio, mode->flags);
894         mb.timings.display = vc4_crtc->display_number;
895
896         mb.timings.clock = mode->clock;
897         mb.timings.hdisplay = mode->hdisplay;
898         mb.timings.hsync_start = mode->hsync_start;
899         mb.timings.hsync_end = mode->hsync_end;
900         mb.timings.htotal = mode->htotal;
901         mb.timings.hskew = mode->hskew;
902         mb.timings.vdisplay = mode->vdisplay;
903         mb.timings.vsync_start = mode->vsync_start;
904         mb.timings.vsync_end = mode->vsync_end;
905         mb.timings.vtotal = mode->vtotal;
906         mb.timings.vscan = mode->vscan;
907         mb.timings.vrefresh = drm_mode_vrefresh(mode);
908         mb.timings.flags = 0;
909         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
910                 mb.timings.flags |= TIMINGS_FLAGS_H_SYNC_POS;
911         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
912                 mb.timings.flags |= TIMINGS_FLAGS_V_SYNC_POS;
913
914         switch (frame.avi.picture_aspect) {
915         default:
916         case HDMI_PICTURE_ASPECT_NONE:
917                 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_NONE;
918                 break;
919         case HDMI_PICTURE_ASPECT_4_3:
920                 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_4_3;
921                 break;
922         case HDMI_PICTURE_ASPECT_16_9:
923                 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_16_9;
924                 break;
925         case HDMI_PICTURE_ASPECT_64_27:
926                 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_64_27;
927                 break;
928         case HDMI_PICTURE_ASPECT_256_135:
929                 mb.timings.flags |= TIMINGS_FLAGS_ASPECT_256_135;
930                 break;
931         }
932
933         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
934                 mb.timings.flags |= TIMINGS_FLAGS_INTERLACE;
935         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
936                 mb.timings.flags |= TIMINGS_FLAGS_DBL_CLK;
937
938         mb.timings.video_id_code = frame.avi.video_code;
939
940         if (!vc4_encoder->hdmi_monitor) {
941                 mb.timings.flags |= TIMINGS_FLAGS_DVI;
942         } else {
943                 struct vc4_fkms_connector_state *conn_state =
944                         to_vc4_fkms_connector_state(vc4_crtc->connector->state);
945
946                 if (conn_state->broadcast_rgb == VC4_BROADCAST_RGB_AUTO) {
947                         /* See CEA-861-E - 5.1 Default Encoding Parameters */
948                         if (drm_default_rgb_quant_range(mode) ==
949                                         HDMI_QUANTIZATION_RANGE_LIMITED)
950                                 mb.timings.flags |= TIMINGS_FLAGS_RGB_LIMITED;
951                 } else {
952                         if (conn_state->broadcast_rgb ==
953                                                 VC4_BROADCAST_RGB_LIMITED)
954                                 mb.timings.flags |= TIMINGS_FLAGS_RGB_LIMITED;
955
956                         /* If not using the default range, then do not provide
957                          * a VIC as the HDMI spec requires that we do not
958                          * signal the opposite of the defined range in the AVI
959                          * infoframe.
960                          */
961                         if (!!(mb.timings.flags & TIMINGS_FLAGS_RGB_LIMITED) !=
962                             (drm_default_rgb_quant_range(mode) ==
963                                         HDMI_QUANTIZATION_RANGE_LIMITED))
964                                 mb.timings.video_id_code = 0;
965                 }
966         }
967
968         /*
969          * FIXME: To implement
970          * switch(mode->flag & DRM_MODE_FLAG_3D_MASK) {
971          * case DRM_MODE_FLAG_3D_NONE:
972          * case DRM_MODE_FLAG_3D_FRAME_PACKING:
973          * case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
974          * case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
975          * case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
976          * case DRM_MODE_FLAG_3D_L_DEPTH:
977          * case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
978          * case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
979          * case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
980          * }
981          */
982
983         ret = rpi_firmware_property_list(vc4->firmware, &mb, sizeof(mb));
984 }
985
986 static void vc4_crtc_disable(struct drm_crtc *crtc,
987                              struct drm_atomic_state *state)
988 {
989         struct drm_device *dev = crtc->dev;
990         struct drm_plane *plane;
991
992         DRM_DEBUG_KMS("[CRTC:%d] vblanks off.\n",
993                       crtc->base.id);
994         drm_crtc_vblank_off(crtc);
995
996         /* Always turn the planes off on CRTC disable. In DRM, planes
997          * are enabled/disabled through the update/disable hooks
998          * above, and the CRTC enable/disable independently controls
999          * whether anything scans out at all, but the firmware doesn't
1000          * give us a CRTC-level control for that.
1001          */
1002
1003         drm_atomic_crtc_for_each_plane(plane, crtc)
1004                 vc4_plane_atomic_disable(plane, state);
1005
1006         /*
1007          * Make sure we issue a vblank event after disabling the CRTC if
1008          * someone was waiting it.
1009          */
1010         if (crtc->state->event) {
1011                 unsigned long flags;
1012
1013                 spin_lock_irqsave(&dev->event_lock, flags);
1014                 drm_crtc_send_vblank_event(crtc, crtc->state->event);
1015                 crtc->state->event = NULL;
1016                 spin_unlock_irqrestore(&dev->event_lock, flags);
1017         }
1018 }
1019
1020 static void vc4_crtc_consume_event(struct drm_crtc *crtc)
1021 {
1022         struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
1023         struct drm_device *dev = crtc->dev;
1024         unsigned long flags;
1025
1026         if (!crtc->state->event)
1027                 return;
1028
1029         crtc->state->event->pipe = drm_crtc_index(crtc);
1030
1031         WARN_ON(drm_crtc_vblank_get(crtc) != 0);
1032
1033         spin_lock_irqsave(&dev->event_lock, flags);
1034         vc4_crtc->event = crtc->state->event;
1035         crtc->state->event = NULL;
1036         spin_unlock_irqrestore(&dev->event_lock, flags);
1037 }
1038
1039 static void vc4_crtc_enable(struct drm_crtc *crtc,
1040                             struct drm_atomic_state *state)
1041 {
1042         struct drm_plane *plane;
1043
1044         DRM_DEBUG_KMS("[CRTC:%d] vblanks on.\n",
1045                       crtc->base.id);
1046         drm_crtc_vblank_on(crtc);
1047         vc4_crtc_consume_event(crtc);
1048
1049         /* Unblank the planes (if they're supposed to be displayed). */
1050         drm_atomic_crtc_for_each_plane(plane, crtc)
1051                 if (plane->state->fb)
1052                         vc4_plane_set_blank(plane, plane->state->visible);
1053 }
1054
1055 static enum drm_mode_status
1056 vc4_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
1057 {
1058         struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
1059         struct drm_device *dev = crtc->dev;
1060         struct vc4_dev *vc4 = to_vc4_dev(dev);
1061         struct vc4_fkms *fkms = vc4->fkms;
1062
1063         /* Do not allow doublescan modes from user space */
1064         if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
1065                 DRM_DEBUG_KMS("[CRTC:%d] Doublescan mode rejected.\n",
1066                               crtc->base.id);
1067                 return MODE_NO_DBLESCAN;
1068         }
1069
1070         /* Disable refresh rates > defined threshold (default 85Hz) as limited
1071          * gain from them
1072          */
1073         if (drm_mode_vrefresh(mode) > fkms_max_refresh_rate)
1074                 return MODE_BAD_VVALUE;
1075
1076         /* Limit the pixel clock based on the HDMI clock limits from the
1077          * firmware
1078          */
1079         switch (vc4_crtc->display_number) {
1080         case 2: /* HDMI0 */
1081                 if (fkms->cfg.max_pixel_clock[0] &&
1082                     mode->clock > fkms->cfg.max_pixel_clock[0])
1083                         return MODE_CLOCK_HIGH;
1084                 break;
1085         case 7: /* HDMI1 */
1086                 if (fkms->cfg.max_pixel_clock[1] &&
1087                     mode->clock > fkms->cfg.max_pixel_clock[1])
1088                         return MODE_CLOCK_HIGH;
1089                 break;
1090         }
1091
1092         /* Pi4 can't generate odd horizontal timings on HDMI, so reject modes
1093          * that would set them.
1094          */
1095         if (fkms->bcm2711 &&
1096             (vc4_crtc->display_number == 2 || vc4_crtc->display_number == 7) &&
1097             !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
1098             ((mode->hdisplay |                          /* active */
1099               (mode->hsync_start - mode->hdisplay) |    /* front porch */
1100               (mode->hsync_end - mode->hsync_start) |   /* sync pulse */
1101               (mode->htotal - mode->hsync_end)) & 1))   /* back porch */ {
1102                 DRM_DEBUG_KMS("[CRTC:%d] Odd timing rejected %u %u %u %u.\n",
1103                               crtc->base.id, mode->hdisplay, mode->hsync_start,
1104                               mode->hsync_end, mode->htotal);
1105                 return MODE_H_ILLEGAL;
1106         }
1107
1108         return MODE_OK;
1109 }
1110
1111 static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
1112                                  struct drm_atomic_state *state)
1113 {
1114         struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
1115                                                                           crtc);
1116         struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
1117         struct drm_connector *conn;
1118         struct drm_connector_state *conn_state;
1119         int i;
1120
1121         DRM_DEBUG_KMS("[CRTC:%d] crtc_atomic_check.\n", crtc->base.id);
1122
1123         for_each_new_connector_in_state(crtc_state->state, conn, conn_state, i) {
1124                 if (conn_state->crtc != crtc)
1125                         continue;
1126
1127                 vc4_state->margins.left = conn_state->tv.margins.left;
1128                 vc4_state->margins.right = conn_state->tv.margins.right;
1129                 vc4_state->margins.top = conn_state->tv.margins.top;
1130                 vc4_state->margins.bottom = conn_state->tv.margins.bottom;
1131                 break;
1132         }
1133         return 0;
1134 }
1135
1136 static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
1137                                   struct drm_atomic_state *state)
1138 {
1139         struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
1140                                                                          crtc);
1141
1142         DRM_DEBUG_KMS("[CRTC:%d] crtc_atomic_flush.\n",
1143                       crtc->base.id);
1144         if (crtc->state->active && old_state->active && crtc->state->event)
1145                 vc4_crtc_consume_event(crtc);
1146 }
1147
1148 static void vc4_crtc_handle_page_flip(struct vc4_crtc *vc4_crtc)
1149 {
1150         struct drm_crtc *crtc = &vc4_crtc->base;
1151         struct drm_device *dev = crtc->dev;
1152         unsigned long flags;
1153
1154         spin_lock_irqsave(&dev->event_lock, flags);
1155         if (vc4_crtc->event) {
1156                 drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
1157                 vc4_crtc->event = NULL;
1158                 drm_crtc_vblank_put(crtc);
1159         }
1160         spin_unlock_irqrestore(&dev->event_lock, flags);
1161 }
1162
1163 static irqreturn_t vc4_crtc_irq_handler(int irq, void *data)
1164 {
1165         struct vc4_crtc **crtc_list = data;
1166         int i;
1167         u32 stat = readl(crtc_list[0]->regs + SMICS);
1168         irqreturn_t ret = IRQ_NONE;
1169         u32 chan;
1170
1171         if (stat & SMICS_INTERRUPTS) {
1172                 writel(0, crtc_list[0]->regs + SMICS);
1173
1174                 chan = readl(crtc_list[0]->regs + SMIDSW0);
1175
1176                 if ((chan & 0xFFFF0000) != SMI_NEW) {
1177                         /* Older firmware. Treat the one interrupt as vblank/
1178                          * complete for all crtcs.
1179                          */
1180                         for (i = 0; crtc_list[i]; i++) {
1181                                 if (crtc_list[i]->vblank_enabled)
1182                                         drm_crtc_handle_vblank(&crtc_list[i]->base);
1183                                 vc4_crtc_handle_page_flip(crtc_list[i]);
1184                         }
1185                 } else {
1186                         if (chan & 1) {
1187                                 writel(SMI_NEW, crtc_list[0]->regs + SMIDSW0);
1188                                 if (crtc_list[0]->vblank_enabled)
1189                                         drm_crtc_handle_vblank(&crtc_list[0]->base);
1190                                 vc4_crtc_handle_page_flip(crtc_list[0]);
1191                         }
1192
1193                         if (crtc_list[1]) {
1194                                 /* Check for the secondary display too */
1195                                 chan = readl(crtc_list[0]->regs + SMIDSW1);
1196
1197                                 if (chan & 1) {
1198                                         writel(SMI_NEW, crtc_list[0]->regs + SMIDSW1);
1199
1200                                         if (crtc_list[1]->vblank_enabled)
1201                                                 drm_crtc_handle_vblank(&crtc_list[1]->base);
1202                                         vc4_crtc_handle_page_flip(crtc_list[1]);
1203                                 }
1204                         }
1205                 }
1206
1207                 ret = IRQ_HANDLED;
1208         }
1209
1210         return ret;
1211 }
1212
1213 static int vc4_fkms_page_flip(struct drm_crtc *crtc,
1214                               struct drm_framebuffer *fb,
1215                               struct drm_pending_vblank_event *event,
1216                               uint32_t flags,
1217                               struct drm_modeset_acquire_ctx *ctx)
1218 {
1219         if (flags & DRM_MODE_PAGE_FLIP_ASYNC) {
1220                 DRM_ERROR("Async flips aren't allowed\n");
1221                 return -EINVAL;
1222         }
1223
1224         return drm_atomic_helper_page_flip(crtc, fb, event, flags, ctx);
1225 }
1226
1227 static struct drm_crtc_state *
1228 vc4_fkms_crtc_duplicate_state(struct drm_crtc *crtc)
1229 {
1230         struct vc4_crtc_state *vc4_state, *old_vc4_state;
1231
1232         vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
1233         if (!vc4_state)
1234                 return NULL;
1235
1236         old_vc4_state = to_vc4_crtc_state(crtc->state);
1237         vc4_state->margins = old_vc4_state->margins;
1238
1239         __drm_atomic_helper_crtc_duplicate_state(crtc, &vc4_state->base);
1240         return &vc4_state->base;
1241 }
1242
1243 static void
1244 vc4_fkms_crtc_reset(struct drm_crtc *crtc)
1245 {
1246         if (crtc->state)
1247                 __drm_atomic_helper_crtc_destroy_state(crtc->state);
1248
1249         crtc->state = kzalloc(sizeof(*crtc->state), GFP_KERNEL);
1250         if (crtc->state)
1251                 crtc->state->crtc = crtc;
1252 }
1253
1254 static int vc4_fkms_enable_vblank(struct drm_crtc *crtc)
1255 {
1256         struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
1257
1258         DRM_DEBUG_KMS("[CRTC:%d] enable_vblank.\n",
1259                       crtc->base.id);
1260         vc4_crtc->vblank_enabled = true;
1261
1262         return 0;
1263 }
1264
1265 static void vc4_fkms_disable_vblank(struct drm_crtc *crtc)
1266 {
1267         struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
1268
1269         DRM_DEBUG_KMS("[CRTC:%d] disable_vblank.\n",
1270                       crtc->base.id);
1271         vc4_crtc->vblank_enabled = false;
1272 }
1273
1274 static const struct drm_crtc_funcs vc4_crtc_funcs = {
1275         .set_config = drm_atomic_helper_set_config,
1276         .destroy = drm_crtc_cleanup,
1277         .page_flip = vc4_fkms_page_flip,
1278         .set_property = NULL,
1279         .cursor_set = NULL, /* handled by drm_mode_cursor_universal */
1280         .cursor_move = NULL, /* handled by drm_mode_cursor_universal */
1281         .reset = vc4_fkms_crtc_reset,
1282         .atomic_duplicate_state = vc4_fkms_crtc_duplicate_state,
1283         .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
1284         .enable_vblank = vc4_fkms_enable_vblank,
1285         .disable_vblank = vc4_fkms_disable_vblank,
1286 };
1287
1288 static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
1289         .mode_set_nofb = vc4_crtc_mode_set_nofb,
1290         .mode_valid = vc4_crtc_mode_valid,
1291         .atomic_check = vc4_crtc_atomic_check,
1292         .atomic_flush = vc4_crtc_atomic_flush,
1293         .atomic_enable = vc4_crtc_enable,
1294         .atomic_disable = vc4_crtc_disable,
1295 };
1296
1297 static const struct of_device_id vc4_firmware_kms_dt_match[] = {
1298         { .compatible = "raspberrypi,rpi-firmware-kms" },
1299         { .compatible = "raspberrypi,rpi-firmware-kms-2711",
1300           .data = (void *)1 },
1301         {}
1302 };
1303
1304 static enum drm_connector_status
1305 vc4_fkms_connector_detect(struct drm_connector *connector, bool force)
1306 {
1307         DRM_DEBUG_KMS("connector detect.\n");
1308         return connector_status_connected;
1309 }
1310
1311 /* Queries the firmware to populate a drm_mode structure for this display */
1312 static int vc4_fkms_get_fw_mode(struct vc4_fkms_connector *fkms_connector,
1313                                 struct drm_display_mode *mode)
1314 {
1315         struct vc4_dev *vc4 = fkms_connector->vc4_dev;
1316         struct set_timings timings = { 0 };
1317         int ret;
1318
1319         timings.display = fkms_connector->display_number;
1320
1321         ret = rpi_firmware_property(vc4->firmware,
1322                                     RPI_FIRMWARE_GET_DISPLAY_TIMING, &timings,
1323                                     sizeof(timings));
1324         if (ret || !timings.clock)
1325                 /* No mode returned - abort */
1326                 return -1;
1327
1328         /* Equivalent to DRM_MODE macro. */
1329         memset(mode, 0, sizeof(*mode));
1330         strncpy(mode->name, "FIXED_MODE", sizeof(mode->name));
1331         mode->status = 0;
1332         mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1333         mode->clock = timings.clock;
1334         mode->hdisplay = timings.hdisplay;
1335         mode->hsync_start = timings.hsync_start;
1336         mode->hsync_end = timings.hsync_end;
1337         mode->htotal = timings.htotal;
1338         mode->hskew = 0;
1339         mode->vdisplay = timings.vdisplay;
1340         mode->vsync_start = timings.vsync_start;
1341         mode->vsync_end = timings.vsync_end;
1342         mode->vtotal = timings.vtotal;
1343         mode->vscan = timings.vscan;
1344
1345         if (timings.flags & TIMINGS_FLAGS_H_SYNC_POS)
1346                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
1347         else
1348                 mode->flags |= DRM_MODE_FLAG_NHSYNC;
1349
1350         if (timings.flags & TIMINGS_FLAGS_V_SYNC_POS)
1351                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
1352         else
1353                 mode->flags |= DRM_MODE_FLAG_NVSYNC;
1354
1355         if (timings.flags & TIMINGS_FLAGS_INTERLACE)
1356                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1357
1358         return 0;
1359 }
1360
1361 static int vc4_fkms_get_edid_block(void *data, u8 *buf, unsigned int block,
1362                                    size_t len)
1363 {
1364         struct vc4_fkms_connector *fkms_connector =
1365                                         (struct vc4_fkms_connector *)data;
1366         struct vc4_dev *vc4 = fkms_connector->vc4_dev;
1367         struct mailbox_get_edid mb = {
1368                 .tag1 = { RPI_FIRMWARE_GET_EDID_BLOCK_DISPLAY,
1369                           128 + 8, 0 },
1370                 .block = block,
1371                 .display_number = fkms_connector->display_number,
1372         };
1373         int ret = 0;
1374
1375         ret = rpi_firmware_property_list(vc4->firmware, &mb, sizeof(mb));
1376
1377         if (!ret)
1378                 memcpy(buf, mb.edid, len);
1379
1380         return ret;
1381 }
1382
1383 static int vc4_fkms_connector_get_modes(struct drm_connector *connector)
1384 {
1385         struct vc4_fkms_connector *fkms_connector =
1386                                         to_vc4_fkms_connector(connector);
1387         struct drm_encoder *encoder = fkms_connector->encoder;
1388         struct vc4_fkms_encoder *vc4_encoder = to_vc4_fkms_encoder(encoder);
1389         struct drm_display_mode fw_mode;
1390         struct drm_display_mode *mode;
1391         struct edid *edid;
1392         int num_modes;
1393
1394         if (!vc4_fkms_get_fw_mode(fkms_connector, &fw_mode)) {
1395                 drm_mode_debug_printmodeline(&fw_mode);
1396                 mode = drm_mode_duplicate(connector->dev,
1397                                           &fw_mode);
1398                 drm_mode_probed_add(connector, mode);
1399                 num_modes = 1;  /* 1 mode */
1400         } else {
1401                 edid = drm_do_get_edid(connector, vc4_fkms_get_edid_block,
1402                                        fkms_connector);
1403
1404                 /* FIXME: Can we do CEC?
1405                  * cec_s_phys_addr_from_edid(vc4->hdmi->cec_adap, edid);
1406                  * if (!edid)
1407                  *      return -ENODEV;
1408                  */
1409
1410                 vc4_encoder->hdmi_monitor = drm_detect_hdmi_monitor(edid);
1411
1412                 drm_connector_update_edid_property(connector, edid);
1413                 num_modes = drm_add_edid_modes(connector, edid);
1414                 kfree(edid);
1415         }
1416
1417         return num_modes;
1418 }
1419
1420 /* This is the DSI panel resolution. Use this as a default should the firmware
1421  * not respond to our request for the timings.
1422  */
1423 static const struct drm_display_mode lcd_mode = {
1424         DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1425                  25979400 / 1000,
1426                  800, 800 + 1, 800 + 1 + 2, 800 + 1 + 2 + 46, 0,
1427                  480, 480 + 7, 480 + 7 + 2, 480 + 7 + 2 + 21, 0,
1428                  0)
1429 };
1430
1431 static int vc4_fkms_lcd_connector_get_modes(struct drm_connector *connector)
1432 {
1433         struct vc4_fkms_connector *fkms_connector =
1434                                         to_vc4_fkms_connector(connector);
1435         struct drm_display_mode *mode;
1436         struct drm_display_mode fw_mode;
1437
1438         if (!vc4_fkms_get_fw_mode(fkms_connector, &fw_mode) && fw_mode.clock)
1439                 mode = drm_mode_duplicate(connector->dev,
1440                                           &fw_mode);
1441         else
1442                 mode = drm_mode_duplicate(connector->dev,
1443                                           &lcd_mode);
1444
1445         if (!mode) {
1446                 DRM_ERROR("Failed to create a new display mode\n");
1447                 return -ENOMEM;
1448         }
1449
1450         drm_mode_probed_add(connector, mode);
1451
1452         /* We have one mode */
1453         return 1;
1454 }
1455
1456 static struct drm_encoder *
1457 vc4_fkms_connector_best_encoder(struct drm_connector *connector)
1458 {
1459         struct vc4_fkms_connector *fkms_connector =
1460                 to_vc4_fkms_connector(connector);
1461         DRM_DEBUG_KMS("best_connector.\n");
1462         return fkms_connector->encoder;
1463 }
1464
1465 static void vc4_fkms_connector_destroy(struct drm_connector *connector)
1466 {
1467         DRM_DEBUG_KMS("[CONNECTOR:%d] destroy.\n",
1468                       connector->base.id);
1469         drm_connector_unregister(connector);
1470         drm_connector_cleanup(connector);
1471 }
1472
1473 /**
1474  * vc4_connector_duplicate_state - duplicate connector state
1475  * @connector: digital connector
1476  *
1477  * Allocates and returns a copy of the connector state (both common and
1478  * digital connector specific) for the specified connector.
1479  *
1480  * Returns: The newly allocated connector state, or NULL on failure.
1481  */
1482 struct drm_connector_state *
1483 vc4_connector_duplicate_state(struct drm_connector *connector)
1484 {
1485         struct vc4_fkms_connector_state *state;
1486
1487         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
1488         if (!state)
1489                 return NULL;
1490
1491         __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
1492         return &state->base;
1493 }
1494
1495 /**
1496  * vc4_connector_atomic_get_property - hook for connector->atomic_get_property.
1497  * @connector: Connector to get the property for.
1498  * @state: Connector state to retrieve the property from.
1499  * @property: Property to retrieve.
1500  * @val: Return value for the property.
1501  *
1502  * Returns the atomic property value for a digital connector.
1503  */
1504 int vc4_connector_atomic_get_property(struct drm_connector *connector,
1505                                       const struct drm_connector_state *state,
1506                                       struct drm_property *property,
1507                                       uint64_t *val)
1508 {
1509         struct vc4_fkms_connector *fkms_connector =
1510                                         to_vc4_fkms_connector(connector);
1511         struct vc4_fkms_connector_state *vc4_conn_state =
1512                                         to_vc4_fkms_connector_state(state);
1513
1514         if (property == fkms_connector->broadcast_rgb_property) {
1515                 *val = vc4_conn_state->broadcast_rgb;
1516         } else {
1517                 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
1518                                  property->base.id, property->name);
1519                 return -EINVAL;
1520         }
1521
1522         return 0;
1523 }
1524
1525 /**
1526  * vc4_connector_atomic_set_property - hook for connector->atomic_set_property.
1527  * @connector: Connector to set the property for.
1528  * @state: Connector state to set the property on.
1529  * @property: Property to set.
1530  * @val: New value for the property.
1531  *
1532  * Sets the atomic property value for a digital connector.
1533  */
1534 int vc4_connector_atomic_set_property(struct drm_connector *connector,
1535                                       struct drm_connector_state *state,
1536                                       struct drm_property *property,
1537                                       uint64_t val)
1538 {
1539         struct vc4_fkms_connector *fkms_connector =
1540                                         to_vc4_fkms_connector(connector);
1541         struct vc4_fkms_connector_state *vc4_conn_state =
1542                                         to_vc4_fkms_connector_state(state);
1543
1544         if (property == fkms_connector->broadcast_rgb_property) {
1545                 vc4_conn_state->broadcast_rgb = val;
1546                 return 0;
1547         }
1548
1549         DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
1550                          property->base.id, property->name);
1551         return -EINVAL;
1552 }
1553
1554 int vc4_connector_atomic_check(struct drm_connector *connector,
1555                                struct drm_atomic_state *state)
1556 {
1557         struct drm_connector_state *old_state =
1558                 drm_atomic_get_old_connector_state(state, connector);
1559         struct vc4_fkms_connector_state *vc4_old_state =
1560                                         to_vc4_fkms_connector_state(old_state);
1561         struct drm_connector_state *new_state =
1562                 drm_atomic_get_new_connector_state(state, connector);
1563         struct vc4_fkms_connector_state *vc4_new_state =
1564                                         to_vc4_fkms_connector_state(new_state);
1565         struct drm_crtc *crtc = new_state->crtc;
1566
1567         if (!crtc)
1568                 return 0;
1569
1570         if (vc4_old_state->broadcast_rgb != vc4_new_state->broadcast_rgb) {
1571                 struct drm_crtc_state *crtc_state;
1572
1573                 crtc_state = drm_atomic_get_crtc_state(state, crtc);
1574                 if (IS_ERR(crtc_state))
1575                         return PTR_ERR(crtc_state);
1576
1577                 crtc_state->mode_changed = true;
1578         }
1579         return 0;
1580 }
1581
1582 static void vc4_hdmi_connector_reset(struct drm_connector *connector)
1583 {
1584         drm_atomic_helper_connector_reset(connector);
1585         drm_atomic_helper_connector_tv_reset(connector);
1586 }
1587
1588 static const struct drm_connector_funcs vc4_fkms_connector_funcs = {
1589         .detect = vc4_fkms_connector_detect,
1590         .fill_modes = drm_helper_probe_single_connector_modes,
1591         .destroy = vc4_fkms_connector_destroy,
1592         .reset = vc4_hdmi_connector_reset,
1593         .atomic_duplicate_state = vc4_connector_duplicate_state,
1594         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1595         .atomic_get_property = vc4_connector_atomic_get_property,
1596         .atomic_set_property = vc4_connector_atomic_set_property,
1597 };
1598
1599 static const struct drm_connector_helper_funcs vc4_fkms_connector_helper_funcs = {
1600         .get_modes = vc4_fkms_connector_get_modes,
1601         .best_encoder = vc4_fkms_connector_best_encoder,
1602         .atomic_check = vc4_connector_atomic_check,
1603 };
1604
1605 static const struct drm_connector_helper_funcs vc4_fkms_lcd_conn_helper_funcs = {
1606         .get_modes = vc4_fkms_lcd_connector_get_modes,
1607         .best_encoder = vc4_fkms_connector_best_encoder,
1608 };
1609
1610 static const struct drm_prop_enum_list broadcast_rgb_names[] = {
1611         { VC4_BROADCAST_RGB_AUTO, "Automatic" },
1612         { VC4_BROADCAST_RGB_FULL, "Full" },
1613         { VC4_BROADCAST_RGB_LIMITED, "Limited 16:235" },
1614 };
1615
1616 static void
1617 vc4_attach_broadcast_rgb_property(struct vc4_fkms_connector *fkms_connector)
1618 {
1619         struct drm_device *dev = fkms_connector->base.dev;
1620         struct drm_property *prop;
1621
1622         prop = fkms_connector->broadcast_rgb_property;
1623         if (!prop) {
1624                 prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM,
1625                                                 "Broadcast RGB",
1626                                                 broadcast_rgb_names,
1627                                                 ARRAY_SIZE(broadcast_rgb_names));
1628                 if (!prop)
1629                         return;
1630
1631                 fkms_connector->broadcast_rgb_property = prop;
1632         }
1633
1634         drm_object_attach_property(&fkms_connector->base.base, prop, 0);
1635 }
1636
1637 static struct drm_connector *
1638 vc4_fkms_connector_init(struct drm_device *dev, struct drm_encoder *encoder,
1639                         u32 display_num)
1640 {
1641         struct drm_connector *connector = NULL;
1642         struct vc4_fkms_connector *fkms_connector;
1643         struct vc4_fkms_connector_state *conn_state = NULL;
1644         struct vc4_dev *vc4_dev = to_vc4_dev(dev);
1645         int ret = 0;
1646
1647         DRM_DEBUG_KMS("connector_init, display_num %u\n", display_num);
1648
1649         fkms_connector = devm_kzalloc(dev->dev, sizeof(*fkms_connector),
1650                                       GFP_KERNEL);
1651         if (!fkms_connector)
1652                 return ERR_PTR(-ENOMEM);
1653
1654         /*
1655          * Allocate enough memory to hold vc4_fkms_connector_state,
1656          */
1657         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
1658         if (!conn_state) {
1659                 kfree(fkms_connector);
1660                 return ERR_PTR(-ENOMEM);
1661         }
1662
1663         connector = &fkms_connector->base;
1664
1665         fkms_connector->encoder = encoder;
1666         fkms_connector->display_number = display_num;
1667         fkms_connector->display_type = vc4_get_display_type(display_num);
1668         fkms_connector->vc4_dev = vc4_dev;
1669
1670         __drm_atomic_helper_connector_reset(connector,
1671                                             &conn_state->base);
1672
1673         if (fkms_connector->display_type == DRM_MODE_ENCODER_DSI) {
1674                 drm_connector_init(dev, connector, &vc4_fkms_connector_funcs,
1675                                    DRM_MODE_CONNECTOR_DSI);
1676                 drm_connector_helper_add(connector,
1677                                          &vc4_fkms_lcd_conn_helper_funcs);
1678                 connector->interlace_allowed = 0;
1679         } else if (fkms_connector->display_type == DRM_MODE_ENCODER_TVDAC) {
1680                 drm_connector_init(dev, connector, &vc4_fkms_connector_funcs,
1681                                    DRM_MODE_CONNECTOR_Composite);
1682                 drm_connector_helper_add(connector,
1683                                          &vc4_fkms_lcd_conn_helper_funcs);
1684                 connector->interlace_allowed = 1;
1685         } else {
1686                 drm_connector_init(dev, connector, &vc4_fkms_connector_funcs,
1687                                    DRM_MODE_CONNECTOR_HDMIA);
1688                 drm_connector_helper_add(connector,
1689                                          &vc4_fkms_connector_helper_funcs);
1690                 connector->interlace_allowed = 1;
1691         }
1692
1693         ret = drm_mode_create_tv_margin_properties(dev);
1694         if (ret)
1695                 goto fail;
1696
1697         drm_connector_attach_tv_margin_properties(connector);
1698
1699         connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
1700                              DRM_CONNECTOR_POLL_DISCONNECT);
1701
1702         connector->doublescan_allowed = 0;
1703
1704         vc4_attach_broadcast_rgb_property(fkms_connector);
1705
1706         drm_connector_attach_encoder(connector, encoder);
1707
1708         return connector;
1709
1710  fail:
1711         if (connector)
1712                 vc4_fkms_connector_destroy(connector);
1713
1714         return ERR_PTR(ret);
1715 }
1716
1717 static void vc4_fkms_encoder_destroy(struct drm_encoder *encoder)
1718 {
1719         DRM_DEBUG_KMS("Encoder_destroy\n");
1720         drm_encoder_cleanup(encoder);
1721 }
1722
1723 static const struct drm_encoder_funcs vc4_fkms_encoder_funcs = {
1724         .destroy = vc4_fkms_encoder_destroy,
1725 };
1726
1727 static void vc4_fkms_display_power(struct drm_encoder *encoder, bool power)
1728 {
1729         struct vc4_fkms_encoder *vc4_encoder = to_vc4_fkms_encoder(encoder);
1730         struct vc4_dev *vc4 = to_vc4_dev(encoder->dev);
1731
1732         struct mailbox_display_pwr pwr = {
1733                 .tag1 = {RPI_FIRMWARE_SET_DISPLAY_POWER, 8, 0, },
1734                 .display = vc4_encoder->display_num,
1735                 .state = power ? 1 : 0,
1736         };
1737
1738         rpi_firmware_property_list(vc4->firmware, &pwr, sizeof(pwr));
1739 }
1740
1741 static void vc4_fkms_encoder_enable(struct drm_encoder *encoder)
1742 {
1743         vc4_fkms_display_power(encoder, true);
1744         DRM_DEBUG_KMS("Encoder_enable\n");
1745 }
1746
1747 static void vc4_fkms_encoder_disable(struct drm_encoder *encoder)
1748 {
1749         vc4_fkms_display_power(encoder, false);
1750         DRM_DEBUG_KMS("Encoder_disable\n");
1751 }
1752
1753 static const struct drm_encoder_helper_funcs vc4_fkms_encoder_helper_funcs = {
1754         .enable = vc4_fkms_encoder_enable,
1755         .disable = vc4_fkms_encoder_disable,
1756 };
1757
1758 static int vc4_fkms_create_screen(struct device *dev, struct drm_device *drm,
1759                                   int display_idx, int display_ref,
1760                                   struct vc4_crtc **ret_crtc)
1761 {
1762         struct vc4_dev *vc4 = to_vc4_dev(drm);
1763         struct vc4_crtc *vc4_crtc;
1764         struct vc4_fkms_encoder *vc4_encoder;
1765         struct drm_crtc *crtc;
1766         struct drm_plane *destroy_plane, *temp;
1767         struct mailbox_blank_display blank = {
1768                 .tag1 = {RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM, 4, 0, },
1769                 .display = display_idx,
1770                 .tag2 = { RPI_FIRMWARE_FRAMEBUFFER_BLANK, 4, 0, },
1771                 .blank = 1,
1772         };
1773         struct drm_plane *planes[PLANES_PER_CRTC];
1774         int ret, i;
1775
1776         vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL);
1777         if (!vc4_crtc)
1778                 return -ENOMEM;
1779         crtc = &vc4_crtc->base;
1780
1781         vc4_crtc->display_number = display_ref;
1782         vc4_crtc->display_type = vc4_get_display_type(display_ref);
1783
1784         /* Blank the firmware provided framebuffer */
1785         rpi_firmware_property_list(vc4->firmware, &blank, sizeof(blank));
1786
1787         for (i = 0; i < PLANES_PER_CRTC; i++) {
1788                 planes[i] = vc4_fkms_plane_init(drm,
1789                                                 (i == 0) ?
1790                                                   DRM_PLANE_TYPE_PRIMARY :
1791                                                   (i == PLANES_PER_CRTC - 1) ?
1792                                                         DRM_PLANE_TYPE_CURSOR :
1793                                                         DRM_PLANE_TYPE_OVERLAY,
1794                                                 display_ref,
1795                                                 i + (display_idx * PLANES_PER_CRTC)
1796                                                );
1797                 if (IS_ERR(planes[i])) {
1798                         dev_err(dev, "failed to construct plane %u\n", i);
1799                         ret = PTR_ERR(planes[i]);
1800                         goto err;
1801                 }
1802         }
1803
1804         drm_crtc_init_with_planes(drm, crtc, planes[0],
1805                                   planes[PLANES_PER_CRTC - 1], &vc4_crtc_funcs,
1806                                   NULL);
1807         drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs);
1808
1809         /* Update the possible_crtcs mask for the overlay plane(s) */
1810         for (i = 1; i < (PLANES_PER_CRTC - 1); i++)
1811                 planes[i]->possible_crtcs = drm_crtc_mask(crtc);
1812
1813         vc4_encoder = devm_kzalloc(dev, sizeof(*vc4_encoder), GFP_KERNEL);
1814         if (!vc4_encoder)
1815                 return -ENOMEM;
1816         vc4_crtc->encoder = &vc4_encoder->base;
1817
1818         vc4_encoder->display_num = display_ref;
1819         vc4_encoder->base.possible_crtcs |= drm_crtc_mask(crtc);
1820
1821         drm_encoder_init(drm, &vc4_encoder->base, &vc4_fkms_encoder_funcs,
1822                          vc4_crtc->display_type, NULL);
1823         drm_encoder_helper_add(&vc4_encoder->base,
1824                                &vc4_fkms_encoder_helper_funcs);
1825
1826         vc4_crtc->connector = vc4_fkms_connector_init(drm, &vc4_encoder->base,
1827                                                       display_ref);
1828         if (IS_ERR(vc4_crtc->connector)) {
1829                 ret = PTR_ERR(vc4_crtc->connector);
1830                 goto err_destroy_encoder;
1831         }
1832
1833         *ret_crtc = vc4_crtc;
1834
1835         return 0;
1836
1837 err_destroy_encoder:
1838         vc4_fkms_encoder_destroy(vc4_crtc->encoder);
1839         list_for_each_entry_safe(destroy_plane, temp,
1840                                  &drm->mode_config.plane_list, head) {
1841                 if (destroy_plane->possible_crtcs == 1 << drm_crtc_index(crtc))
1842                         destroy_plane->funcs->destroy(destroy_plane);
1843         }
1844 err:
1845         return ret;
1846 }
1847
1848 static int vc4_fkms_bind(struct device *dev, struct device *master, void *data)
1849 {
1850         struct platform_device *pdev = to_platform_device(dev);
1851         struct drm_device *drm = dev_get_drvdata(master);
1852         struct vc4_dev *vc4 = to_vc4_dev(drm);
1853         struct device_node *firmware_node;
1854         const struct of_device_id *match;
1855         struct vc4_crtc **crtc_list;
1856         u32 num_displays, display_num;
1857         struct vc4_fkms *fkms;
1858         int ret;
1859         u32 display_id;
1860
1861         vc4->firmware_kms = true;
1862
1863         fkms = devm_kzalloc(dev, sizeof(*fkms), GFP_KERNEL);
1864         if (!fkms)
1865                 return -ENOMEM;
1866
1867         match = of_match_device(vc4_firmware_kms_dt_match, dev);
1868         if (!match)
1869                 return -ENODEV;
1870         if (match->data)
1871                 fkms->bcm2711 = true;
1872
1873         firmware_node = of_parse_phandle(dev->of_node, "brcm,firmware", 0);
1874         vc4->firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node);
1875         if (!vc4->firmware) {
1876                 DRM_DEBUG("Failed to get Raspberry Pi firmware reference.\n");
1877                 return -EPROBE_DEFER;
1878         }
1879         of_node_put(firmware_node);
1880
1881         ret = rpi_firmware_property(vc4->firmware,
1882                                     RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS,
1883                                     &num_displays, sizeof(u32));
1884
1885         /* If we fail to get the number of displays, then
1886          * assume old firmware that doesn't have the mailbox call, so just
1887          * set one display
1888          */
1889         if (ret) {
1890                 num_displays = 1;
1891                 DRM_WARN("Unable to determine number of displays - assuming 1\n");
1892                 ret = 0;
1893         }
1894
1895         ret = rpi_firmware_property(vc4->firmware,
1896                                     RPI_FIRMWARE_GET_DISPLAY_CFG,
1897                                     &fkms->cfg, sizeof(fkms->cfg));
1898
1899         if (ret)
1900                 return -EINVAL;
1901         /* The firmware works in Hz. This will be compared against kHz, so div
1902          * 1000 now rather than multiple times later.
1903          */
1904         fkms->cfg.max_pixel_clock[0] /= 1000;
1905         fkms->cfg.max_pixel_clock[1] /= 1000;
1906
1907         /* Allocate a list, with space for a NULL on the end */
1908         crtc_list = devm_kzalloc(dev, sizeof(crtc_list) * (num_displays + 1),
1909                                  GFP_KERNEL);
1910         if (!crtc_list)
1911                 return -ENOMEM;
1912
1913         for (display_num = 0; display_num < num_displays; display_num++) {
1914                 display_id = display_num;
1915                 ret = rpi_firmware_property(vc4->firmware,
1916                                             RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_ID,
1917                                             &display_id, sizeof(display_id));
1918                 /* FIXME: Determine the correct error handling here.
1919                  * Should we fail to create the one "screen" but keep the
1920                  * others, or fail the whole thing?
1921                  */
1922                 if (ret)
1923                         DRM_ERROR("Failed to get display id %u\n", display_num);
1924
1925                 ret = vc4_fkms_create_screen(dev, drm, display_num, display_id,
1926                                              &crtc_list[display_num]);
1927                 if (ret)
1928                         DRM_ERROR("Oh dear, failed to create display %u\n",
1929                                   display_num);
1930         }
1931
1932         if (num_displays > 0) {
1933                 /* Map the SMI interrupt reg */
1934                 crtc_list[0]->regs = vc4_ioremap_regs(pdev, 0);
1935                 if (IS_ERR(crtc_list[0]->regs))
1936                         DRM_ERROR("Oh dear, failed to map registers\n");
1937
1938                 writel(0, crtc_list[0]->regs + SMICS);
1939                 ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
1940                                        vc4_crtc_irq_handler, 0,
1941                                        "vc4 firmware kms", crtc_list);
1942                 if (ret)
1943                         DRM_ERROR("Oh dear, failed to register IRQ\n");
1944         } else {
1945                 DRM_WARN("No displays found. Consider forcing hotplug if HDMI is attached\n");
1946         }
1947
1948         vc4->fkms = fkms;
1949
1950         platform_set_drvdata(pdev, crtc_list);
1951
1952         return 0;
1953 }
1954
1955 static void vc4_fkms_unbind(struct device *dev, struct device *master,
1956                             void *data)
1957 {
1958         struct platform_device *pdev = to_platform_device(dev);
1959         struct vc4_crtc **crtc_list = dev_get_drvdata(dev);
1960         int i;
1961
1962         for (i = 0; crtc_list[i]; i++) {
1963                 vc4_fkms_connector_destroy(crtc_list[i]->connector);
1964                 vc4_fkms_encoder_destroy(crtc_list[i]->encoder);
1965                 drm_crtc_cleanup(&crtc_list[i]->base);
1966         }
1967
1968         platform_set_drvdata(pdev, NULL);
1969 }
1970
1971 static const struct component_ops vc4_fkms_ops = {
1972         .bind   = vc4_fkms_bind,
1973         .unbind = vc4_fkms_unbind,
1974 };
1975
1976 static int vc4_fkms_probe(struct platform_device *pdev)
1977 {
1978         return component_add(&pdev->dev, &vc4_fkms_ops);
1979 }
1980
1981 static int vc4_fkms_remove(struct platform_device *pdev)
1982 {
1983         component_del(&pdev->dev, &vc4_fkms_ops);
1984         return 0;
1985 }
1986
1987 struct platform_driver vc4_firmware_kms_driver = {
1988         .probe = vc4_fkms_probe,
1989         .remove = vc4_fkms_remove,
1990         .driver = {
1991                 .name = "vc4_firmware_kms",
1992                 .of_match_table = vc4_firmware_kms_dt_match,
1993         },
1994 };