drivers/gpu/drm/vc4/vc4_dpi.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2016 Broadcom Limited
   4  */
   5
   6 /**
   7  * DOC: VC4 DPI module
   8  *
   9  * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
  10  * signals.  On BCM2835, these can be routed out to GPIO0-27 with the
  11  * ALT2 function.
  12  */
  13
  14 #include <drm/drm_atomic_helper.h>
  15 #include <drm/drm_bridge.h>
  16 #include <drm/drm_drv.h>
  17 #include <drm/drm_edid.h>
  18 #include <drm/drm_of.h>
  19 #include <drm/drm_panel.h>
  20 #include <drm/drm_probe_helper.h>
  21 #include <drm/drm_simple_kms_helper.h>
  22 #include <linux/clk.h>
  23 #include <linux/component.h>
  24 #include <linux/of_graph.h>
  25 #include <linux/of_platform.h>
  26 #include "vc4_drv.h"
  27 #include "vc4_regs.h"
  28
  29 #define DPI_C                   0x00
  30 # define DPI_OUTPUT_ENABLE_MODE         BIT(16)
  31
  32 /* The order field takes the incoming 24 bit RGB from the pixel valve
  33  * and shuffles the 3 channels.
  34  */
  35 # define DPI_ORDER_MASK                 VC4_MASK(15, 14)
  36 # define DPI_ORDER_SHIFT                14
  37 # define DPI_ORDER_RGB                  0
  38 # define DPI_ORDER_BGR                  1
  39 # define DPI_ORDER_GRB                  2
  40 # define DPI_ORDER_BRG                  3
  41
  42 /* The format field takes the ORDER-shuffled pixel valve data and
  43  * formats it onto the output lines.
  44  */
  45 # define DPI_FORMAT_MASK                VC4_MASK(13, 11)
  46 # define DPI_FORMAT_SHIFT               11
  47 /* This define is named in the hardware, but actually just outputs 0. */
  48 # define DPI_FORMAT_9BIT_666_RGB        0
  49 /* Outputs 00000000rrrrrggggggbbbbb */
  50 # define DPI_FORMAT_16BIT_565_RGB_1     1
  51 /* Outputs 000rrrrr00gggggg000bbbbb */
  52 # define DPI_FORMAT_16BIT_565_RGB_2     2
  53 /* Outputs 00rrrrr000gggggg00bbbbb0 */
  54 # define DPI_FORMAT_16BIT_565_RGB_3     3
  55 /* Outputs 000000rrrrrrggggggbbbbbb */
  56 # define DPI_FORMAT_18BIT_666_RGB_1     4
  57 /* Outputs 00rrrrrr00gggggg00bbbbbb */
  58 # define DPI_FORMAT_18BIT_666_RGB_2     5
  59 /* Outputs rrrrrrrrggggggggbbbbbbbb */
  60 # define DPI_FORMAT_24BIT_888_RGB       6
  61
  62 /* Reverses the polarity of the corresponding signal */
  63 # define DPI_PIXEL_CLK_INVERT           BIT(10)
  64 # define DPI_HSYNC_INVERT               BIT(9)
  65 # define DPI_VSYNC_INVERT               BIT(8)
  66 # define DPI_OUTPUT_ENABLE_INVERT       BIT(7)
  67
  68 /* Outputs the signal the falling clock edge instead of rising. */
  69 # define DPI_HSYNC_NEGATE               BIT(6)
  70 # define DPI_VSYNC_NEGATE               BIT(5)
  71 # define DPI_OUTPUT_ENABLE_NEGATE       BIT(4)
  72
  73 /* Disables the signal */
  74 # define DPI_HSYNC_DISABLE              BIT(3)
  75 # define DPI_VSYNC_DISABLE              BIT(2)
  76 # define DPI_OUTPUT_ENABLE_DISABLE      BIT(1)
  77
  78 /* Power gate to the device, full reset at 0 -> 1 transition */
  79 # define DPI_ENABLE                     BIT(0)
  80
  81 /* All other registers besides DPI_C return the ID */
  82 #define DPI_ID                  0x04
  83 # define DPI_ID_VALUE           0x00647069
  84
  85 /* General DPI hardware state. */
  86 struct vc4_dpi {
  87         struct vc4_encoder encoder;
  88
  89         struct platform_device *pdev;
  90
  91         void __iomem *regs;
  92
  93         struct clk *pixel_clock;
  94         struct clk *core_clock;
  95
  96         struct debugfs_regset32 regset;
  97 };
  98
  99 static inline struct vc4_dpi *
 100 to_vc4_dpi(struct drm_encoder *encoder)
 101 {
 102         return container_of(encoder, struct vc4_dpi, encoder.base);
 103 }
 104
 105 #define DPI_READ(offset) readl(dpi->regs + (offset))
 106 #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
 107
 108 static const struct debugfs_reg32 dpi_regs[] = {
 109         VC4_REG32(DPI_C),
 110         VC4_REG32(DPI_ID),
 111 };
 112
 113 static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
 114 {
 115         struct drm_device *dev = encoder->dev;
 116         struct vc4_dpi *dpi = to_vc4_dpi(encoder);
 117         int idx;
 118
 119         if (!drm_dev_enter(dev, &idx))
 120                 return;
 121
 122         clk_disable_unprepare(dpi->pixel_clock);
 123
 124         drm_dev_exit(idx);
 125 }
 126
 127 static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
 128 {
 129         struct drm_device *dev = encoder->dev;
 130         struct drm_display_mode *mode = &encoder->crtc->mode;
 131         struct vc4_dpi *dpi = to_vc4_dpi(encoder);
 132         struct drm_connector_list_iter conn_iter;
 133         struct drm_connector *connector = NULL, *connector_scan;
 134         u32 dpi_c = DPI_ENABLE;
 135         int idx;
 136         int ret;
 137
 138         /* Look up the connector attached to DPI so we can get the
 139          * bus_format.  Ideally the bridge would tell us the
 140          * bus_format we want, but it doesn't yet, so assume that it's
 141          * uniform throughout the bridge chain.
 142          */
 143         drm_connector_list_iter_begin(dev, &conn_iter);
 144         drm_for_each_connector_iter(connector_scan, &conn_iter) {
 145                 if (connector_scan->encoder == encoder) {
 146                         connector = connector_scan;
 147                         break;
 148                 }
 149         }
 150         drm_connector_list_iter_end(&conn_iter);
 151
 152         if (connector) {
 153                 if (connector->display_info.num_bus_formats) {
 154                         u32 bus_format = connector->display_info.bus_formats[0];
 155
 156                         switch (bus_format) {
 157                         case MEDIA_BUS_FMT_RGB888_1X24:
 158                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
 159                                                        DPI_FORMAT);
 160                                 break;
 161                         case MEDIA_BUS_FMT_BGR888_1X24:
 162                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
 163                                                        DPI_FORMAT);
 164                                 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
 165                                                        DPI_ORDER);
 166                                 break;
 167                         case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 168                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
 169                                                        DPI_FORMAT);
 170                                 break;
 171                         case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
 172                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
 173                                                        DPI_FORMAT);
 174                                 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
 175                                                        DPI_ORDER);
 176                                 break;
 177                         default:
 178                                 DRM_ERROR("Unknown media bus format %d\n",
 179                                           bus_format);
 180                                 fallthrough;
 181                         case MEDIA_BUS_FMT_RGB666_1X18:
 182                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
 183                                                        DPI_FORMAT);
 184                                 break;
 185                         case MEDIA_BUS_FMT_BGR666_1X18:
 186                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
 187                                                        DPI_FORMAT);
 188                                 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
 189                                                        DPI_ORDER);
 190                                 break;
 191                         case MEDIA_BUS_FMT_RGB565_1X16:
 192                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
 193                                                        DPI_FORMAT);
 194                                 break;
 195                         case MEDIA_BUS_FMT_RGB565_1X24_CPADHI:
 196                                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2,
 197                                                        DPI_FORMAT);
 198                                 break;
 199                         }
 200                 } else {
 201                         /* Default to 18bit if no connector found. */
 202                         dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
 203                                                DPI_FORMAT);
 204
 205                 }
 206
 207                 if (connector->display_info.bus_flags &
 208                                         DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
 209                         dpi_c |= DPI_PIXEL_CLK_INVERT;
 210
 211                 if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
 212                         dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
 213         } else {
 214                 /* Default to 18bit if no connector found. */
 215                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);
 216         }
 217
 218         if (mode->flags & DRM_MODE_FLAG_CSYNC) {
 219                 if (mode->flags & DRM_MODE_FLAG_NCSYNC)
 220                         dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
 221         } else {
 222                 dpi_c |= DPI_OUTPUT_ENABLE_MODE;
 223
 224                 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 225                         dpi_c |= DPI_HSYNC_INVERT;
 226                 else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
 227                         dpi_c |= DPI_HSYNC_DISABLE;
 228
 229                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 230                         dpi_c |= DPI_VSYNC_INVERT;
 231                 else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
 232                         dpi_c |= DPI_VSYNC_DISABLE;
 233         }
 234
 235         if (!drm_dev_enter(dev, &idx))
 236                 return;
 237
 238         DPI_WRITE(DPI_C, dpi_c);
 239
 240         ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
 241         if (ret)
 242                 DRM_ERROR("Failed to set clock rate: %d\n", ret);
 243
 244         ret = clk_prepare_enable(dpi->pixel_clock);
 245         if (ret)
 246                 DRM_ERROR("Failed to set clock rate: %d\n", ret);
 247
 248         drm_dev_exit(idx);
 249 }
 250
 251 static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
 252                                                        const struct drm_display_mode *mode)
 253 {
 254         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 255                 return MODE_NO_INTERLACE;
 256
 257         return MODE_OK;
 258 }
 259
 260 static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
 261         .disable = vc4_dpi_encoder_disable,
 262         .enable = vc4_dpi_encoder_enable,
 263         .mode_valid = vc4_dpi_encoder_mode_valid,
 264 };
 265
 266 static int vc4_dpi_late_register(struct drm_encoder *encoder)
 267 {
 268         struct drm_device *drm = encoder->dev;
 269         struct vc4_dpi *dpi = to_vc4_dpi(encoder);
 270         int ret;
 271
 272         ret = vc4_debugfs_add_regset32(drm->primary, "dpi_regs", &dpi->regset);
 273         if (ret)
 274                 return ret;
 275
 276         return 0;
 277 }
 278
 279 static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
 280         .late_register = vc4_dpi_late_register,
 281 };
 282
 283 static const struct of_device_id vc4_dpi_dt_match[] = {
 284         { .compatible = "brcm,bcm2835-dpi", .data = NULL },
 285         {}
 286 };
 287
 288 /* Sets up the next link in the display chain, whether it's a panel or
 289  * a bridge.
 290  */
 291 static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
 292 {
 293         struct drm_device *drm = dpi->encoder.base.dev;
 294         struct device *dev = &dpi->pdev->dev;
 295         struct drm_bridge *bridge;
 296
 297         bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0);
 298         if (IS_ERR(bridge)) {
 299                 /* If nothing was connected in the DT, that's not an
 300                  * error.
 301                  */
 302                 if (PTR_ERR(bridge) == -ENODEV)
 303                         return 0;
 304                 else
 305                         return PTR_ERR(bridge);
 306         }
 307
 308         return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0);
 309 }
 310
 311 static void vc4_dpi_disable_clock(void *ptr)
 312 {
 313         struct vc4_dpi *dpi = ptr;
 314
 315         clk_disable_unprepare(dpi->core_clock);
 316 }
 317
 318 static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
 319 {
 320         struct platform_device *pdev = to_platform_device(dev);
 321         struct drm_device *drm = dev_get_drvdata(master);
 322         struct vc4_dpi *dpi;
 323         int ret;
 324
 325         dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL);
 326         if (!dpi)
 327                 return -ENOMEM;
 328
 329         dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
 330         dpi->pdev = pdev;
 331         dpi->regs = vc4_ioremap_regs(pdev, 0);
 332         if (IS_ERR(dpi->regs))
 333                 return PTR_ERR(dpi->regs);
 334         dpi->regset.base = dpi->regs;
 335         dpi->regset.regs = dpi_regs;
 336         dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
 337
 338         if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
 339                 dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
 340                         DPI_READ(DPI_ID), DPI_ID_VALUE);
 341                 return -ENODEV;
 342         }
 343
 344         dpi->core_clock = devm_clk_get(dev, "core");
 345         if (IS_ERR(dpi->core_clock)) {
 346                 ret = PTR_ERR(dpi->core_clock);
 347                 if (ret != -EPROBE_DEFER)
 348                         DRM_ERROR("Failed to get core clock: %d\n", ret);
 349                 return ret;
 350         }
 351
 352         dpi->pixel_clock = devm_clk_get(dev, "pixel");
 353         if (IS_ERR(dpi->pixel_clock)) {
 354                 ret = PTR_ERR(dpi->pixel_clock);
 355                 if (ret != -EPROBE_DEFER)
 356                         DRM_ERROR("Failed to get pixel clock: %d\n", ret);
 357                 return ret;
 358         }
 359
 360         ret = clk_prepare_enable(dpi->core_clock);
 361         if (ret) {
 362                 DRM_ERROR("Failed to turn on core clock: %d\n", ret);
 363                 return ret;
 364         }
 365
 366         ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi);
 367         if (ret)
 368                 return ret;
 369
 370         ret = drmm_encoder_init(drm, &dpi->encoder.base,
 371                                 &vc4_dpi_encoder_funcs,
 372                                 DRM_MODE_ENCODER_DPI,
 373                                 NULL);
 374         if (ret)
 375                 return ret;
 376
 377         drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs);
 378
 379         ret = vc4_dpi_init_bridge(dpi);
 380         if (ret)
 381                 return ret;
 382
 383         dev_set_drvdata(dev, dpi);
 384
 385         return 0;
 386 }
 387
 388 static const struct component_ops vc4_dpi_ops = {
 389         .bind   = vc4_dpi_bind,
 390 };
 391
 392 static int vc4_dpi_dev_probe(struct platform_device *pdev)
 393 {
 394         return component_add(&pdev->dev, &vc4_dpi_ops);
 395 }
 396
 397 static int vc4_dpi_dev_remove(struct platform_device *pdev)
 398 {
 399         component_del(&pdev->dev, &vc4_dpi_ops);
 400         return 0;
 401 }
 402
 403 struct platform_driver vc4_dpi_driver = {
 404         .probe = vc4_dpi_dev_probe,
 405         .remove = vc4_dpi_dev_remove,
 406         .driver = {
 407                 .name = "vc4_dpi",
 408                 .of_match_table = vc4_dpi_dt_match,
 409         },
 410 };