1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Broadcom Limited
9 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
10 * signals. On BCM2835, these can be routed out to GPIO0-27 with the
14 #include <drm/drm_atomic_helper.h>
15 #include <drm/drm_bridge.h>
16 #include <drm/drm_drv.h>
17 #include <drm/drm_edid.h>
18 #include <drm/drm_of.h>
19 #include <drm/drm_panel.h>
20 #include <drm/drm_probe_helper.h>
21 #include <drm/drm_simple_kms_helper.h>
22 #include <linux/clk.h>
23 #include <linux/component.h>
24 #include <linux/media-bus-format.h>
25 #include <linux/of_graph.h>
26 #include <linux/of_platform.h>
31 # define DPI_OUTPUT_ENABLE_MODE BIT(16)
33 /* The order field takes the incoming 24 bit RGB from the pixel valve
34 * and shuffles the 3 channels.
36 # define DPI_ORDER_MASK VC4_MASK(15, 14)
37 # define DPI_ORDER_SHIFT 14
38 # define DPI_ORDER_RGB 0
39 # define DPI_ORDER_BGR 1
40 # define DPI_ORDER_GRB 2
41 # define DPI_ORDER_BRG 3
43 /* The format field takes the ORDER-shuffled pixel valve data and
44 * formats it onto the output lines.
46 # define DPI_FORMAT_MASK VC4_MASK(13, 11)
47 # define DPI_FORMAT_SHIFT 11
48 /* This define is named in the hardware, but actually just outputs 0. */
49 # define DPI_FORMAT_9BIT_666_RGB 0
50 /* Outputs 00000000rrrrrggggggbbbbb */
51 # define DPI_FORMAT_16BIT_565_RGB_1 1
52 /* Outputs 000rrrrr00gggggg000bbbbb */
53 # define DPI_FORMAT_16BIT_565_RGB_2 2
54 /* Outputs 00rrrrr000gggggg00bbbbb0 */
55 # define DPI_FORMAT_16BIT_565_RGB_3 3
56 /* Outputs 000000rrrrrrggggggbbbbbb */
57 # define DPI_FORMAT_18BIT_666_RGB_1 4
58 /* Outputs 00rrrrrr00gggggg00bbbbbb */
59 # define DPI_FORMAT_18BIT_666_RGB_2 5
60 /* Outputs rrrrrrrrggggggggbbbbbbbb */
61 # define DPI_FORMAT_24BIT_888_RGB 6
63 /* Reverses the polarity of the corresponding signal */
64 # define DPI_PIXEL_CLK_INVERT BIT(10)
65 # define DPI_HSYNC_INVERT BIT(9)
66 # define DPI_VSYNC_INVERT BIT(8)
67 # define DPI_OUTPUT_ENABLE_INVERT BIT(7)
69 /* Outputs the signal the falling clock edge instead of rising. */
70 # define DPI_HSYNC_NEGATE BIT(6)
71 # define DPI_VSYNC_NEGATE BIT(5)
72 # define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
74 /* Disables the signal */
75 # define DPI_HSYNC_DISABLE BIT(3)
76 # define DPI_VSYNC_DISABLE BIT(2)
77 # define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
79 /* Power gate to the device, full reset at 0 -> 1 transition */
80 # define DPI_ENABLE BIT(0)
82 /* All other registers besides DPI_C return the ID */
84 # define DPI_ID_VALUE 0x00647069
86 /* General DPI hardware state. */
88 struct vc4_encoder encoder;
90 struct platform_device *pdev;
94 struct clk *pixel_clock;
95 struct clk *core_clock;
97 struct debugfs_regset32 regset;
100 static inline struct vc4_dpi *
101 to_vc4_dpi(struct drm_encoder *encoder)
103 return container_of(encoder, struct vc4_dpi, encoder.base);
106 #define DPI_READ(offset) readl(dpi->regs + (offset))
107 #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
109 static const struct debugfs_reg32 dpi_regs[] = {
114 static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
116 struct drm_device *dev = encoder->dev;
117 struct vc4_dpi *dpi = to_vc4_dpi(encoder);
120 if (!drm_dev_enter(dev, &idx))
123 clk_disable_unprepare(dpi->pixel_clock);
128 static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
130 struct drm_device *dev = encoder->dev;
131 struct drm_display_mode *mode = &encoder->crtc->mode;
132 struct vc4_dpi *dpi = to_vc4_dpi(encoder);
133 struct drm_connector_list_iter conn_iter;
134 struct drm_connector *connector = NULL, *connector_scan;
135 u32 dpi_c = DPI_ENABLE;
139 /* Look up the connector attached to DPI so we can get the
140 * bus_format. Ideally the bridge would tell us the
141 * bus_format we want, but it doesn't yet, so assume that it's
142 * uniform throughout the bridge chain.
144 drm_connector_list_iter_begin(dev, &conn_iter);
145 drm_for_each_connector_iter(connector_scan, &conn_iter) {
146 if (connector_scan->encoder == encoder) {
147 connector = connector_scan;
151 drm_connector_list_iter_end(&conn_iter);
153 /* Default to 24bit if no connector or format found. */
154 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
157 if (connector->display_info.num_bus_formats) {
158 u32 bus_format = connector->display_info.bus_formats[0];
160 dpi_c &= ~DPI_FORMAT_MASK;
162 switch (bus_format) {
163 case MEDIA_BUS_FMT_RGB888_1X24:
164 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
167 case MEDIA_BUS_FMT_BGR888_1X24:
168 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
170 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
173 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
174 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
177 case MEDIA_BUS_FMT_RGB666_1X18:
178 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
181 case MEDIA_BUS_FMT_RGB565_1X16:
182 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
186 DRM_ERROR("Unknown media bus format %d\n",
192 if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
193 dpi_c |= DPI_PIXEL_CLK_INVERT;
195 if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
196 dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
199 if (mode->flags & DRM_MODE_FLAG_CSYNC) {
200 if (mode->flags & DRM_MODE_FLAG_NCSYNC)
201 dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
203 dpi_c |= DPI_OUTPUT_ENABLE_MODE;
205 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
206 dpi_c |= DPI_HSYNC_INVERT;
207 else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
208 dpi_c |= DPI_HSYNC_DISABLE;
210 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
211 dpi_c |= DPI_VSYNC_INVERT;
212 else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
213 dpi_c |= DPI_VSYNC_DISABLE;
216 if (!drm_dev_enter(dev, &idx))
219 DPI_WRITE(DPI_C, dpi_c);
221 ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
223 DRM_ERROR("Failed to set clock rate: %d\n", ret);
225 ret = clk_prepare_enable(dpi->pixel_clock);
227 DRM_ERROR("Failed to set clock rate: %d\n", ret);
232 static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
233 const struct drm_display_mode *mode)
235 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
236 return MODE_NO_INTERLACE;
241 static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
242 .disable = vc4_dpi_encoder_disable,
243 .enable = vc4_dpi_encoder_enable,
244 .mode_valid = vc4_dpi_encoder_mode_valid,
247 static const struct of_device_id vc4_dpi_dt_match[] = {
248 { .compatible = "brcm,bcm2835-dpi", .data = NULL },
252 /* Sets up the next link in the display chain, whether it's a panel or
255 static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
257 struct drm_device *drm = dpi->encoder.base.dev;
258 struct device *dev = &dpi->pdev->dev;
259 struct drm_bridge *bridge;
261 bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0);
262 if (IS_ERR(bridge)) {
263 /* If nothing was connected in the DT, that's not an
266 if (PTR_ERR(bridge) == -ENODEV)
269 return PTR_ERR(bridge);
272 return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0);
275 static void vc4_dpi_disable_clock(void *ptr)
277 struct vc4_dpi *dpi = ptr;
279 clk_disable_unprepare(dpi->core_clock);
282 static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
284 struct platform_device *pdev = to_platform_device(dev);
285 struct drm_device *drm = dev_get_drvdata(master);
289 dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL);
293 dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
295 dpi->regs = vc4_ioremap_regs(pdev, 0);
296 if (IS_ERR(dpi->regs))
297 return PTR_ERR(dpi->regs);
298 dpi->regset.base = dpi->regs;
299 dpi->regset.regs = dpi_regs;
300 dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
302 if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
303 dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
304 DPI_READ(DPI_ID), DPI_ID_VALUE);
308 dpi->core_clock = devm_clk_get(dev, "core");
309 if (IS_ERR(dpi->core_clock)) {
310 ret = PTR_ERR(dpi->core_clock);
311 if (ret != -EPROBE_DEFER)
312 DRM_ERROR("Failed to get core clock: %d\n", ret);
316 dpi->pixel_clock = devm_clk_get(dev, "pixel");
317 if (IS_ERR(dpi->pixel_clock)) {
318 ret = PTR_ERR(dpi->pixel_clock);
319 if (ret != -EPROBE_DEFER)
320 DRM_ERROR("Failed to get pixel clock: %d\n", ret);
324 ret = clk_prepare_enable(dpi->core_clock);
326 DRM_ERROR("Failed to turn on core clock: %d\n", ret);
330 ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi);
334 ret = drmm_encoder_init(drm, &dpi->encoder.base,
336 DRM_MODE_ENCODER_DPI,
341 drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs);
343 ret = vc4_dpi_init_bridge(dpi);
347 dev_set_drvdata(dev, dpi);
349 vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
354 static const struct component_ops vc4_dpi_ops = {
355 .bind = vc4_dpi_bind,
358 static int vc4_dpi_dev_probe(struct platform_device *pdev)
360 return component_add(&pdev->dev, &vc4_dpi_ops);
363 static int vc4_dpi_dev_remove(struct platform_device *pdev)
365 component_del(&pdev->dev, &vc4_dpi_ops);
369 struct platform_driver vc4_dpi_driver = {
370 .probe = vc4_dpi_dev_probe,
371 .remove = vc4_dpi_dev_remove,
374 .of_match_table = vc4_dpi_dt_match,