1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Broadcom Limited
9 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
10 * signals. On BCM2835, these can be routed out to GPIO0-27 with the
14 #include <drm/drm_atomic_helper.h>
15 #include <drm/drm_bridge.h>
16 #include <drm/drm_edid.h>
17 #include <drm/drm_of.h>
18 #include <drm/drm_panel.h>
19 #include <drm/drm_probe_helper.h>
20 #include <drm/drm_simple_kms_helper.h>
21 #include <linux/clk.h>
22 #include <linux/component.h>
23 #include <linux/of_graph.h>
24 #include <linux/of_platform.h>
29 # define DPI_OUTPUT_ENABLE_MODE BIT(16)
31 /* The order field takes the incoming 24 bit RGB from the pixel valve
32 * and shuffles the 3 channels.
34 # define DPI_ORDER_MASK VC4_MASK(15, 14)
35 # define DPI_ORDER_SHIFT 14
36 # define DPI_ORDER_RGB 0
37 # define DPI_ORDER_BGR 1
38 # define DPI_ORDER_GRB 2
39 # define DPI_ORDER_BRG 3
41 /* The format field takes the ORDER-shuffled pixel valve data and
42 * formats it onto the output lines.
44 # define DPI_FORMAT_MASK VC4_MASK(13, 11)
45 # define DPI_FORMAT_SHIFT 11
46 /* This define is named in the hardware, but actually just outputs 0. */
47 # define DPI_FORMAT_9BIT_666_RGB 0
48 /* Outputs 00000000rrrrrggggggbbbbb */
49 # define DPI_FORMAT_16BIT_565_RGB_1 1
50 /* Outputs 000rrrrr00gggggg000bbbbb */
51 # define DPI_FORMAT_16BIT_565_RGB_2 2
52 /* Outputs 00rrrrr000gggggg00bbbbb0 */
53 # define DPI_FORMAT_16BIT_565_RGB_3 3
54 /* Outputs 000000rrrrrrggggggbbbbbb */
55 # define DPI_FORMAT_18BIT_666_RGB_1 4
56 /* Outputs 00rrrrrr00gggggg00bbbbbb */
57 # define DPI_FORMAT_18BIT_666_RGB_2 5
58 /* Outputs rrrrrrrrggggggggbbbbbbbb */
59 # define DPI_FORMAT_24BIT_888_RGB 6
61 /* Reverses the polarity of the corresponding signal */
62 # define DPI_PIXEL_CLK_INVERT BIT(10)
63 # define DPI_HSYNC_INVERT BIT(9)
64 # define DPI_VSYNC_INVERT BIT(8)
65 # define DPI_OUTPUT_ENABLE_INVERT BIT(7)
67 /* Outputs the signal the falling clock edge instead of rising. */
68 # define DPI_HSYNC_NEGATE BIT(6)
69 # define DPI_VSYNC_NEGATE BIT(5)
70 # define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
72 /* Disables the signal */
73 # define DPI_HSYNC_DISABLE BIT(3)
74 # define DPI_VSYNC_DISABLE BIT(2)
75 # define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
77 /* Power gate to the device, full reset at 0 -> 1 transition */
78 # define DPI_ENABLE BIT(0)
80 /* All other registers besides DPI_C return the ID */
82 # define DPI_ID_VALUE 0x00647069
84 /* General DPI hardware state. */
86 struct platform_device *pdev;
88 struct drm_encoder *encoder;
92 struct clk *pixel_clock;
93 struct clk *core_clock;
95 struct debugfs_regset32 regset;
98 #define DPI_READ(offset) readl(dpi->regs + (offset))
99 #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
101 /* VC4 DPI encoder KMS struct */
102 struct vc4_dpi_encoder {
103 struct vc4_encoder base;
107 static inline struct vc4_dpi_encoder *
108 to_vc4_dpi_encoder(struct drm_encoder *encoder)
110 return container_of(encoder, struct vc4_dpi_encoder, base.base);
113 static const struct debugfs_reg32 dpi_regs[] = {
118 static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
120 struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
121 struct vc4_dpi *dpi = vc4_encoder->dpi;
123 clk_disable_unprepare(dpi->pixel_clock);
126 static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
128 struct drm_device *dev = encoder->dev;
129 struct drm_display_mode *mode = &encoder->crtc->mode;
130 struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
131 struct vc4_dpi *dpi = vc4_encoder->dpi;
132 struct drm_connector_list_iter conn_iter;
133 struct drm_connector *connector = NULL, *connector_scan;
134 u32 dpi_c = DPI_ENABLE;
137 /* Look up the connector attached to DPI so we can get the
138 * bus_format. Ideally the bridge would tell us the
139 * bus_format we want, but it doesn't yet, so assume that it's
140 * uniform throughout the bridge chain.
142 drm_connector_list_iter_begin(dev, &conn_iter);
143 drm_for_each_connector_iter(connector_scan, &conn_iter) {
144 if (connector_scan->encoder == encoder) {
145 connector = connector_scan;
149 drm_connector_list_iter_end(&conn_iter);
152 if (connector->display_info.num_bus_formats) {
153 u32 bus_format = connector->display_info.bus_formats[0];
155 switch (bus_format) {
156 case MEDIA_BUS_FMT_RGB888_1X24:
157 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
160 case MEDIA_BUS_FMT_BGR888_1X24:
161 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
163 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
166 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
167 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
170 case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
171 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
173 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
177 DRM_ERROR("Unknown media bus format %d\n",
180 case MEDIA_BUS_FMT_RGB666_1X18:
181 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
184 case MEDIA_BUS_FMT_BGR666_1X18:
185 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
187 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
190 case MEDIA_BUS_FMT_RGB565_1X16:
191 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
194 case MEDIA_BUS_FMT_RGB565_1X24_CPADHI:
195 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2,
200 /* Default to 18bit if no connector found. */
201 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
206 if (connector->display_info.bus_flags &
207 DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
208 dpi_c |= DPI_PIXEL_CLK_INVERT;
210 if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
211 dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
213 /* Default to 18bit if no connector found. */
214 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);
217 if (mode->flags & DRM_MODE_FLAG_CSYNC) {
218 if (mode->flags & DRM_MODE_FLAG_NCSYNC)
219 dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
221 dpi_c |= DPI_OUTPUT_ENABLE_MODE;
223 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
224 dpi_c |= DPI_HSYNC_INVERT;
225 else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
226 dpi_c |= DPI_HSYNC_DISABLE;
228 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
229 dpi_c |= DPI_VSYNC_INVERT;
230 else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
231 dpi_c |= DPI_VSYNC_DISABLE;
234 DPI_WRITE(DPI_C, dpi_c);
236 ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
238 DRM_ERROR("Failed to set clock rate: %d\n", ret);
240 ret = clk_prepare_enable(dpi->pixel_clock);
242 DRM_ERROR("Failed to set clock rate: %d\n", ret);
245 static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
246 const struct drm_display_mode *mode)
248 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
249 return MODE_NO_INTERLACE;
254 static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
255 .disable = vc4_dpi_encoder_disable,
256 .enable = vc4_dpi_encoder_enable,
257 .mode_valid = vc4_dpi_encoder_mode_valid,
260 static const struct of_device_id vc4_dpi_dt_match[] = {
261 { .compatible = "brcm,bcm2835-dpi", .data = NULL },
265 /* Sets up the next link in the display chain, whether it's a panel or
268 static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
270 struct device *dev = &dpi->pdev->dev;
271 struct drm_panel *panel;
272 struct drm_bridge *bridge;
275 ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
278 /* If nothing was connected in the DT, that's not an
288 bridge = drm_panel_bridge_add_typed(panel,
289 DRM_MODE_CONNECTOR_DPI);
291 return drm_bridge_attach(dpi->encoder, bridge, NULL, 0);
294 static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
296 struct platform_device *pdev = to_platform_device(dev);
297 struct drm_device *drm = dev_get_drvdata(master);
298 struct vc4_dev *vc4 = to_vc4_dev(drm);
300 struct vc4_dpi_encoder *vc4_dpi_encoder;
303 dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
307 vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
309 if (!vc4_dpi_encoder)
311 vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
312 vc4_dpi_encoder->dpi = dpi;
313 dpi->encoder = &vc4_dpi_encoder->base.base;
316 dpi->regs = vc4_ioremap_regs(pdev, 0);
317 if (IS_ERR(dpi->regs))
318 return PTR_ERR(dpi->regs);
319 dpi->regset.base = dpi->regs;
320 dpi->regset.regs = dpi_regs;
321 dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
323 if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
324 dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
325 DPI_READ(DPI_ID), DPI_ID_VALUE);
329 dpi->core_clock = devm_clk_get(dev, "core");
330 if (IS_ERR(dpi->core_clock)) {
331 ret = PTR_ERR(dpi->core_clock);
332 if (ret != -EPROBE_DEFER)
333 DRM_ERROR("Failed to get core clock: %d\n", ret);
336 dpi->pixel_clock = devm_clk_get(dev, "pixel");
337 if (IS_ERR(dpi->pixel_clock)) {
338 ret = PTR_ERR(dpi->pixel_clock);
339 if (ret != -EPROBE_DEFER)
340 DRM_ERROR("Failed to get pixel clock: %d\n", ret);
344 ret = clk_prepare_enable(dpi->core_clock);
346 DRM_ERROR("Failed to turn on core clock: %d\n", ret);
348 drm_simple_encoder_init(drm, dpi->encoder, DRM_MODE_ENCODER_DPI);
349 drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
351 ret = vc4_dpi_init_bridge(dpi);
353 goto err_destroy_encoder;
355 dev_set_drvdata(dev, dpi);
359 vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
364 drm_encoder_cleanup(dpi->encoder);
365 clk_disable_unprepare(dpi->core_clock);
369 static void vc4_dpi_unbind(struct device *dev, struct device *master,
372 struct drm_device *drm = dev_get_drvdata(master);
373 struct vc4_dev *vc4 = to_vc4_dev(drm);
374 struct vc4_dpi *dpi = dev_get_drvdata(dev);
376 drm_of_panel_bridge_remove(dev->of_node, 0, 0);
378 drm_encoder_cleanup(dpi->encoder);
380 clk_disable_unprepare(dpi->core_clock);
385 static const struct component_ops vc4_dpi_ops = {
386 .bind = vc4_dpi_bind,
387 .unbind = vc4_dpi_unbind,
390 static int vc4_dpi_dev_probe(struct platform_device *pdev)
392 return component_add(&pdev->dev, &vc4_dpi_ops);
395 static int vc4_dpi_dev_remove(struct platform_device *pdev)
397 component_del(&pdev->dev, &vc4_dpi_ops);
401 struct platform_driver vc4_dpi_driver = {
402 .probe = vc4_dpi_dev_probe,
403 .remove = vc4_dpi_dev_remove,
406 .of_match_table = vc4_dpi_dt_match,