drivers/gpu/drm/v3d/v3d_gem.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /* Copyright (C) 2014-2018 Broadcom */
   3
   4 #include <linux/device.h>
   5 #include <linux/dma-mapping.h>
   6 #include <linux/io.h>
   7 #include <linux/clk.h>
   8 #include <linux/module.h>
   9 #include <linux/platform_device.h>
  10 #include <linux/pm_runtime.h>
  11 #include <linux/reset.h>
  12 #include <linux/sched/signal.h>
  13 #include <linux/uaccess.h>
  14
  15 #include <drm/drm_syncobj.h>
  16 #include <uapi/drm/v3d_drm.h>
  17
  18 #include "v3d_drv.h"
  19 #include "v3d_regs.h"
  20 #include "v3d_trace.h"
  21
  22 static void
  23 v3d_clock_down_work(struct work_struct *work)
  24 {
  25         struct v3d_dev *v3d =
  26                 container_of(work, struct v3d_dev, clk_down_work.work);
  27         int ret;
  28
  29         ret = clk_set_min_rate(v3d->clk, v3d->clk_down_rate);
  30         v3d->clk_up = false;
  31         WARN_ON_ONCE(ret != 0);
  32 }
  33
  34 static void
  35 v3d_clock_up_get(struct v3d_dev *v3d)
  36 {
  37         mutex_lock(&v3d->clk_lock);
  38         if (v3d->clk_refcount++ == 0) {
  39                 cancel_delayed_work_sync(&v3d->clk_down_work);
  40                 if (!v3d->clk_up)  {
  41                         int ret;
  42
  43                         ret = clk_set_min_rate(v3d->clk, v3d->clk_up_rate);
  44                         WARN_ON_ONCE(ret != 0);
  45                         v3d->clk_up = true;
  46                 }
  47         }
  48         mutex_unlock(&v3d->clk_lock);
  49 }
  50
  51 static void
  52 v3d_clock_up_put(struct v3d_dev *v3d)
  53 {
  54         mutex_lock(&v3d->clk_lock);
  55         if (--v3d->clk_refcount == 0) {
  56                 schedule_delayed_work(&v3d->clk_down_work,
  57                                       msecs_to_jiffies(100));
  58         }
  59         mutex_unlock(&v3d->clk_lock);
  60 }
  61
  62
  63 static void
  64 v3d_init_core(struct v3d_dev *v3d, int core)
  65 {
  66         /* Set OVRTMUOUT, which means that the texture sampler uniform
  67          * configuration's tmu output type field is used, instead of
  68          * using the hardware default behavior based on the texture
  69          * type.  If you want the default behavior, you can still put
  70          * "2" in the indirect texture state's output_type field.
  71          */
  72         if (v3d->ver < 40)
  73                 V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
  74
  75         /* Whenever we flush the L2T cache, we always want to flush
  76          * the whole thing.
  77          */
  78         V3D_CORE_WRITE(core, V3D_CTL_L2TFLSTA, 0);
  79         V3D_CORE_WRITE(core, V3D_CTL_L2TFLEND, ~0);
  80 }
  81
  82 /* Sets invariant state for the HW. */
  83 static void
  84 v3d_init_hw_state(struct v3d_dev *v3d)
  85 {
  86         v3d_init_core(v3d, 0);
  87 }
  88
  89 static void
  90 v3d_idle_axi(struct v3d_dev *v3d, int core)
  91 {
  92         V3D_CORE_WRITE(core, V3D_GMP_CFG, V3D_GMP_CFG_STOP_REQ);
  93
  94         if (wait_for((V3D_CORE_READ(core, V3D_GMP_STATUS) &
  95                       (V3D_GMP_STATUS_RD_COUNT_MASK |
  96                        V3D_GMP_STATUS_WR_COUNT_MASK |
  97                        V3D_GMP_STATUS_CFG_BUSY)) == 0, 100)) {
  98                 DRM_ERROR("Failed to wait for safe GMP shutdown\n");
  99         }
 100 }
 101
 102 static void
 103 v3d_idle_gca(struct v3d_dev *v3d)
 104 {
 105         if (v3d->ver >= 41)
 106                 return;
 107
 108         V3D_GCA_WRITE(V3D_GCA_SAFE_SHUTDOWN, V3D_GCA_SAFE_SHUTDOWN_EN);
 109
 110         if (wait_for((V3D_GCA_READ(V3D_GCA_SAFE_SHUTDOWN_ACK) &
 111                       V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED) ==
 112                      V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED, 100)) {
 113                 DRM_ERROR("Failed to wait for safe GCA shutdown\n");
 114         }
 115 }
 116
 117 static void
 118 v3d_reset_by_bridge(struct v3d_dev *v3d)
 119 {
 120         int version = V3D_BRIDGE_READ(V3D_TOP_GR_BRIDGE_REVISION);
 121
 122         if (V3D_GET_FIELD(version, V3D_TOP_GR_BRIDGE_MAJOR) == 2) {
 123                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0,
 124                                  V3D_TOP_GR_BRIDGE_SW_INIT_0_V3D_CLK_108_SW_INIT);
 125                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0, 0);
 126
 127                 /* GFXH-1383: The SW_INIT may cause a stray write to address 0
 128                  * of the unit, so reset it to its power-on value here.
 129                  */
 130                 V3D_WRITE(V3D_HUB_AXICFG, V3D_HUB_AXICFG_MAX_LEN_MASK);
 131         } else {
 132                 WARN_ON_ONCE(V3D_GET_FIELD(version,
 133                                            V3D_TOP_GR_BRIDGE_MAJOR) != 7);
 134                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1,
 135                                  V3D_TOP_GR_BRIDGE_SW_INIT_1_V3D_CLK_108_SW_INIT);
 136                 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1, 0);
 137         }
 138 }
 139
 140 static void
 141 v3d_reset_v3d(struct v3d_dev *v3d)
 142 {
 143         if (v3d->reset)
 144                 reset_control_reset(v3d->reset);
 145         else
 146                 v3d_reset_by_bridge(v3d);
 147
 148         v3d_init_hw_state(v3d);
 149 }
 150
 151 void
 152 v3d_reset(struct v3d_dev *v3d)
 153 {
 154         struct drm_device *dev = &v3d->drm;
 155
 156         DRM_DEV_ERROR(dev->dev, "Resetting GPU for hang.\n");
 157         DRM_DEV_ERROR(dev->dev, "V3D_ERR_STAT: 0x%08x\n",
 158                       V3D_CORE_READ(0, V3D_ERR_STAT));
 159         trace_v3d_reset_begin(dev);
 160
 161         /* XXX: only needed for safe powerdown, not reset. */
 162         if (false)
 163                 v3d_idle_axi(v3d, 0);
 164
 165         v3d_idle_gca(v3d);
 166         v3d_reset_v3d(v3d);
 167
 168         v3d_mmu_set_page_table(v3d);
 169         v3d_irq_reset(v3d);
 170
 171         v3d_perfmon_stop(v3d, v3d->active_perfmon, false);
 172
 173         trace_v3d_reset_end(dev);
 174 }
 175
 176 static void
 177 v3d_flush_l3(struct v3d_dev *v3d)
 178 {
 179         if (v3d->ver < 41) {
 180                 u32 gca_ctrl = V3D_GCA_READ(V3D_GCA_CACHE_CTRL);
 181
 182                 V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
 183                               gca_ctrl | V3D_GCA_CACHE_CTRL_FLUSH);
 184
 185                 if (v3d->ver < 33) {
 186                         V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
 187                                       gca_ctrl & ~V3D_GCA_CACHE_CTRL_FLUSH);
 188                 }
 189         }
 190 }
 191
 192 /* Invalidates the (read-only) L2C cache.  This was the L2 cache for
 193  * uniforms and instructions on V3D 3.2.
 194  */
 195 static void
 196 v3d_invalidate_l2c(struct v3d_dev *v3d, int core)
 197 {
 198         if (v3d->ver > 32)
 199                 return;
 200
 201         V3D_CORE_WRITE(core, V3D_CTL_L2CACTL,
 202                        V3D_L2CACTL_L2CCLR |
 203                        V3D_L2CACTL_L2CENA);
 204 }
 205
 206 /* Invalidates texture L2 cachelines */
 207 static void
 208 v3d_flush_l2t(struct v3d_dev *v3d, int core)
 209 {
 210         /* While there is a busy bit (V3D_L2TCACTL_L2TFLS), we don't
 211          * need to wait for completion before dispatching the job --
 212          * L2T accesses will be stalled until the flush has completed.
 213          * However, we do need to make sure we don't try to trigger a
 214          * new flush while the L2_CLEAN queue is trying to
 215          * synchronously clean after a job.
 216          */
 217         mutex_lock(&v3d->cache_clean_lock);
 218         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
 219                        V3D_L2TCACTL_L2TFLS |
 220                        V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM));
 221         mutex_unlock(&v3d->cache_clean_lock);
 222 }
 223
 224 /* Cleans texture L1 and L2 cachelines (writing back dirty data).
 225  *
 226  * For cleaning, which happens from the CACHE_CLEAN queue after CSD has
 227  * executed, we need to make sure that the clean is done before
 228  * signaling job completion.  So, we synchronously wait before
 229  * returning, and we make sure that L2 invalidates don't happen in the
 230  * meantime to confuse our are-we-done checks.
 231  */
 232 void
 233 v3d_clean_caches(struct v3d_dev *v3d)
 234 {
 235         struct drm_device *dev = &v3d->drm;
 236         int core = 0;
 237
 238         trace_v3d_cache_clean_begin(dev);
 239
 240         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF);
 241         if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
 242                        V3D_L2TCACTL_TMUWCF), 100)) {
 243                 DRM_ERROR("Timeout waiting for TMU write combiner flush\n");
 244         }
 245
 246         mutex_lock(&v3d->cache_clean_lock);
 247         V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
 248                        V3D_L2TCACTL_L2TFLS |
 249                        V3D_SET_FIELD(V3D_L2TCACTL_FLM_CLEAN, V3D_L2TCACTL_FLM));
 250
 251         if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
 252                        V3D_L2TCACTL_L2TFLS), 100)) {
 253                 DRM_ERROR("Timeout waiting for L2T clean\n");
 254         }
 255
 256         mutex_unlock(&v3d->cache_clean_lock);
 257
 258         trace_v3d_cache_clean_end(dev);
 259 }
 260
 261 /* Invalidates the slice caches.  These are read-only caches. */
 262 static void
 263 v3d_invalidate_slices(struct v3d_dev *v3d, int core)
 264 {
 265         V3D_CORE_WRITE(core, V3D_CTL_SLCACTL,
 266                        V3D_SET_FIELD(0xf, V3D_SLCACTL_TVCCS) |
 267                        V3D_SET_FIELD(0xf, V3D_SLCACTL_TDCCS) |
 268                        V3D_SET_FIELD(0xf, V3D_SLCACTL_UCC) |
 269                        V3D_SET_FIELD(0xf, V3D_SLCACTL_ICC));
 270 }
 271
 272 void
 273 v3d_invalidate_caches(struct v3d_dev *v3d)
 274 {
 275         /* Invalidate the caches from the outside in.  That way if
 276          * another CL's concurrent use of nearby memory were to pull
 277          * an invalidated cacheline back in, we wouldn't leave stale
 278          * data in the inner cache.
 279          */
 280         v3d_flush_l3(v3d);
 281         v3d_invalidate_l2c(v3d, 0);
 282         v3d_flush_l2t(v3d, 0);
 283         v3d_invalidate_slices(v3d, 0);
 284 }
 285
 286 /* Takes the reservation lock on all the BOs being referenced, so that
 287  * at queue submit time we can update the reservations.
 288  *
 289  * We don't lock the RCL the tile alloc/state BOs, or overflow memory
 290  * (all of which are on exec->unref_list).  They're entirely private
 291  * to v3d, so we don't attach dma-buf fences to them.
 292  */
 293 static int
 294 v3d_lock_bo_reservations(struct v3d_job *job,
 295                          struct ww_acquire_ctx *acquire_ctx)
 296 {
 297         int i, ret;
 298
 299         ret = drm_gem_lock_reservations(job->bo, job->bo_count, acquire_ctx);
 300         if (ret)
 301                 return ret;
 302
 303         for (i = 0; i < job->bo_count; i++) {
 304                 ret = drm_gem_fence_array_add_implicit(&job->deps,
 305                                                        job->bo[i], true);
 306                 if (ret) {
 307                         drm_gem_unlock_reservations(job->bo, job->bo_count,
 308                                                     acquire_ctx);
 309                         return ret;
 310                 }
 311         }
 312
 313         return 0;
 314 }
 315
 316 /**
 317  * v3d_lookup_bos() - Sets up job->bo[] with the GEM objects
 318  * referenced by the job.
 319  * @dev: DRM device
 320  * @file_priv: DRM file for this fd
 321  * @job: V3D job being set up
 322  * @bo_handles: GEM handles
 323  * @bo_count: Number of GEM handles passed in
 324  *
 325  * The command validator needs to reference BOs by their index within
 326  * the submitted job's BO list.  This does the validation of the job's
 327  * BO list and reference counting for the lifetime of the job.
 328  *
 329  * Note that this function doesn't need to unreference the BOs on
 330  * failure, because that will happen at v3d_exec_cleanup() time.
 331  */
 332 static int
 333 v3d_lookup_bos(struct drm_device *dev,
 334                struct drm_file *file_priv,
 335                struct v3d_job *job,
 336                u64 bo_handles,
 337                u32 bo_count)
 338 {
 339         u32 *handles;
 340         int ret = 0;
 341         int i;
 342
 343         job->bo_count = bo_count;
 344
 345         if (!job->bo_count) {
 346                 /* See comment on bo_index for why we have to check
 347                  * this.
 348                  */
 349                 DRM_DEBUG("Rendering requires BOs\n");
 350                 return -EINVAL;
 351         }
 352
 353         job->bo = kvmalloc_array(job->bo_count,
 354                                  sizeof(struct drm_gem_cma_object *),
 355                                  GFP_KERNEL | __GFP_ZERO);
 356         if (!job->bo) {
 357                 DRM_DEBUG("Failed to allocate validated BO pointers\n");
 358                 return -ENOMEM;
 359         }
 360
 361         handles = kvmalloc_array(job->bo_count, sizeof(u32), GFP_KERNEL);
 362         if (!handles) {
 363                 ret = -ENOMEM;
 364                 DRM_DEBUG("Failed to allocate incoming GEM handles\n");
 365                 goto fail;
 366         }
 367
 368         if (copy_from_user(handles,
 369                            (void __user *)(uintptr_t)bo_handles,
 370                            job->bo_count * sizeof(u32))) {
 371                 ret = -EFAULT;
 372                 DRM_DEBUG("Failed to copy in GEM handles\n");
 373                 goto fail;
 374         }
 375
 376         spin_lock(&file_priv->table_lock);
 377         for (i = 0; i < job->bo_count; i++) {
 378                 struct drm_gem_object *bo = idr_find(&file_priv->object_idr,
 379                                                      handles[i]);
 380                 if (!bo) {
 381                         DRM_DEBUG("Failed to look up GEM BO %d: %d\n",
 382                                   i, handles[i]);
 383                         ret = -ENOENT;
 384                         spin_unlock(&file_priv->table_lock);
 385                         goto fail;
 386                 }
 387                 drm_gem_object_get(bo);
 388                 job->bo[i] = bo;
 389         }
 390         spin_unlock(&file_priv->table_lock);
 391
 392 fail:
 393         kvfree(handles);
 394         return ret;
 395 }
 396
 397 static void
 398 v3d_job_free(struct kref *ref)
 399 {
 400         struct v3d_job *job = container_of(ref, struct v3d_job, refcount);
 401         unsigned long index;
 402         struct dma_fence *fence;
 403         struct v3d_dev *v3d = job->v3d;
 404         int i;
 405
 406         for (i = 0; i < job->bo_count; i++) {
 407                 if (job->bo[i])
 408                         drm_gem_object_put(job->bo[i]);
 409         }
 410         kvfree(job->bo);
 411
 412         xa_for_each(&job->deps, index, fence) {
 413                 dma_fence_put(fence);
 414         }
 415         xa_destroy(&job->deps);
 416
 417         dma_fence_put(job->irq_fence);
 418         dma_fence_put(job->done_fence);
 419
 420         v3d_clock_up_put(v3d);
 421
 422         if (job->perfmon)
 423                 v3d_perfmon_put(job->perfmon);
 424
 425         kfree(job);
 426 }
 427
 428 static void
 429 v3d_render_job_free(struct kref *ref)
 430 {
 431         struct v3d_render_job *job = container_of(ref, struct v3d_render_job,
 432                                                   base.refcount);
 433         struct v3d_bo *bo, *save;
 434
 435         list_for_each_entry_safe(bo, save, &job->unref_list, unref_head) {
 436                 drm_gem_object_put(&bo->base.base);
 437         }
 438
 439         v3d_job_free(ref);
 440 }
 441
 442 void v3d_job_put(struct v3d_job *job)
 443 {
 444         kref_put(&job->refcount, job->free);
 445 }
 446
 447 int
 448 v3d_wait_bo_ioctl(struct drm_device *dev, void *data,
 449                   struct drm_file *file_priv)
 450 {
 451         int ret;
 452         struct drm_v3d_wait_bo *args = data;
 453         ktime_t start = ktime_get();
 454         u64 delta_ns;
 455         unsigned long timeout_jiffies =
 456                 nsecs_to_jiffies_timeout(args->timeout_ns);
 457
 458         if (args->pad != 0)
 459                 return -EINVAL;
 460
 461         ret = drm_gem_dma_resv_wait(file_priv, args->handle,
 462                                               true, timeout_jiffies);
 463
 464         /* Decrement the user's timeout, in case we got interrupted
 465          * such that the ioctl will be restarted.
 466          */
 467         delta_ns = ktime_to_ns(ktime_sub(ktime_get(), start));
 468         if (delta_ns < args->timeout_ns)
 469                 args->timeout_ns -= delta_ns;
 470         else
 471                 args->timeout_ns = 0;
 472
 473         /* Asked to wait beyond the jiffie/scheduler precision? */
 474         if (ret == -ETIME && args->timeout_ns)
 475                 ret = -EAGAIN;
 476
 477         return ret;
 478 }
 479
 480 static int
 481 v3d_job_init(struct v3d_dev *v3d, struct drm_file *file_priv,
 482              struct v3d_job *job, void (*free)(struct kref *ref),
 483              u32 in_sync)
 484 {
 485         struct dma_fence *in_fence = NULL;
 486         int ret;
 487
 488         job->v3d = v3d;
 489         job->free = free;
 490
 491         xa_init_flags(&job->deps, XA_FLAGS_ALLOC);
 492
 493         ret = drm_syncobj_find_fence(file_priv, in_sync, 0, 0, &in_fence);
 494         if (ret == -EINVAL)
 495                 goto fail;
 496
 497         ret = drm_gem_fence_array_add(&job->deps, in_fence);
 498         if (ret)
 499                 goto fail;
 500
 501         v3d_clock_up_get(v3d);
 502         kref_init(&job->refcount);
 503
 504         return 0;
 505 fail:
 506         xa_destroy(&job->deps);
 507         return ret;
 508 }
 509
 510 static int
 511 v3d_push_job(struct v3d_file_priv *v3d_priv,
 512              struct v3d_job *job, enum v3d_queue queue)
 513 {
 514         int ret;
 515
 516         ret = drm_sched_job_init(&job->base, &v3d_priv->sched_entity[queue],
 517                                  v3d_priv);
 518         if (ret)
 519                 return ret;
 520
 521         job->done_fence = dma_fence_get(&job->base.s_fence->finished);
 522
 523         /* put by scheduler job completion */
 524         kref_get(&job->refcount);
 525
 526         drm_sched_entity_push_job(&job->base, &v3d_priv->sched_entity[queue]);
 527
 528         return 0;
 529 }
 530
 531 static void
 532 v3d_attach_fences_and_unlock_reservation(struct drm_file *file_priv,
 533                                          struct v3d_job *job,
 534                                          struct ww_acquire_ctx *acquire_ctx,
 535                                          u32 out_sync,
 536                                          struct dma_fence *done_fence)
 537 {
 538         struct drm_syncobj *sync_out;
 539         int i;
 540
 541         for (i = 0; i < job->bo_count; i++) {
 542                 /* XXX: Use shared fences for read-only objects. */
 543                 dma_resv_add_excl_fence(job->bo[i]->resv,
 544                                                   job->done_fence);
 545         }
 546
 547         drm_gem_unlock_reservations(job->bo, job->bo_count, acquire_ctx);
 548
 549         /* Update the return sync object for the job */
 550         sync_out = drm_syncobj_find(file_priv, out_sync);
 551         if (sync_out) {
 552                 drm_syncobj_replace_fence(sync_out, done_fence);
 553                 drm_syncobj_put(sync_out);
 554         }
 555 }
 556
 557 /**
 558  * v3d_submit_cl_ioctl() - Submits a job (frame) to the V3D.
 559  * @dev: DRM device
 560  * @data: ioctl argument
 561  * @file_priv: DRM file for this fd
 562  *
 563  * This is the main entrypoint for userspace to submit a 3D frame to
 564  * the GPU.  Userspace provides the binner command list (if
 565  * applicable), and the kernel sets up the render command list to draw
 566  * to the framebuffer described in the ioctl, using the command lists
 567  * that the 3D engine's binner will produce.
 568  */
 569 int
 570 v3d_submit_cl_ioctl(struct drm_device *dev, void *data,
 571                     struct drm_file *file_priv)
 572 {
 573         struct v3d_dev *v3d = to_v3d_dev(dev);
 574         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
 575         struct drm_v3d_submit_cl *args = data;
 576         struct v3d_bin_job *bin = NULL;
 577         struct v3d_render_job *render;
 578         struct v3d_job *clean_job = NULL;
 579         struct v3d_job *last_job;
 580         struct ww_acquire_ctx acquire_ctx;
 581         int ret = 0;
 582
 583         trace_v3d_submit_cl_ioctl(&v3d->drm, args->rcl_start, args->rcl_end);
 584
 585         if (args->pad != 0)
 586                 return -EINVAL;
 587
 588         if (args->flags != 0 &&
 589             args->flags != DRM_V3D_SUBMIT_CL_FLUSH_CACHE) {
 590                 DRM_INFO("invalid flags: %d\n", args->flags);
 591                 return -EINVAL;
 592         }
 593
 594         render = kcalloc(1, sizeof(*render), GFP_KERNEL);
 595         if (!render)
 596                 return -ENOMEM;
 597
 598         render->start = args->rcl_start;
 599         render->end = args->rcl_end;
 600         INIT_LIST_HEAD(&render->unref_list);
 601
 602         ret = v3d_job_init(v3d, file_priv, &render->base,
 603                            v3d_render_job_free, args->in_sync_rcl);
 604         if (ret) {
 605                 kfree(render);
 606                 return ret;
 607         }
 608
 609         if (args->bcl_start != args->bcl_end) {
 610                 bin = kcalloc(1, sizeof(*bin), GFP_KERNEL);
 611                 if (!bin) {
 612                         v3d_job_put(&render->base);
 613                         return -ENOMEM;
 614                 }
 615
 616                 ret = v3d_job_init(v3d, file_priv, &bin->base,
 617                                    v3d_job_free, args->in_sync_bcl);
 618                 if (ret) {
 619                         v3d_job_put(&render->base);
 620                         kfree(bin);
 621                         return ret;
 622                 }
 623
 624                 bin->start = args->bcl_start;
 625                 bin->end = args->bcl_end;
 626                 bin->qma = args->qma;
 627                 bin->qms = args->qms;
 628                 bin->qts = args->qts;
 629                 bin->render = render;
 630         }
 631
 632         if (args->flags & DRM_V3D_SUBMIT_CL_FLUSH_CACHE) {
 633                 clean_job = kcalloc(1, sizeof(*clean_job), GFP_KERNEL);
 634                 if (!clean_job) {
 635                         ret = -ENOMEM;
 636                         goto fail;
 637                 }
 638
 639                 ret = v3d_job_init(v3d, file_priv, clean_job, v3d_job_free, 0);
 640                 if (ret) {
 641                         kfree(clean_job);
 642                         clean_job = NULL;
 643                         goto fail;
 644                 }
 645
 646                 last_job = clean_job;
 647         } else {
 648                 last_job = &render->base;
 649         }
 650
 651         ret = v3d_lookup_bos(dev, file_priv, last_job,
 652                              args->bo_handles, args->bo_handle_count);
 653         if (ret)
 654                 goto fail;
 655
 656         ret = v3d_lock_bo_reservations(last_job, &acquire_ctx);
 657         if (ret)
 658                 goto fail;
 659
 660         if (args->perfmon_id) {
 661                 render->base.perfmon = v3d_perfmon_find(v3d_priv,
 662                                                         args->perfmon_id);
 663
 664                 if (!render->base.perfmon) {
 665                         ret = -ENOENT;
 666                         goto fail_perfmon;
 667                 }
 668         }
 669
 670         mutex_lock(&v3d->sched_lock);
 671         if (bin) {
 672                 bin->base.perfmon = render->base.perfmon;
 673                 v3d_perfmon_get(bin->base.perfmon);
 674                 ret = v3d_push_job(v3d_priv, &bin->base, V3D_BIN);
 675                 if (ret)
 676                         goto fail_unreserve;
 677
 678                 ret = drm_gem_fence_array_add(&render->base.deps,
 679                                               dma_fence_get(bin->base.done_fence));
 680                 if (ret)
 681                         goto fail_unreserve;
 682         }
 683
 684         ret = v3d_push_job(v3d_priv, &render->base, V3D_RENDER);
 685         if (ret)
 686                 goto fail_unreserve;
 687
 688         if (clean_job) {
 689                 struct dma_fence *render_fence =
 690                         dma_fence_get(render->base.done_fence);
 691                 ret = drm_gem_fence_array_add(&clean_job->deps, render_fence);
 692                 if (ret)
 693                         goto fail_unreserve;
 694                 clean_job->perfmon = render->base.perfmon;
 695                 v3d_perfmon_get(clean_job->perfmon);
 696                 ret = v3d_push_job(v3d_priv, clean_job, V3D_CACHE_CLEAN);
 697                 if (ret)
 698                         goto fail_unreserve;
 699         }
 700
 701         mutex_unlock(&v3d->sched_lock);
 702
 703         v3d_attach_fences_and_unlock_reservation(file_priv,
 704                                                  last_job,
 705                                                  &acquire_ctx,
 706                                                  args->out_sync,
 707                                                  last_job->done_fence);
 708
 709         if (bin)
 710                 v3d_job_put(&bin->base);
 711         v3d_job_put(&render->base);
 712         if (clean_job)
 713                 v3d_job_put(clean_job);
 714
 715         return 0;
 716
 717 fail_unreserve:
 718         mutex_unlock(&v3d->sched_lock);
 719 fail_perfmon:
 720         drm_gem_unlock_reservations(last_job->bo,
 721                                     last_job->bo_count, &acquire_ctx);
 722 fail:
 723         if (bin)
 724                 v3d_job_put(&bin->base);
 725         v3d_job_put(&render->base);
 726         if (clean_job)
 727                 v3d_job_put(clean_job);
 728
 729         return ret;
 730 }
 731
 732 /**
 733  * v3d_submit_tfu_ioctl() - Submits a TFU (texture formatting) job to the V3D.
 734  * @dev: DRM device
 735  * @data: ioctl argument
 736  * @file_priv: DRM file for this fd
 737  *
 738  * Userspace provides the register setup for the TFU, which we don't
 739  * need to validate since the TFU is behind the MMU.
 740  */
 741 int
 742 v3d_submit_tfu_ioctl(struct drm_device *dev, void *data,
 743                      struct drm_file *file_priv)
 744 {
 745         struct v3d_dev *v3d = to_v3d_dev(dev);
 746         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
 747         struct drm_v3d_submit_tfu *args = data;
 748         struct v3d_tfu_job *job;
 749         struct ww_acquire_ctx acquire_ctx;
 750         int ret = 0;
 751
 752         trace_v3d_submit_tfu_ioctl(&v3d->drm, args->iia);
 753
 754         job = kcalloc(1, sizeof(*job), GFP_KERNEL);
 755         if (!job)
 756                 return -ENOMEM;
 757
 758         ret = v3d_job_init(v3d, file_priv, &job->base,
 759                            v3d_job_free, args->in_sync);
 760         if (ret) {
 761                 kfree(job);
 762                 return ret;
 763         }
 764
 765         job->base.bo = kcalloc(ARRAY_SIZE(args->bo_handles),
 766                                sizeof(*job->base.bo), GFP_KERNEL);
 767         if (!job->base.bo) {
 768                 v3d_job_put(&job->base);
 769                 return -ENOMEM;
 770         }
 771
 772         job->args = *args;
 773
 774         spin_lock(&file_priv->table_lock);
 775         for (job->base.bo_count = 0;
 776              job->base.bo_count < ARRAY_SIZE(args->bo_handles);
 777              job->base.bo_count++) {
 778                 struct drm_gem_object *bo;
 779
 780                 if (!args->bo_handles[job->base.bo_count])
 781                         break;
 782
 783                 bo = idr_find(&file_priv->object_idr,
 784                               args->bo_handles[job->base.bo_count]);
 785                 if (!bo) {
 786                         DRM_DEBUG("Failed to look up GEM BO %d: %d\n",
 787                                   job->base.bo_count,
 788                                   args->bo_handles[job->base.bo_count]);
 789                         ret = -ENOENT;
 790                         spin_unlock(&file_priv->table_lock);
 791                         goto fail;
 792                 }
 793                 drm_gem_object_get(bo);
 794                 job->base.bo[job->base.bo_count] = bo;
 795         }
 796         spin_unlock(&file_priv->table_lock);
 797
 798         ret = v3d_lock_bo_reservations(&job->base, &acquire_ctx);
 799         if (ret)
 800                 goto fail;
 801
 802         mutex_lock(&v3d->sched_lock);
 803         ret = v3d_push_job(v3d_priv, &job->base, V3D_TFU);
 804         if (ret)
 805                 goto fail_unreserve;
 806         mutex_unlock(&v3d->sched_lock);
 807
 808         v3d_attach_fences_and_unlock_reservation(file_priv,
 809                                                  &job->base, &acquire_ctx,
 810                                                  args->out_sync,
 811                                                  job->base.done_fence);
 812
 813         v3d_job_put(&job->base);
 814
 815         return 0;
 816
 817 fail_unreserve:
 818         mutex_unlock(&v3d->sched_lock);
 819         drm_gem_unlock_reservations(job->base.bo, job->base.bo_count,
 820                                     &acquire_ctx);
 821 fail:
 822         v3d_job_put(&job->base);
 823
 824         return ret;
 825 }
 826
 827 /**
 828  * v3d_submit_csd_ioctl() - Submits a CSD (texture formatting) job to the V3D.
 829  * @dev: DRM device
 830  * @data: ioctl argument
 831  * @file_priv: DRM file for this fd
 832  *
 833  * Userspace provides the register setup for the CSD, which we don't
 834  * need to validate since the CSD is behind the MMU.
 835  */
 836 int
 837 v3d_submit_csd_ioctl(struct drm_device *dev, void *data,
 838                      struct drm_file *file_priv)
 839 {
 840         struct v3d_dev *v3d = to_v3d_dev(dev);
 841         struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
 842         struct drm_v3d_submit_csd *args = data;
 843         struct v3d_csd_job *job;
 844         struct v3d_job *clean_job;
 845         struct ww_acquire_ctx acquire_ctx;
 846         int ret;
 847
 848         trace_v3d_submit_csd_ioctl(&v3d->drm, args->cfg[5], args->cfg[6]);
 849
 850         if (!v3d_has_csd(v3d)) {
 851                 DRM_DEBUG("Attempting CSD submit on non-CSD hardware\n");
 852                 return -EINVAL;
 853         }
 854
 855         job = kcalloc(1, sizeof(*job), GFP_KERNEL);
 856         if (!job)
 857                 return -ENOMEM;
 858
 859         ret = v3d_job_init(v3d, file_priv, &job->base,
 860                            v3d_job_free, args->in_sync);
 861         if (ret) {
 862                 kfree(job);
 863                 return ret;
 864         }
 865
 866         clean_job = kcalloc(1, sizeof(*clean_job), GFP_KERNEL);
 867         if (!clean_job) {
 868                 v3d_job_put(&job->base);
 869                 kfree(job);
 870                 return -ENOMEM;
 871         }
 872
 873         ret = v3d_job_init(v3d, file_priv, clean_job, v3d_job_free, 0);
 874         if (ret) {
 875                 v3d_job_put(&job->base);
 876                 kfree(clean_job);
 877                 return ret;
 878         }
 879
 880         job->args = *args;
 881
 882         ret = v3d_lookup_bos(dev, file_priv, clean_job,
 883                              args->bo_handles, args->bo_handle_count);
 884         if (ret)
 885                 goto fail;
 886
 887         ret = v3d_lock_bo_reservations(clean_job, &acquire_ctx);
 888         if (ret)
 889                 goto fail;
 890
 891         if (args->perfmon_id) {
 892                 job->base.perfmon = v3d_perfmon_find(v3d_priv,
 893                                                      args->perfmon_id);
 894                 if (!job->base.perfmon) {
 895                         ret = -ENOENT;
 896                         goto fail_perfmon;
 897                 }
 898         }
 899
 900         mutex_lock(&v3d->sched_lock);
 901         ret = v3d_push_job(v3d_priv, &job->base, V3D_CSD);
 902         if (ret)
 903                 goto fail_unreserve;
 904
 905         ret = drm_gem_fence_array_add(&clean_job->deps,
 906                                       dma_fence_get(job->base.done_fence));
 907         if (ret)
 908                 goto fail_unreserve;
 909
 910         ret = v3d_push_job(v3d_priv, clean_job, V3D_CACHE_CLEAN);
 911         if (ret)
 912                 goto fail_unreserve;
 913         mutex_unlock(&v3d->sched_lock);
 914
 915         v3d_attach_fences_and_unlock_reservation(file_priv,
 916                                                  clean_job,
 917                                                  &acquire_ctx,
 918                                                  args->out_sync,
 919                                                  clean_job->done_fence);
 920
 921         v3d_job_put(&job->base);
 922         v3d_job_put(clean_job);
 923
 924         return 0;
 925
 926 fail_unreserve:
 927         mutex_unlock(&v3d->sched_lock);
 928 fail_perfmon:
 929         drm_gem_unlock_reservations(clean_job->bo, clean_job->bo_count,
 930                                     &acquire_ctx);
 931 fail:
 932         v3d_job_put(&job->base);
 933         v3d_job_put(clean_job);
 934
 935         return ret;
 936 }
 937
 938 int
 939 v3d_gem_init(struct drm_device *dev)
 940 {
 941         struct v3d_dev *v3d = to_v3d_dev(dev);
 942         u32 pt_size = 4096 * 1024;
 943         int ret, i;
 944
 945         for (i = 0; i < V3D_MAX_QUEUES; i++)
 946                 v3d->queue[i].fence_context = dma_fence_context_alloc(1);
 947
 948         spin_lock_init(&v3d->mm_lock);
 949         spin_lock_init(&v3d->job_lock);
 950         mutex_init(&v3d->bo_lock);
 951         mutex_init(&v3d->reset_lock);
 952         mutex_init(&v3d->sched_lock);
 953         mutex_init(&v3d->cache_clean_lock);
 954
 955         mutex_init(&v3d->clk_lock);
 956         INIT_DELAYED_WORK(&v3d->clk_down_work, v3d_clock_down_work);
 957
 958         /* kick the clock so firmware knows we are using firmware clock interface */
 959         v3d_clock_up_get(v3d);
 960         v3d_clock_up_put(v3d);
 961
 962         /* Note: We don't allocate address 0.  Various bits of HW
 963          * treat 0 as special, such as the occlusion query counters
 964          * where 0 means "disabled".
 965          */
 966         drm_mm_init(&v3d->mm, 1, pt_size / sizeof(u32) - 1);
 967
 968         v3d->pt = dma_alloc_wc(v3d->drm.dev, pt_size,
 969                                &v3d->pt_paddr,
 970                                GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
 971         if (!v3d->pt) {
 972                 drm_mm_takedown(&v3d->mm);
 973                 dev_err(v3d->drm.dev,
 974                         "Failed to allocate page tables. "
 975                         "Please ensure you have CMA enabled.\n");
 976                 return -ENOMEM;
 977         }
 978
 979         v3d_init_hw_state(v3d);
 980         v3d_mmu_set_page_table(v3d);
 981
 982         ret = v3d_sched_init(v3d);
 983         if (ret) {
 984                 drm_mm_takedown(&v3d->mm);
 985                 dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt,
 986                                   v3d->pt_paddr);
 987         }
 988
 989         return 0;
 990 }
 991
 992 void
 993 v3d_gem_destroy(struct drm_device *dev)
 994 {
 995         struct v3d_dev *v3d = to_v3d_dev(dev);
 996
 997         v3d_sched_fini(v3d);
 998
 999         /* Waiting for jobs to finish would need to be done before
1000          * unregistering V3D.
1001          */
1002         WARN_ON(v3d->bin_job);
1003         WARN_ON(v3d->render_job);
1004
1005         drm_mm_takedown(&v3d->mm);
1006
1007         dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt,
1008                           v3d->pt_paddr);
1009 }