drivers/gpu/drm/tilcdc/tilcdc_drv.c

   1 /*
   2  * Copyright (C) 2012 Texas Instruments
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 /* LCDC DRM driver, based on da8xx-fb */
  19
  20 #include <linux/component.h>
  21 #include <linux/pinctrl/consumer.h>
  22 #include <linux/suspend.h>
  23 #include <drm/drm_atomic.h>
  24 #include <drm/drm_atomic_helper.h>
  25
  26 #include "tilcdc_drv.h"
  27 #include "tilcdc_regs.h"
  28 #include "tilcdc_tfp410.h"
  29 #include "tilcdc_panel.h"
  30 #include "tilcdc_external.h"
  31
  32 #include "drm_fb_helper.h"
  33
  34 static LIST_HEAD(module_list);
  35
  36 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
  37
  38 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
  39                                                DRM_FORMAT_BGR888,
  40                                                DRM_FORMAT_XBGR8888 };
  41
  42 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
  43                                               DRM_FORMAT_RGB888,
  44                                               DRM_FORMAT_XRGB8888 };
  45
  46 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
  47                                              DRM_FORMAT_RGB888,
  48                                              DRM_FORMAT_XRGB8888 };
  49
  50 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  51                 const struct tilcdc_module_ops *funcs)
  52 {
  53         mod->name = name;
  54         mod->funcs = funcs;
  55         INIT_LIST_HEAD(&mod->list);
  56         list_add(&mod->list, &module_list);
  57 }
  58
  59 void tilcdc_module_cleanup(struct tilcdc_module *mod)
  60 {
  61         list_del(&mod->list);
  62 }
  63
  64 static struct of_device_id tilcdc_of_match[];
  65
  66 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
  67                 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
  68 {
  69         return drm_fb_cma_create(dev, file_priv, mode_cmd);
  70 }
  71
  72 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
  73 {
  74         struct tilcdc_drm_private *priv = dev->dev_private;
  75         drm_fbdev_cma_hotplug_event(priv->fbdev);
  76 }
  77
  78 int tilcdc_atomic_check(struct drm_device *dev,
  79                         struct drm_atomic_state *state)
  80 {
  81         int ret;
  82
  83         ret = drm_atomic_helper_check_modeset(dev, state);
  84         if (ret)
  85                 return ret;
  86
  87         ret = drm_atomic_helper_check_planes(dev, state);
  88         if (ret)
  89                 return ret;
  90
  91         /*
  92          * tilcdc ->atomic_check can update ->mode_changed if pixel format
  93          * changes, hence will we check modeset changes again.
  94          */
  95         ret = drm_atomic_helper_check_modeset(dev, state);
  96         if (ret)
  97                 return ret;
  98
  99         return ret;
 100 }
 101
 102 static int tilcdc_commit(struct drm_device *dev,
 103                   struct drm_atomic_state *state,
 104                   bool async)
 105 {
 106         int ret;
 107
 108         ret = drm_atomic_helper_prepare_planes(dev, state);
 109         if (ret)
 110                 return ret;
 111
 112         drm_atomic_helper_swap_state(state, true);
 113
 114         /*
 115          * Everything below can be run asynchronously without the need to grab
 116          * any modeset locks at all under one condition: It must be guaranteed
 117          * that the asynchronous work has either been cancelled (if the driver
 118          * supports it, which at least requires that the framebuffers get
 119          * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
 120          * before the new state gets committed on the software side with
 121          * drm_atomic_helper_swap_state().
 122          *
 123          * This scheme allows new atomic state updates to be prepared and
 124          * checked in parallel to the asynchronous completion of the previous
 125          * update. Which is important since compositors need to figure out the
 126          * composition of the next frame right after having submitted the
 127          * current layout.
 128          */
 129
 130         /* Keep HW on while we commit the state. */
 131         pm_runtime_get_sync(dev->dev);
 132
 133         drm_atomic_helper_commit_modeset_disables(dev, state);
 134
 135         drm_atomic_helper_commit_planes(dev, state, 0);
 136
 137         drm_atomic_helper_commit_modeset_enables(dev, state);
 138
 139         /* Now HW should remain on if need becase the crtc is enabled */
 140         pm_runtime_put_sync(dev->dev);
 141
 142         drm_atomic_helper_wait_for_vblanks(dev, state);
 143
 144         drm_atomic_helper_cleanup_planes(dev, state);
 145
 146         drm_atomic_state_free(state);
 147
 148         return 0;
 149 }
 150
 151 static const struct drm_mode_config_funcs mode_config_funcs = {
 152         .fb_create = tilcdc_fb_create,
 153         .output_poll_changed = tilcdc_fb_output_poll_changed,
 154         .atomic_check = tilcdc_atomic_check,
 155         .atomic_commit = tilcdc_commit,
 156 };
 157
 158 static int modeset_init(struct drm_device *dev)
 159 {
 160         struct tilcdc_drm_private *priv = dev->dev_private;
 161         struct tilcdc_module *mod;
 162
 163         drm_mode_config_init(dev);
 164
 165         priv->crtc = tilcdc_crtc_create(dev);
 166
 167         list_for_each_entry(mod, &module_list, list) {
 168                 DBG("loading module: %s", mod->name);
 169                 mod->funcs->modeset_init(mod, dev);
 170         }
 171
 172         dev->mode_config.min_width = 0;
 173         dev->mode_config.min_height = 0;
 174         dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
 175         dev->mode_config.max_height = 2048;
 176         dev->mode_config.funcs = &mode_config_funcs;
 177
 178         return 0;
 179 }
 180
 181 #ifdef CONFIG_CPU_FREQ
 182 static int cpufreq_transition(struct notifier_block *nb,
 183                                      unsigned long val, void *data)
 184 {
 185         struct tilcdc_drm_private *priv = container_of(nb,
 186                         struct tilcdc_drm_private, freq_transition);
 187         if (val == CPUFREQ_POSTCHANGE) {
 188                 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
 189                         priv->lcd_fck_rate = clk_get_rate(priv->clk);
 190                         tilcdc_crtc_update_clk(priv->crtc);
 191                 }
 192         }
 193
 194         return 0;
 195 }
 196 #endif
 197
 198 /*
 199  * DRM operations:
 200  */
 201
 202 static int tilcdc_unload(struct drm_device *dev)
 203 {
 204         struct tilcdc_drm_private *priv = dev->dev_private;
 205
 206         tilcdc_crtc_disable(priv->crtc);
 207
 208         tilcdc_remove_external_encoders(dev);
 209
 210         drm_fbdev_cma_fini(priv->fbdev);
 211         drm_kms_helper_poll_fini(dev);
 212         drm_mode_config_cleanup(dev);
 213         drm_vblank_cleanup(dev);
 214
 215         drm_irq_uninstall(dev);
 216
 217 #ifdef CONFIG_CPU_FREQ
 218         cpufreq_unregister_notifier(&priv->freq_transition,
 219                         CPUFREQ_TRANSITION_NOTIFIER);
 220 #endif
 221
 222         if (priv->clk)
 223                 clk_put(priv->clk);
 224
 225         if (priv->mmio)
 226                 iounmap(priv->mmio);
 227
 228         flush_workqueue(priv->wq);
 229         destroy_workqueue(priv->wq);
 230
 231         dev->dev_private = NULL;
 232
 233         pm_runtime_disable(dev->dev);
 234
 235         return 0;
 236 }
 237
 238 static int tilcdc_load(struct drm_device *dev, unsigned long flags)
 239 {
 240         struct platform_device *pdev = dev->platformdev;
 241         struct device_node *node = pdev->dev.of_node;
 242         struct tilcdc_drm_private *priv;
 243         struct tilcdc_module *mod;
 244         struct resource *res;
 245         u32 bpp = 0;
 246         int ret;
 247
 248         priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
 249         if (!priv) {
 250                 dev_err(dev->dev, "failed to allocate private data\n");
 251                 return -ENOMEM;
 252         }
 253
 254         dev->dev_private = priv;
 255
 256         priv->is_componentized =
 257                 tilcdc_get_external_components(dev->dev, NULL) > 0;
 258
 259         priv->wq = alloc_ordered_workqueue("tilcdc", 0);
 260         if (!priv->wq) {
 261                 ret = -ENOMEM;
 262                 goto fail_unset_priv;
 263         }
 264
 265         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 266         if (!res) {
 267                 dev_err(dev->dev, "failed to get memory resource\n");
 268                 ret = -EINVAL;
 269                 goto fail_free_wq;
 270         }
 271
 272         priv->mmio = ioremap_nocache(res->start, resource_size(res));
 273         if (!priv->mmio) {
 274                 dev_err(dev->dev, "failed to ioremap\n");
 275                 ret = -ENOMEM;
 276                 goto fail_free_wq;
 277         }
 278
 279         priv->clk = clk_get(dev->dev, "fck");
 280         if (IS_ERR(priv->clk)) {
 281                 dev_err(dev->dev, "failed to get functional clock\n");
 282                 ret = -ENODEV;
 283                 goto fail_iounmap;
 284         }
 285
 286 #ifdef CONFIG_CPU_FREQ
 287         priv->lcd_fck_rate = clk_get_rate(priv->clk);
 288         priv->freq_transition.notifier_call = cpufreq_transition;
 289         ret = cpufreq_register_notifier(&priv->freq_transition,
 290                         CPUFREQ_TRANSITION_NOTIFIER);
 291         if (ret) {
 292                 dev_err(dev->dev, "failed to register cpufreq notifier\n");
 293                 goto fail_put_clk;
 294         }
 295 #endif
 296
 297         if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
 298                 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
 299
 300         DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
 301
 302         if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
 303                 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
 304
 305         DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
 306
 307         if (of_property_read_u32(node, "ti,max-pixelclock",
 308                                         &priv->max_pixelclock))
 309                 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
 310
 311         DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
 312
 313         pm_runtime_enable(dev->dev);
 314
 315         /* Determine LCD IP Version */
 316         pm_runtime_get_sync(dev->dev);
 317         switch (tilcdc_read(dev, LCDC_PID_REG)) {
 318         case 0x4c100102:
 319                 priv->rev = 1;
 320                 break;
 321         case 0x4f200800:
 322         case 0x4f201000:
 323                 priv->rev = 2;
 324                 break;
 325         default:
 326                 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
 327                                 "defaulting to LCD revision 1\n",
 328                                 tilcdc_read(dev, LCDC_PID_REG));
 329                 priv->rev = 1;
 330                 break;
 331         }
 332
 333         pm_runtime_put_sync(dev->dev);
 334
 335         if (priv->rev == 1) {
 336                 DBG("Revision 1 LCDC supports only RGB565 format");
 337                 priv->pixelformats = tilcdc_rev1_formats;
 338                 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
 339         } else {
 340                 const char *str = "\0";
 341
 342                 of_property_read_string(node, "blue-and-red-wiring", &str);
 343                 if (0 == strcmp(str, "crossed")) {
 344                         DBG("Configured for crossed blue and red wires");
 345                         priv->pixelformats = tilcdc_crossed_formats;
 346                         priv->num_pixelformats =
 347                                 ARRAY_SIZE(tilcdc_crossed_formats);
 348                 } else if (0 == strcmp(str, "straight")) {
 349                         DBG("Configured for straight blue and red wires");
 350                         priv->pixelformats = tilcdc_straight_formats;
 351                         priv->num_pixelformats =
 352                                 ARRAY_SIZE(tilcdc_straight_formats);
 353                 } else {
 354                         DBG("Blue and red wiring '%s' unknown, use legacy mode",
 355                             str);
 356                         priv->pixelformats = tilcdc_legacy_formats;
 357                         priv->num_pixelformats =
 358                                 ARRAY_SIZE(tilcdc_legacy_formats);
 359                 }
 360         }
 361
 362         ret = modeset_init(dev);
 363         if (ret < 0) {
 364                 dev_err(dev->dev, "failed to initialize mode setting\n");
 365                 goto fail_cpufreq_unregister;
 366         }
 367
 368         platform_set_drvdata(pdev, dev);
 369
 370         if (priv->is_componentized) {
 371                 ret = component_bind_all(dev->dev, dev);
 372                 if (ret < 0)
 373                         goto fail_mode_config_cleanup;
 374
 375                 ret = tilcdc_add_external_encoders(dev, &bpp);
 376                 if (ret < 0)
 377                         goto fail_component_cleanup;
 378         }
 379
 380         if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
 381                 dev_err(dev->dev, "no encoders/connectors found\n");
 382                 ret = -ENXIO;
 383                 goto fail_external_cleanup;
 384         }
 385
 386         ret = drm_vblank_init(dev, 1);
 387         if (ret < 0) {
 388                 dev_err(dev->dev, "failed to initialize vblank\n");
 389                 goto fail_external_cleanup;
 390         }
 391
 392         ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
 393         if (ret < 0) {
 394                 dev_err(dev->dev, "failed to install IRQ handler\n");
 395                 goto fail_vblank_cleanup;
 396         }
 397
 398         list_for_each_entry(mod, &module_list, list) {
 399                 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
 400                 bpp = mod->preferred_bpp;
 401                 if (bpp > 0)
 402                         break;
 403         }
 404
 405         drm_mode_config_reset(dev);
 406
 407         priv->fbdev = drm_fbdev_cma_init(dev, bpp,
 408                         dev->mode_config.num_crtc,
 409                         dev->mode_config.num_connector);
 410         if (IS_ERR(priv->fbdev)) {
 411                 ret = PTR_ERR(priv->fbdev);
 412                 goto fail_irq_uninstall;
 413         }
 414
 415         drm_kms_helper_poll_init(dev);
 416
 417         return 0;
 418
 419 fail_irq_uninstall:
 420         drm_irq_uninstall(dev);
 421
 422 fail_vblank_cleanup:
 423         drm_vblank_cleanup(dev);
 424
 425 fail_mode_config_cleanup:
 426         drm_mode_config_cleanup(dev);
 427
 428 fail_component_cleanup:
 429         if (priv->is_componentized)
 430                 component_unbind_all(dev->dev, dev);
 431
 432 fail_external_cleanup:
 433         tilcdc_remove_external_encoders(dev);
 434
 435 fail_cpufreq_unregister:
 436         pm_runtime_disable(dev->dev);
 437 #ifdef CONFIG_CPU_FREQ
 438         cpufreq_unregister_notifier(&priv->freq_transition,
 439                         CPUFREQ_TRANSITION_NOTIFIER);
 440
 441 fail_put_clk:
 442 #endif
 443         clk_put(priv->clk);
 444
 445 fail_iounmap:
 446         iounmap(priv->mmio);
 447
 448 fail_free_wq:
 449         flush_workqueue(priv->wq);
 450         destroy_workqueue(priv->wq);
 451
 452 fail_unset_priv:
 453         dev->dev_private = NULL;
 454
 455         return ret;
 456 }
 457
 458 static void tilcdc_lastclose(struct drm_device *dev)
 459 {
 460         struct tilcdc_drm_private *priv = dev->dev_private;
 461         drm_fbdev_cma_restore_mode(priv->fbdev);
 462 }
 463
 464 static irqreturn_t tilcdc_irq(int irq, void *arg)
 465 {
 466         struct drm_device *dev = arg;
 467         struct tilcdc_drm_private *priv = dev->dev_private;
 468         return tilcdc_crtc_irq(priv->crtc);
 469 }
 470
 471 static int tilcdc_enable_vblank(struct drm_device *dev, unsigned int pipe)
 472 {
 473         return 0;
 474 }
 475
 476 static void tilcdc_disable_vblank(struct drm_device *dev, unsigned int pipe)
 477 {
 478         return;
 479 }
 480
 481 #if defined(CONFIG_DEBUG_FS)
 482 static const struct {
 483         const char *name;
 484         uint8_t  rev;
 485         uint8_t  save;
 486         uint32_t reg;
 487 } registers[] =         {
 488 #define REG(rev, save, reg) { #reg, rev, save, reg }
 489                 /* exists in revision 1: */
 490                 REG(1, false, LCDC_PID_REG),
 491                 REG(1, true,  LCDC_CTRL_REG),
 492                 REG(1, false, LCDC_STAT_REG),
 493                 REG(1, true,  LCDC_RASTER_CTRL_REG),
 494                 REG(1, true,  LCDC_RASTER_TIMING_0_REG),
 495                 REG(1, true,  LCDC_RASTER_TIMING_1_REG),
 496                 REG(1, true,  LCDC_RASTER_TIMING_2_REG),
 497                 REG(1, true,  LCDC_DMA_CTRL_REG),
 498                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),
 499                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_0_REG),
 500                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_1_REG),
 501                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_1_REG),
 502                 /* new in revision 2: */
 503                 REG(2, false, LCDC_RAW_STAT_REG),
 504                 REG(2, false, LCDC_MASKED_STAT_REG),
 505                 REG(2, true, LCDC_INT_ENABLE_SET_REG),
 506                 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
 507                 REG(2, false, LCDC_END_OF_INT_IND_REG),
 508                 REG(2, true,  LCDC_CLK_ENABLE_REG),
 509 #undef REG
 510 };
 511
 512 #endif
 513
 514 #ifdef CONFIG_DEBUG_FS
 515 static int tilcdc_regs_show(struct seq_file *m, void *arg)
 516 {
 517         struct drm_info_node *node = (struct drm_info_node *) m->private;
 518         struct drm_device *dev = node->minor->dev;
 519         struct tilcdc_drm_private *priv = dev->dev_private;
 520         unsigned i;
 521
 522         pm_runtime_get_sync(dev->dev);
 523
 524         seq_printf(m, "revision: %d\n", priv->rev);
 525
 526         for (i = 0; i < ARRAY_SIZE(registers); i++)
 527                 if (priv->rev >= registers[i].rev)
 528                         seq_printf(m, "%s:\t %08x\n", registers[i].name,
 529                                         tilcdc_read(dev, registers[i].reg));
 530
 531         pm_runtime_put_sync(dev->dev);
 532
 533         return 0;
 534 }
 535
 536 static int tilcdc_mm_show(struct seq_file *m, void *arg)
 537 {
 538         struct drm_info_node *node = (struct drm_info_node *) m->private;
 539         struct drm_device *dev = node->minor->dev;
 540         return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
 541 }
 542
 543 static struct drm_info_list tilcdc_debugfs_list[] = {
 544                 { "regs", tilcdc_regs_show, 0 },
 545                 { "mm",   tilcdc_mm_show,   0 },
 546                 { "fb",   drm_fb_cma_debugfs_show, 0 },
 547 };
 548
 549 static int tilcdc_debugfs_init(struct drm_minor *minor)
 550 {
 551         struct drm_device *dev = minor->dev;
 552         struct tilcdc_module *mod;
 553         int ret;
 554
 555         ret = drm_debugfs_create_files(tilcdc_debugfs_list,
 556                         ARRAY_SIZE(tilcdc_debugfs_list),
 557                         minor->debugfs_root, minor);
 558
 559         list_for_each_entry(mod, &module_list, list)
 560                 if (mod->funcs->debugfs_init)
 561                         mod->funcs->debugfs_init(mod, minor);
 562
 563         if (ret) {
 564                 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
 565                 return ret;
 566         }
 567
 568         return ret;
 569 }
 570
 571 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
 572 {
 573         struct tilcdc_module *mod;
 574         drm_debugfs_remove_files(tilcdc_debugfs_list,
 575                         ARRAY_SIZE(tilcdc_debugfs_list), minor);
 576
 577         list_for_each_entry(mod, &module_list, list)
 578                 if (mod->funcs->debugfs_cleanup)
 579                         mod->funcs->debugfs_cleanup(mod, minor);
 580 }
 581 #endif
 582
 583 static const struct file_operations fops = {
 584         .owner              = THIS_MODULE,
 585         .open               = drm_open,
 586         .release            = drm_release,
 587         .unlocked_ioctl     = drm_ioctl,
 588 #ifdef CONFIG_COMPAT
 589         .compat_ioctl       = drm_compat_ioctl,
 590 #endif
 591         .poll               = drm_poll,
 592         .read               = drm_read,
 593         .llseek             = no_llseek,
 594         .mmap               = drm_gem_cma_mmap,
 595 };
 596
 597 static struct drm_driver tilcdc_driver = {
 598         .driver_features    = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET |
 599                                DRIVER_PRIME | DRIVER_ATOMIC),
 600         .load               = tilcdc_load,
 601         .unload             = tilcdc_unload,
 602         .lastclose          = tilcdc_lastclose,
 603         .irq_handler        = tilcdc_irq,
 604         .get_vblank_counter = drm_vblank_no_hw_counter,
 605         .enable_vblank      = tilcdc_enable_vblank,
 606         .disable_vblank     = tilcdc_disable_vblank,
 607         .gem_free_object_unlocked = drm_gem_cma_free_object,
 608         .gem_vm_ops         = &drm_gem_cma_vm_ops,
 609         .dumb_create        = drm_gem_cma_dumb_create,
 610         .dumb_map_offset    = drm_gem_cma_dumb_map_offset,
 611         .dumb_destroy       = drm_gem_dumb_destroy,
 612
 613         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
 614         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
 615         .gem_prime_import       = drm_gem_prime_import,
 616         .gem_prime_export       = drm_gem_prime_export,
 617         .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
 618         .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
 619         .gem_prime_vmap         = drm_gem_cma_prime_vmap,
 620         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
 621         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
 622 #ifdef CONFIG_DEBUG_FS
 623         .debugfs_init       = tilcdc_debugfs_init,
 624         .debugfs_cleanup    = tilcdc_debugfs_cleanup,
 625 #endif
 626         .fops               = &fops,
 627         .name               = "tilcdc",
 628         .desc               = "TI LCD Controller DRM",
 629         .date               = "20121205",
 630         .major              = 1,
 631         .minor              = 0,
 632 };
 633
 634 /*
 635  * Power management:
 636  */
 637
 638 #ifdef CONFIG_PM_SLEEP
 639 static int tilcdc_pm_suspend(struct device *dev)
 640 {
 641         struct drm_device *ddev = dev_get_drvdata(dev);
 642         struct tilcdc_drm_private *priv = ddev->dev_private;
 643
 644         priv->saved_state = drm_atomic_helper_suspend(ddev);
 645
 646         /* Select sleep pin state */
 647         pinctrl_pm_select_sleep_state(dev);
 648
 649         return 0;
 650 }
 651
 652 static int tilcdc_pm_resume(struct device *dev)
 653 {
 654         struct drm_device *ddev = dev_get_drvdata(dev);
 655         struct tilcdc_drm_private *priv = ddev->dev_private;
 656         int ret = 0;
 657
 658         /* Select default pin state */
 659         pinctrl_pm_select_default_state(dev);
 660
 661         if (priv->saved_state)
 662                 ret = drm_atomic_helper_resume(ddev, priv->saved_state);
 663
 664         return ret;
 665 }
 666 #endif
 667
 668 static const struct dev_pm_ops tilcdc_pm_ops = {
 669         SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
 670 };
 671
 672 /*
 673  * Platform driver:
 674  */
 675
 676 static int tilcdc_bind(struct device *dev)
 677 {
 678         return drm_platform_init(&tilcdc_driver, to_platform_device(dev));
 679 }
 680
 681 static void tilcdc_unbind(struct device *dev)
 682 {
 683         struct drm_device *ddev = dev_get_drvdata(dev);
 684
 685         /* Check if a subcomponent has already triggered the unloading. */
 686         if (!ddev->dev_private)
 687                 return;
 688
 689         drm_put_dev(dev_get_drvdata(dev));
 690 }
 691
 692 static const struct component_master_ops tilcdc_comp_ops = {
 693         .bind = tilcdc_bind,
 694         .unbind = tilcdc_unbind,
 695 };
 696
 697 static int tilcdc_pdev_probe(struct platform_device *pdev)
 698 {
 699         struct component_match *match = NULL;
 700         int ret;
 701
 702         /* bail out early if no DT data: */
 703         if (!pdev->dev.of_node) {
 704                 dev_err(&pdev->dev, "device-tree data is missing\n");
 705                 return -ENXIO;
 706         }
 707
 708         ret = tilcdc_get_external_components(&pdev->dev, &match);
 709         if (ret < 0)
 710                 return ret;
 711         else if (ret == 0)
 712                 return drm_platform_init(&tilcdc_driver, pdev);
 713         else
 714                 return component_master_add_with_match(&pdev->dev,
 715                                                        &tilcdc_comp_ops,
 716                                                        match);
 717 }
 718
 719 static int tilcdc_pdev_remove(struct platform_device *pdev)
 720 {
 721         int ret;
 722
 723         ret = tilcdc_get_external_components(&pdev->dev, NULL);
 724         if (ret < 0)
 725                 return ret;
 726         else if (ret == 0)
 727                 drm_put_dev(platform_get_drvdata(pdev));
 728         else
 729                 component_master_del(&pdev->dev, &tilcdc_comp_ops);
 730
 731         return 0;
 732 }
 733
 734 static struct of_device_id tilcdc_of_match[] = {
 735                 { .compatible = "ti,am33xx-tilcdc", },
 736                 { },
 737 };
 738 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
 739
 740 static struct platform_driver tilcdc_platform_driver = {
 741         .probe      = tilcdc_pdev_probe,
 742         .remove     = tilcdc_pdev_remove,
 743         .driver     = {
 744                 .name   = "tilcdc",
 745                 .pm     = &tilcdc_pm_ops,
 746                 .of_match_table = tilcdc_of_match,
 747         },
 748 };
 749
 750 static int __init tilcdc_drm_init(void)
 751 {
 752         DBG("init");
 753         tilcdc_tfp410_init();
 754         tilcdc_panel_init();
 755         return platform_driver_register(&tilcdc_platform_driver);
 756 }
 757
 758 static void __exit tilcdc_drm_fini(void)
 759 {
 760         DBG("fini");
 761         platform_driver_unregister(&tilcdc_platform_driver);
 762         tilcdc_panel_fini();
 763         tilcdc_tfp410_fini();
 764 }
 765
 766 module_init(tilcdc_drm_init);
 767 module_exit(tilcdc_drm_fini);
 768
 769 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 770 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
 771 MODULE_LICENSE("GPL");