drivers/gpu/drm/tilcdc/tilcdc_drv.c

   1 /*
   2  * Copyright (C) 2012 Texas Instruments
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 /* LCDC DRM driver, based on da8xx-fb */
  19
  20 #include <linux/component.h>
  21 #include <linux/pinctrl/consumer.h>
  22 #include <linux/suspend.h>
  23 #include <drm/drm_atomic.h>
  24 #include <drm/drm_atomic_helper.h>
  25
  26 #include "tilcdc_drv.h"
  27 #include "tilcdc_regs.h"
  28 #include "tilcdc_tfp410.h"
  29 #include "tilcdc_panel.h"
  30 #include "tilcdc_external.h"
  31
  32 #include "drm_fb_helper.h"
  33
  34 static LIST_HEAD(module_list);
  35
  36 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
  37
  38 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
  39                                                DRM_FORMAT_BGR888,
  40                                                DRM_FORMAT_XBGR8888 };
  41
  42 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
  43                                               DRM_FORMAT_RGB888,
  44                                               DRM_FORMAT_XRGB8888 };
  45
  46 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
  47                                              DRM_FORMAT_RGB888,
  48                                              DRM_FORMAT_XRGB8888 };
  49
  50 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  51                 const struct tilcdc_module_ops *funcs)
  52 {
  53         mod->name = name;
  54         mod->funcs = funcs;
  55         INIT_LIST_HEAD(&mod->list);
  56         list_add(&mod->list, &module_list);
  57 }
  58
  59 void tilcdc_module_cleanup(struct tilcdc_module *mod)
  60 {
  61         list_del(&mod->list);
  62 }
  63
  64 static struct of_device_id tilcdc_of_match[];
  65
  66 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
  67                 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
  68 {
  69         return drm_fb_cma_create(dev, file_priv, mode_cmd);
  70 }
  71
  72 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
  73 {
  74         struct tilcdc_drm_private *priv = dev->dev_private;
  75         drm_fbdev_cma_hotplug_event(priv->fbdev);
  76 }
  77
  78 int tilcdc_atomic_check(struct drm_device *dev,
  79                         struct drm_atomic_state *state)
  80 {
  81         int ret;
  82
  83         ret = drm_atomic_helper_check_modeset(dev, state);
  84         if (ret)
  85                 return ret;
  86
  87         ret = drm_atomic_helper_check_planes(dev, state);
  88         if (ret)
  89                 return ret;
  90
  91         /*
  92          * tilcdc ->atomic_check can update ->mode_changed if pixel format
  93          * changes, hence will we check modeset changes again.
  94          */
  95         ret = drm_atomic_helper_check_modeset(dev, state);
  96         if (ret)
  97                 return ret;
  98
  99         return ret;
 100 }
 101
 102 static int tilcdc_commit(struct drm_device *dev,
 103                   struct drm_atomic_state *state,
 104                   bool async)
 105 {
 106         int ret;
 107
 108         ret = drm_atomic_helper_prepare_planes(dev, state);
 109         if (ret)
 110                 return ret;
 111
 112         drm_atomic_helper_swap_state(state, true);
 113
 114         /*
 115          * Everything below can be run asynchronously without the need to grab
 116          * any modeset locks at all under one condition: It must be guaranteed
 117          * that the asynchronous work has either been cancelled (if the driver
 118          * supports it, which at least requires that the framebuffers get
 119          * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
 120          * before the new state gets committed on the software side with
 121          * drm_atomic_helper_swap_state().
 122          *
 123          * This scheme allows new atomic state updates to be prepared and
 124          * checked in parallel to the asynchronous completion of the previous
 125          * update. Which is important since compositors need to figure out the
 126          * composition of the next frame right after having submitted the
 127          * current layout.
 128          */
 129
 130         /* Keep HW on while we commit the state. */
 131         pm_runtime_get_sync(dev->dev);
 132
 133         drm_atomic_helper_commit_modeset_disables(dev, state);
 134
 135         drm_atomic_helper_commit_planes(dev, state, 0);
 136
 137         drm_atomic_helper_commit_modeset_enables(dev, state);
 138
 139         /* Now HW should remain on if need becase the crtc is enabled */
 140         pm_runtime_put_sync(dev->dev);
 141
 142         drm_atomic_helper_wait_for_vblanks(dev, state);
 143
 144         drm_atomic_helper_cleanup_planes(dev, state);
 145
 146         drm_atomic_state_free(state);
 147
 148         return 0;
 149 }
 150
 151 static const struct drm_mode_config_funcs mode_config_funcs = {
 152         .fb_create = tilcdc_fb_create,
 153         .output_poll_changed = tilcdc_fb_output_poll_changed,
 154         .atomic_check = tilcdc_atomic_check,
 155         .atomic_commit = tilcdc_commit,
 156 };
 157
 158 static int modeset_init(struct drm_device *dev)
 159 {
 160         struct tilcdc_drm_private *priv = dev->dev_private;
 161         struct tilcdc_module *mod;
 162
 163         drm_mode_config_init(dev);
 164
 165         priv->crtc = tilcdc_crtc_create(dev);
 166
 167         list_for_each_entry(mod, &module_list, list) {
 168                 DBG("loading module: %s", mod->name);
 169                 mod->funcs->modeset_init(mod, dev);
 170         }
 171
 172         dev->mode_config.min_width = 0;
 173         dev->mode_config.min_height = 0;
 174         dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
 175         dev->mode_config.max_height = 2048;
 176         dev->mode_config.funcs = &mode_config_funcs;
 177
 178         return 0;
 179 }
 180
 181 #ifdef CONFIG_CPU_FREQ
 182 static int cpufreq_transition(struct notifier_block *nb,
 183                                      unsigned long val, void *data)
 184 {
 185         struct tilcdc_drm_private *priv = container_of(nb,
 186                         struct tilcdc_drm_private, freq_transition);
 187
 188         if (val == CPUFREQ_POSTCHANGE)
 189                 tilcdc_crtc_update_clk(priv->crtc);
 190
 191         return 0;
 192 }
 193 #endif
 194
 195 /*
 196  * DRM operations:
 197  */
 198
 199 static int tilcdc_unload(struct drm_device *dev)
 200 {
 201         struct tilcdc_drm_private *priv = dev->dev_private;
 202
 203         tilcdc_crtc_disable(priv->crtc);
 204
 205         tilcdc_remove_external_encoders(dev);
 206
 207         drm_fbdev_cma_fini(priv->fbdev);
 208         drm_kms_helper_poll_fini(dev);
 209         drm_mode_config_cleanup(dev);
 210         drm_vblank_cleanup(dev);
 211
 212         drm_irq_uninstall(dev);
 213
 214 #ifdef CONFIG_CPU_FREQ
 215         cpufreq_unregister_notifier(&priv->freq_transition,
 216                         CPUFREQ_TRANSITION_NOTIFIER);
 217 #endif
 218
 219         if (priv->clk)
 220                 clk_put(priv->clk);
 221
 222         if (priv->mmio)
 223                 iounmap(priv->mmio);
 224
 225         flush_workqueue(priv->wq);
 226         destroy_workqueue(priv->wq);
 227
 228         dev->dev_private = NULL;
 229
 230         pm_runtime_disable(dev->dev);
 231
 232         return 0;
 233 }
 234
 235 static int tilcdc_load(struct drm_device *dev, unsigned long flags)
 236 {
 237         struct platform_device *pdev = dev->platformdev;
 238         struct device_node *node = pdev->dev.of_node;
 239         struct tilcdc_drm_private *priv;
 240         struct resource *res;
 241         u32 bpp = 0;
 242         int ret;
 243
 244         priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
 245         if (!priv) {
 246                 dev_err(dev->dev, "failed to allocate private data\n");
 247                 return -ENOMEM;
 248         }
 249
 250         dev->dev_private = priv;
 251
 252         priv->is_componentized =
 253                 tilcdc_get_external_components(dev->dev, NULL) > 0;
 254
 255         priv->wq = alloc_ordered_workqueue("tilcdc", 0);
 256         if (!priv->wq) {
 257                 ret = -ENOMEM;
 258                 goto fail_unset_priv;
 259         }
 260
 261         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 262         if (!res) {
 263                 dev_err(dev->dev, "failed to get memory resource\n");
 264                 ret = -EINVAL;
 265                 goto fail_free_wq;
 266         }
 267
 268         priv->mmio = ioremap_nocache(res->start, resource_size(res));
 269         if (!priv->mmio) {
 270                 dev_err(dev->dev, "failed to ioremap\n");
 271                 ret = -ENOMEM;
 272                 goto fail_free_wq;
 273         }
 274
 275         priv->clk = clk_get(dev->dev, "fck");
 276         if (IS_ERR(priv->clk)) {
 277                 dev_err(dev->dev, "failed to get functional clock\n");
 278                 ret = -ENODEV;
 279                 goto fail_iounmap;
 280         }
 281
 282 #ifdef CONFIG_CPU_FREQ
 283         priv->freq_transition.notifier_call = cpufreq_transition;
 284         ret = cpufreq_register_notifier(&priv->freq_transition,
 285                         CPUFREQ_TRANSITION_NOTIFIER);
 286         if (ret) {
 287                 dev_err(dev->dev, "failed to register cpufreq notifier\n");
 288                 goto fail_put_clk;
 289         }
 290 #endif
 291
 292         if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
 293                 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
 294
 295         DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
 296
 297         if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
 298                 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
 299
 300         DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
 301
 302         if (of_property_read_u32(node, "ti,max-pixelclock",
 303                                         &priv->max_pixelclock))
 304                 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
 305
 306         DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
 307
 308         pm_runtime_enable(dev->dev);
 309
 310         /* Determine LCD IP Version */
 311         pm_runtime_get_sync(dev->dev);
 312         switch (tilcdc_read(dev, LCDC_PID_REG)) {
 313         case 0x4c100102:
 314                 priv->rev = 1;
 315                 break;
 316         case 0x4f200800:
 317         case 0x4f201000:
 318                 priv->rev = 2;
 319                 break;
 320         default:
 321                 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
 322                                 "defaulting to LCD revision 1\n",
 323                                 tilcdc_read(dev, LCDC_PID_REG));
 324                 priv->rev = 1;
 325                 break;
 326         }
 327
 328         pm_runtime_put_sync(dev->dev);
 329
 330         if (priv->rev == 1) {
 331                 DBG("Revision 1 LCDC supports only RGB565 format");
 332                 priv->pixelformats = tilcdc_rev1_formats;
 333                 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
 334                 bpp = 16;
 335         } else {
 336                 const char *str = "\0";
 337
 338                 of_property_read_string(node, "blue-and-red-wiring", &str);
 339                 if (0 == strcmp(str, "crossed")) {
 340                         DBG("Configured for crossed blue and red wires");
 341                         priv->pixelformats = tilcdc_crossed_formats;
 342                         priv->num_pixelformats =
 343                                 ARRAY_SIZE(tilcdc_crossed_formats);
 344                         bpp = 32; /* Choose bpp with RGB support for fbdef */
 345                 } else if (0 == strcmp(str, "straight")) {
 346                         DBG("Configured for straight blue and red wires");
 347                         priv->pixelformats = tilcdc_straight_formats;
 348                         priv->num_pixelformats =
 349                                 ARRAY_SIZE(tilcdc_straight_formats);
 350                         bpp = 16; /* Choose bpp with RGB support for fbdef */
 351                 } else {
 352                         DBG("Blue and red wiring '%s' unknown, use legacy mode",
 353                             str);
 354                         priv->pixelformats = tilcdc_legacy_formats;
 355                         priv->num_pixelformats =
 356                                 ARRAY_SIZE(tilcdc_legacy_formats);
 357                         bpp = 16; /* This is just a guess */
 358                 }
 359         }
 360
 361         ret = modeset_init(dev);
 362         if (ret < 0) {
 363                 dev_err(dev->dev, "failed to initialize mode setting\n");
 364                 goto fail_cpufreq_unregister;
 365         }
 366
 367         platform_set_drvdata(pdev, dev);
 368
 369         if (priv->is_componentized) {
 370                 ret = component_bind_all(dev->dev, dev);
 371                 if (ret < 0)
 372                         goto fail_mode_config_cleanup;
 373
 374                 ret = tilcdc_add_external_encoders(dev);
 375                 if (ret < 0)
 376                         goto fail_component_cleanup;
 377         }
 378
 379         if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
 380                 dev_err(dev->dev, "no encoders/connectors found\n");
 381                 ret = -ENXIO;
 382                 goto fail_external_cleanup;
 383         }
 384
 385         ret = drm_vblank_init(dev, 1);
 386         if (ret < 0) {
 387                 dev_err(dev->dev, "failed to initialize vblank\n");
 388                 goto fail_external_cleanup;
 389         }
 390
 391         ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
 392         if (ret < 0) {
 393                 dev_err(dev->dev, "failed to install IRQ handler\n");
 394                 goto fail_vblank_cleanup;
 395         }
 396
 397         drm_mode_config_reset(dev);
 398
 399         priv->fbdev = drm_fbdev_cma_init(dev, bpp,
 400                         dev->mode_config.num_crtc,
 401                         dev->mode_config.num_connector);
 402         if (IS_ERR(priv->fbdev)) {
 403                 ret = PTR_ERR(priv->fbdev);
 404                 goto fail_irq_uninstall;
 405         }
 406
 407         drm_kms_helper_poll_init(dev);
 408
 409         return 0;
 410
 411 fail_irq_uninstall:
 412         drm_irq_uninstall(dev);
 413
 414 fail_vblank_cleanup:
 415         drm_vblank_cleanup(dev);
 416
 417 fail_mode_config_cleanup:
 418         drm_mode_config_cleanup(dev);
 419
 420 fail_component_cleanup:
 421         if (priv->is_componentized)
 422                 component_unbind_all(dev->dev, dev);
 423
 424 fail_external_cleanup:
 425         tilcdc_remove_external_encoders(dev);
 426
 427 fail_cpufreq_unregister:
 428         pm_runtime_disable(dev->dev);
 429 #ifdef CONFIG_CPU_FREQ
 430         cpufreq_unregister_notifier(&priv->freq_transition,
 431                         CPUFREQ_TRANSITION_NOTIFIER);
 432
 433 fail_put_clk:
 434 #endif
 435         clk_put(priv->clk);
 436
 437 fail_iounmap:
 438         iounmap(priv->mmio);
 439
 440 fail_free_wq:
 441         flush_workqueue(priv->wq);
 442         destroy_workqueue(priv->wq);
 443
 444 fail_unset_priv:
 445         dev->dev_private = NULL;
 446
 447         return ret;
 448 }
 449
 450 static void tilcdc_lastclose(struct drm_device *dev)
 451 {
 452         struct tilcdc_drm_private *priv = dev->dev_private;
 453         drm_fbdev_cma_restore_mode(priv->fbdev);
 454 }
 455
 456 static irqreturn_t tilcdc_irq(int irq, void *arg)
 457 {
 458         struct drm_device *dev = arg;
 459         struct tilcdc_drm_private *priv = dev->dev_private;
 460         return tilcdc_crtc_irq(priv->crtc);
 461 }
 462
 463 static int tilcdc_enable_vblank(struct drm_device *dev, unsigned int pipe)
 464 {
 465         return 0;
 466 }
 467
 468 static void tilcdc_disable_vblank(struct drm_device *dev, unsigned int pipe)
 469 {
 470         return;
 471 }
 472
 473 #if defined(CONFIG_DEBUG_FS)
 474 static const struct {
 475         const char *name;
 476         uint8_t  rev;
 477         uint8_t  save;
 478         uint32_t reg;
 479 } registers[] =         {
 480 #define REG(rev, save, reg) { #reg, rev, save, reg }
 481                 /* exists in revision 1: */
 482                 REG(1, false, LCDC_PID_REG),
 483                 REG(1, true,  LCDC_CTRL_REG),
 484                 REG(1, false, LCDC_STAT_REG),
 485                 REG(1, true,  LCDC_RASTER_CTRL_REG),
 486                 REG(1, true,  LCDC_RASTER_TIMING_0_REG),
 487                 REG(1, true,  LCDC_RASTER_TIMING_1_REG),
 488                 REG(1, true,  LCDC_RASTER_TIMING_2_REG),
 489                 REG(1, true,  LCDC_DMA_CTRL_REG),
 490                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),
 491                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_0_REG),
 492                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_1_REG),
 493                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_1_REG),
 494                 /* new in revision 2: */
 495                 REG(2, false, LCDC_RAW_STAT_REG),
 496                 REG(2, false, LCDC_MASKED_STAT_REG),
 497                 REG(2, true, LCDC_INT_ENABLE_SET_REG),
 498                 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
 499                 REG(2, false, LCDC_END_OF_INT_IND_REG),
 500                 REG(2, true,  LCDC_CLK_ENABLE_REG),
 501 #undef REG
 502 };
 503
 504 #endif
 505
 506 #ifdef CONFIG_DEBUG_FS
 507 static int tilcdc_regs_show(struct seq_file *m, void *arg)
 508 {
 509         struct drm_info_node *node = (struct drm_info_node *) m->private;
 510         struct drm_device *dev = node->minor->dev;
 511         struct tilcdc_drm_private *priv = dev->dev_private;
 512         unsigned i;
 513
 514         pm_runtime_get_sync(dev->dev);
 515
 516         seq_printf(m, "revision: %d\n", priv->rev);
 517
 518         for (i = 0; i < ARRAY_SIZE(registers); i++)
 519                 if (priv->rev >= registers[i].rev)
 520                         seq_printf(m, "%s:\t %08x\n", registers[i].name,
 521                                         tilcdc_read(dev, registers[i].reg));
 522
 523         pm_runtime_put_sync(dev->dev);
 524
 525         return 0;
 526 }
 527
 528 static int tilcdc_mm_show(struct seq_file *m, void *arg)
 529 {
 530         struct drm_info_node *node = (struct drm_info_node *) m->private;
 531         struct drm_device *dev = node->minor->dev;
 532         return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
 533 }
 534
 535 static struct drm_info_list tilcdc_debugfs_list[] = {
 536                 { "regs", tilcdc_regs_show, 0 },
 537                 { "mm",   tilcdc_mm_show,   0 },
 538                 { "fb",   drm_fb_cma_debugfs_show, 0 },
 539 };
 540
 541 static int tilcdc_debugfs_init(struct drm_minor *minor)
 542 {
 543         struct drm_device *dev = minor->dev;
 544         struct tilcdc_module *mod;
 545         int ret;
 546
 547         ret = drm_debugfs_create_files(tilcdc_debugfs_list,
 548                         ARRAY_SIZE(tilcdc_debugfs_list),
 549                         minor->debugfs_root, minor);
 550
 551         list_for_each_entry(mod, &module_list, list)
 552                 if (mod->funcs->debugfs_init)
 553                         mod->funcs->debugfs_init(mod, minor);
 554
 555         if (ret) {
 556                 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
 557                 return ret;
 558         }
 559
 560         return ret;
 561 }
 562
 563 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
 564 {
 565         struct tilcdc_module *mod;
 566         drm_debugfs_remove_files(tilcdc_debugfs_list,
 567                         ARRAY_SIZE(tilcdc_debugfs_list), minor);
 568
 569         list_for_each_entry(mod, &module_list, list)
 570                 if (mod->funcs->debugfs_cleanup)
 571                         mod->funcs->debugfs_cleanup(mod, minor);
 572 }
 573 #endif
 574
 575 static const struct file_operations fops = {
 576         .owner              = THIS_MODULE,
 577         .open               = drm_open,
 578         .release            = drm_release,
 579         .unlocked_ioctl     = drm_ioctl,
 580 #ifdef CONFIG_COMPAT
 581         .compat_ioctl       = drm_compat_ioctl,
 582 #endif
 583         .poll               = drm_poll,
 584         .read               = drm_read,
 585         .llseek             = no_llseek,
 586         .mmap               = drm_gem_cma_mmap,
 587 };
 588
 589 static struct drm_driver tilcdc_driver = {
 590         .driver_features    = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET |
 591                                DRIVER_PRIME | DRIVER_ATOMIC),
 592         .load               = tilcdc_load,
 593         .unload             = tilcdc_unload,
 594         .lastclose          = tilcdc_lastclose,
 595         .irq_handler        = tilcdc_irq,
 596         .get_vblank_counter = drm_vblank_no_hw_counter,
 597         .enable_vblank      = tilcdc_enable_vblank,
 598         .disable_vblank     = tilcdc_disable_vblank,
 599         .gem_free_object_unlocked = drm_gem_cma_free_object,
 600         .gem_vm_ops         = &drm_gem_cma_vm_ops,
 601         .dumb_create        = drm_gem_cma_dumb_create,
 602         .dumb_map_offset    = drm_gem_cma_dumb_map_offset,
 603         .dumb_destroy       = drm_gem_dumb_destroy,
 604
 605         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
 606         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
 607         .gem_prime_import       = drm_gem_prime_import,
 608         .gem_prime_export       = drm_gem_prime_export,
 609         .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
 610         .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
 611         .gem_prime_vmap         = drm_gem_cma_prime_vmap,
 612         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
 613         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
 614 #ifdef CONFIG_DEBUG_FS
 615         .debugfs_init       = tilcdc_debugfs_init,
 616         .debugfs_cleanup    = tilcdc_debugfs_cleanup,
 617 #endif
 618         .fops               = &fops,
 619         .name               = "tilcdc",
 620         .desc               = "TI LCD Controller DRM",
 621         .date               = "20121205",
 622         .major              = 1,
 623         .minor              = 0,
 624 };
 625
 626 /*
 627  * Power management:
 628  */
 629
 630 #ifdef CONFIG_PM_SLEEP
 631 static int tilcdc_pm_suspend(struct device *dev)
 632 {
 633         struct drm_device *ddev = dev_get_drvdata(dev);
 634         struct tilcdc_drm_private *priv = ddev->dev_private;
 635
 636         priv->saved_state = drm_atomic_helper_suspend(ddev);
 637
 638         /* Select sleep pin state */
 639         pinctrl_pm_select_sleep_state(dev);
 640
 641         return 0;
 642 }
 643
 644 static int tilcdc_pm_resume(struct device *dev)
 645 {
 646         struct drm_device *ddev = dev_get_drvdata(dev);
 647         struct tilcdc_drm_private *priv = ddev->dev_private;
 648         int ret = 0;
 649
 650         /* Select default pin state */
 651         pinctrl_pm_select_default_state(dev);
 652
 653         if (priv->saved_state)
 654                 ret = drm_atomic_helper_resume(ddev, priv->saved_state);
 655
 656         return ret;
 657 }
 658 #endif
 659
 660 static const struct dev_pm_ops tilcdc_pm_ops = {
 661         SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
 662 };
 663
 664 /*
 665  * Platform driver:
 666  */
 667
 668 static int tilcdc_bind(struct device *dev)
 669 {
 670         return drm_platform_init(&tilcdc_driver, to_platform_device(dev));
 671 }
 672
 673 static void tilcdc_unbind(struct device *dev)
 674 {
 675         struct drm_device *ddev = dev_get_drvdata(dev);
 676
 677         /* Check if a subcomponent has already triggered the unloading. */
 678         if (!ddev->dev_private)
 679                 return;
 680
 681         drm_put_dev(dev_get_drvdata(dev));
 682 }
 683
 684 static const struct component_master_ops tilcdc_comp_ops = {
 685         .bind = tilcdc_bind,
 686         .unbind = tilcdc_unbind,
 687 };
 688
 689 static int tilcdc_pdev_probe(struct platform_device *pdev)
 690 {
 691         struct component_match *match = NULL;
 692         int ret;
 693
 694         /* bail out early if no DT data: */
 695         if (!pdev->dev.of_node) {
 696                 dev_err(&pdev->dev, "device-tree data is missing\n");
 697                 return -ENXIO;
 698         }
 699
 700         ret = tilcdc_get_external_components(&pdev->dev, &match);
 701         if (ret < 0)
 702                 return ret;
 703         else if (ret == 0)
 704                 return drm_platform_init(&tilcdc_driver, pdev);
 705         else
 706                 return component_master_add_with_match(&pdev->dev,
 707                                                        &tilcdc_comp_ops,
 708                                                        match);
 709 }
 710
 711 static int tilcdc_pdev_remove(struct platform_device *pdev)
 712 {
 713         int ret;
 714
 715         ret = tilcdc_get_external_components(&pdev->dev, NULL);
 716         if (ret < 0)
 717                 return ret;
 718         else if (ret == 0)
 719                 drm_put_dev(platform_get_drvdata(pdev));
 720         else
 721                 component_master_del(&pdev->dev, &tilcdc_comp_ops);
 722
 723         return 0;
 724 }
 725
 726 static struct of_device_id tilcdc_of_match[] = {
 727                 { .compatible = "ti,am33xx-tilcdc", },
 728                 { },
 729 };
 730 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
 731
 732 static struct platform_driver tilcdc_platform_driver = {
 733         .probe      = tilcdc_pdev_probe,
 734         .remove     = tilcdc_pdev_remove,
 735         .driver     = {
 736                 .name   = "tilcdc",
 737                 .pm     = &tilcdc_pm_ops,
 738                 .of_match_table = tilcdc_of_match,
 739         },
 740 };
 741
 742 static int __init tilcdc_drm_init(void)
 743 {
 744         DBG("init");
 745         tilcdc_tfp410_init();
 746         tilcdc_panel_init();
 747         return platform_driver_register(&tilcdc_platform_driver);
 748 }
 749
 750 static void __exit tilcdc_drm_fini(void)
 751 {
 752         DBG("fini");
 753         platform_driver_unregister(&tilcdc_platform_driver);
 754         tilcdc_panel_fini();
 755         tilcdc_tfp410_fini();
 756 }
 757
 758 module_init(tilcdc_drm_init);
 759 module_exit(tilcdc_drm_fini);
 760
 761 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 762 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
 763 MODULE_LICENSE("GPL");