drivers/gpu/drm/tilcdc/tilcdc_drv.c

   1 /*
   2  * Copyright (C) 2012 Texas Instruments
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 /* LCDC DRM driver, based on da8xx-fb */
  19
  20 #include <linux/component.h>
  21 #include <linux/pinctrl/consumer.h>
  22 #include <linux/suspend.h>
  23 #include <drm/drm_atomic.h>
  24 #include <drm/drm_atomic_helper.h>
  25
  26 #include "tilcdc_drv.h"
  27 #include "tilcdc_regs.h"
  28 #include "tilcdc_tfp410.h"
  29 #include "tilcdc_panel.h"
  30 #include "tilcdc_external.h"
  31
  32 #include "drm_fb_helper.h"
  33
  34 static LIST_HEAD(module_list);
  35
  36 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  37                 const struct tilcdc_module_ops *funcs)
  38 {
  39         mod->name = name;
  40         mod->funcs = funcs;
  41         INIT_LIST_HEAD(&mod->list);
  42         list_add(&mod->list, &module_list);
  43 }
  44
  45 void tilcdc_module_cleanup(struct tilcdc_module *mod)
  46 {
  47         list_del(&mod->list);
  48 }
  49
  50 static struct of_device_id tilcdc_of_match[];
  51
  52 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
  53                 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
  54 {
  55         return drm_fb_cma_create(dev, file_priv, mode_cmd);
  56 }
  57
  58 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
  59 {
  60         struct tilcdc_drm_private *priv = dev->dev_private;
  61         drm_fbdev_cma_hotplug_event(priv->fbdev);
  62 }
  63
  64 int tilcdc_atomic_check(struct drm_device *dev,
  65                         struct drm_atomic_state *state)
  66 {
  67         int ret;
  68
  69         ret = drm_atomic_helper_check_modeset(dev, state);
  70         if (ret)
  71                 return ret;
  72
  73         ret = drm_atomic_helper_check_planes(dev, state);
  74         if (ret)
  75                 return ret;
  76
  77         /*
  78          * tilcdc ->atomic_check can update ->mode_changed if pixel format
  79          * changes, hence will we check modeset changes again.
  80          */
  81         ret = drm_atomic_helper_check_modeset(dev, state);
  82         if (ret)
  83                 return ret;
  84
  85         return ret;
  86 }
  87
  88 static int tilcdc_commit(struct drm_device *dev,
  89                   struct drm_atomic_state *state,
  90                   bool async)
  91 {
  92         int ret;
  93
  94         ret = drm_atomic_helper_prepare_planes(dev, state);
  95         if (ret)
  96                 return ret;
  97
  98         drm_atomic_helper_swap_state(state, true);
  99
 100         /*
 101          * Everything below can be run asynchronously without the need to grab
 102          * any modeset locks at all under one condition: It must be guaranteed
 103          * that the asynchronous work has either been cancelled (if the driver
 104          * supports it, which at least requires that the framebuffers get
 105          * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
 106          * before the new state gets committed on the software side with
 107          * drm_atomic_helper_swap_state().
 108          *
 109          * This scheme allows new atomic state updates to be prepared and
 110          * checked in parallel to the asynchronous completion of the previous
 111          * update. Which is important since compositors need to figure out the
 112          * composition of the next frame right after having submitted the
 113          * current layout.
 114          */
 115
 116         drm_atomic_helper_commit_modeset_disables(dev, state);
 117
 118         drm_atomic_helper_commit_planes(dev, state, false);
 119
 120         drm_atomic_helper_commit_modeset_enables(dev, state);
 121
 122         drm_atomic_helper_wait_for_vblanks(dev, state);
 123
 124         drm_atomic_helper_cleanup_planes(dev, state);
 125
 126         drm_atomic_state_free(state);
 127
 128         return 0;
 129 }
 130
 131 static const struct drm_mode_config_funcs mode_config_funcs = {
 132         .fb_create = tilcdc_fb_create,
 133         .output_poll_changed = tilcdc_fb_output_poll_changed,
 134         .atomic_check = tilcdc_atomic_check,
 135         .atomic_commit = tilcdc_commit,
 136 };
 137
 138 static int modeset_init(struct drm_device *dev)
 139 {
 140         struct tilcdc_drm_private *priv = dev->dev_private;
 141         struct tilcdc_module *mod;
 142
 143         drm_mode_config_init(dev);
 144
 145         priv->crtc = tilcdc_crtc_create(dev);
 146
 147         list_for_each_entry(mod, &module_list, list) {
 148                 DBG("loading module: %s", mod->name);
 149                 mod->funcs->modeset_init(mod, dev);
 150         }
 151
 152         dev->mode_config.min_width = 0;
 153         dev->mode_config.min_height = 0;
 154         dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
 155         dev->mode_config.max_height = 2048;
 156         dev->mode_config.funcs = &mode_config_funcs;
 157
 158         return 0;
 159 }
 160
 161 #ifdef CONFIG_CPU_FREQ
 162 static int cpufreq_transition(struct notifier_block *nb,
 163                                      unsigned long val, void *data)
 164 {
 165         struct tilcdc_drm_private *priv = container_of(nb,
 166                         struct tilcdc_drm_private, freq_transition);
 167         if (val == CPUFREQ_POSTCHANGE) {
 168                 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
 169                         priv->lcd_fck_rate = clk_get_rate(priv->clk);
 170                         tilcdc_crtc_update_clk(priv->crtc);
 171                 }
 172         }
 173
 174         return 0;
 175 }
 176 #endif
 177
 178 /*
 179  * DRM operations:
 180  */
 181
 182 static int tilcdc_unload(struct drm_device *dev)
 183 {
 184         struct tilcdc_drm_private *priv = dev->dev_private;
 185
 186         tilcdc_crtc_dpms(priv->crtc, DRM_MODE_DPMS_OFF);
 187
 188         tilcdc_remove_external_encoders(dev);
 189
 190         drm_fbdev_cma_fini(priv->fbdev);
 191         drm_kms_helper_poll_fini(dev);
 192         drm_mode_config_cleanup(dev);
 193         drm_vblank_cleanup(dev);
 194
 195         drm_irq_uninstall(dev);
 196
 197 #ifdef CONFIG_CPU_FREQ
 198         cpufreq_unregister_notifier(&priv->freq_transition,
 199                         CPUFREQ_TRANSITION_NOTIFIER);
 200 #endif
 201
 202         if (priv->clk)
 203                 clk_put(priv->clk);
 204
 205         if (priv->mmio)
 206                 iounmap(priv->mmio);
 207
 208         flush_workqueue(priv->wq);
 209         destroy_workqueue(priv->wq);
 210
 211         dev->dev_private = NULL;
 212
 213         pm_runtime_disable(dev->dev);
 214
 215         return 0;
 216 }
 217
 218 static int tilcdc_load(struct drm_device *dev, unsigned long flags)
 219 {
 220         struct platform_device *pdev = dev->platformdev;
 221         struct device_node *node = pdev->dev.of_node;
 222         struct tilcdc_drm_private *priv;
 223         struct tilcdc_module *mod;
 224         struct resource *res;
 225         u32 bpp = 0;
 226         int ret;
 227
 228         priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
 229         if (!priv) {
 230                 dev_err(dev->dev, "failed to allocate private data\n");
 231                 return -ENOMEM;
 232         }
 233
 234         dev->dev_private = priv;
 235
 236         priv->is_componentized =
 237                 tilcdc_get_external_components(dev->dev, NULL) > 0;
 238
 239         priv->wq = alloc_ordered_workqueue("tilcdc", 0);
 240         if (!priv->wq) {
 241                 ret = -ENOMEM;
 242                 goto fail_unset_priv;
 243         }
 244
 245         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 246         if (!res) {
 247                 dev_err(dev->dev, "failed to get memory resource\n");
 248                 ret = -EINVAL;
 249                 goto fail_free_wq;
 250         }
 251
 252         priv->mmio = ioremap_nocache(res->start, resource_size(res));
 253         if (!priv->mmio) {
 254                 dev_err(dev->dev, "failed to ioremap\n");
 255                 ret = -ENOMEM;
 256                 goto fail_free_wq;
 257         }
 258
 259         priv->clk = clk_get(dev->dev, "fck");
 260         if (IS_ERR(priv->clk)) {
 261                 dev_err(dev->dev, "failed to get functional clock\n");
 262                 ret = -ENODEV;
 263                 goto fail_iounmap;
 264         }
 265
 266 #ifdef CONFIG_CPU_FREQ
 267         priv->lcd_fck_rate = clk_get_rate(priv->clk);
 268         priv->freq_transition.notifier_call = cpufreq_transition;
 269         ret = cpufreq_register_notifier(&priv->freq_transition,
 270                         CPUFREQ_TRANSITION_NOTIFIER);
 271         if (ret) {
 272                 dev_err(dev->dev, "failed to register cpufreq notifier\n");
 273                 goto fail_put_clk;
 274         }
 275 #endif
 276
 277         if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
 278                 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
 279
 280         DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
 281
 282         if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
 283                 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
 284
 285         DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
 286
 287         if (of_property_read_u32(node, "ti,max-pixelclock",
 288                                         &priv->max_pixelclock))
 289                 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
 290
 291         DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
 292
 293         pm_runtime_enable(dev->dev);
 294
 295         /* Determine LCD IP Version */
 296         pm_runtime_get_sync(dev->dev);
 297         switch (tilcdc_read(dev, LCDC_PID_REG)) {
 298         case 0x4c100102:
 299                 priv->rev = 1;
 300                 break;
 301         case 0x4f200800:
 302         case 0x4f201000:
 303                 priv->rev = 2;
 304                 break;
 305         default:
 306                 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
 307                                 "defaulting to LCD revision 1\n",
 308                                 tilcdc_read(dev, LCDC_PID_REG));
 309                 priv->rev = 1;
 310                 break;
 311         }
 312
 313         pm_runtime_put_sync(dev->dev);
 314
 315         ret = modeset_init(dev);
 316         if (ret < 0) {
 317                 dev_err(dev->dev, "failed to initialize mode setting\n");
 318                 goto fail_cpufreq_unregister;
 319         }
 320
 321         platform_set_drvdata(pdev, dev);
 322
 323         if (priv->is_componentized) {
 324                 ret = component_bind_all(dev->dev, dev);
 325                 if (ret < 0)
 326                         goto fail_mode_config_cleanup;
 327
 328                 ret = tilcdc_add_external_encoders(dev, &bpp);
 329                 if (ret < 0)
 330                         goto fail_component_cleanup;
 331         }
 332
 333         if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
 334                 dev_err(dev->dev, "no encoders/connectors found\n");
 335                 ret = -ENXIO;
 336                 goto fail_external_cleanup;
 337         }
 338
 339         ret = drm_vblank_init(dev, 1);
 340         if (ret < 0) {
 341                 dev_err(dev->dev, "failed to initialize vblank\n");
 342                 goto fail_external_cleanup;
 343         }
 344
 345         ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
 346         if (ret < 0) {
 347                 dev_err(dev->dev, "failed to install IRQ handler\n");
 348                 goto fail_vblank_cleanup;
 349         }
 350
 351         list_for_each_entry(mod, &module_list, list) {
 352                 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
 353                 bpp = mod->preferred_bpp;
 354                 if (bpp > 0)
 355                         break;
 356         }
 357
 358         drm_helper_disable_unused_functions(dev);
 359
 360         drm_mode_config_reset(dev);
 361
 362         priv->fbdev = drm_fbdev_cma_init(dev, bpp,
 363                         dev->mode_config.num_crtc,
 364                         dev->mode_config.num_connector);
 365         if (IS_ERR(priv->fbdev)) {
 366                 ret = PTR_ERR(priv->fbdev);
 367                 goto fail_irq_uninstall;
 368         }
 369
 370         drm_kms_helper_poll_init(dev);
 371
 372         return 0;
 373
 374 fail_irq_uninstall:
 375         drm_irq_uninstall(dev);
 376
 377 fail_vblank_cleanup:
 378         drm_vblank_cleanup(dev);
 379
 380 fail_mode_config_cleanup:
 381         drm_mode_config_cleanup(dev);
 382
 383 fail_component_cleanup:
 384         if (priv->is_componentized)
 385                 component_unbind_all(dev->dev, dev);
 386
 387 fail_external_cleanup:
 388         tilcdc_remove_external_encoders(dev);
 389
 390 fail_cpufreq_unregister:
 391         pm_runtime_disable(dev->dev);
 392 #ifdef CONFIG_CPU_FREQ
 393         cpufreq_unregister_notifier(&priv->freq_transition,
 394                         CPUFREQ_TRANSITION_NOTIFIER);
 395
 396 fail_put_clk:
 397 #endif
 398         clk_put(priv->clk);
 399
 400 fail_iounmap:
 401         iounmap(priv->mmio);
 402
 403 fail_free_wq:
 404         flush_workqueue(priv->wq);
 405         destroy_workqueue(priv->wq);
 406
 407 fail_unset_priv:
 408         dev->dev_private = NULL;
 409
 410         return ret;
 411 }
 412
 413 static void tilcdc_lastclose(struct drm_device *dev)
 414 {
 415         struct tilcdc_drm_private *priv = dev->dev_private;
 416         drm_fbdev_cma_restore_mode(priv->fbdev);
 417 }
 418
 419 static irqreturn_t tilcdc_irq(int irq, void *arg)
 420 {
 421         struct drm_device *dev = arg;
 422         struct tilcdc_drm_private *priv = dev->dev_private;
 423         return tilcdc_crtc_irq(priv->crtc);
 424 }
 425
 426 static int tilcdc_enable_vblank(struct drm_device *dev, unsigned int pipe)
 427 {
 428         return 0;
 429 }
 430
 431 static void tilcdc_disable_vblank(struct drm_device *dev, unsigned int pipe)
 432 {
 433         return;
 434 }
 435
 436 #if defined(CONFIG_DEBUG_FS)
 437 static const struct {
 438         const char *name;
 439         uint8_t  rev;
 440         uint8_t  save;
 441         uint32_t reg;
 442 } registers[] =         {
 443 #define REG(rev, save, reg) { #reg, rev, save, reg }
 444                 /* exists in revision 1: */
 445                 REG(1, false, LCDC_PID_REG),
 446                 REG(1, true,  LCDC_CTRL_REG),
 447                 REG(1, false, LCDC_STAT_REG),
 448                 REG(1, true,  LCDC_RASTER_CTRL_REG),
 449                 REG(1, true,  LCDC_RASTER_TIMING_0_REG),
 450                 REG(1, true,  LCDC_RASTER_TIMING_1_REG),
 451                 REG(1, true,  LCDC_RASTER_TIMING_2_REG),
 452                 REG(1, true,  LCDC_DMA_CTRL_REG),
 453                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),
 454                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_0_REG),
 455                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_1_REG),
 456                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_1_REG),
 457                 /* new in revision 2: */
 458                 REG(2, false, LCDC_RAW_STAT_REG),
 459                 REG(2, false, LCDC_MASKED_STAT_REG),
 460                 REG(2, true, LCDC_INT_ENABLE_SET_REG),
 461                 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
 462                 REG(2, false, LCDC_END_OF_INT_IND_REG),
 463                 REG(2, true,  LCDC_CLK_ENABLE_REG),
 464 #undef REG
 465 };
 466
 467 #endif
 468
 469 #ifdef CONFIG_DEBUG_FS
 470 static int tilcdc_regs_show(struct seq_file *m, void *arg)
 471 {
 472         struct drm_info_node *node = (struct drm_info_node *) m->private;
 473         struct drm_device *dev = node->minor->dev;
 474         struct tilcdc_drm_private *priv = dev->dev_private;
 475         unsigned i;
 476
 477         pm_runtime_get_sync(dev->dev);
 478
 479         seq_printf(m, "revision: %d\n", priv->rev);
 480
 481         for (i = 0; i < ARRAY_SIZE(registers); i++)
 482                 if (priv->rev >= registers[i].rev)
 483                         seq_printf(m, "%s:\t %08x\n", registers[i].name,
 484                                         tilcdc_read(dev, registers[i].reg));
 485
 486         pm_runtime_put_sync(dev->dev);
 487
 488         return 0;
 489 }
 490
 491 static int tilcdc_mm_show(struct seq_file *m, void *arg)
 492 {
 493         struct drm_info_node *node = (struct drm_info_node *) m->private;
 494         struct drm_device *dev = node->minor->dev;
 495         return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
 496 }
 497
 498 static struct drm_info_list tilcdc_debugfs_list[] = {
 499                 { "regs", tilcdc_regs_show, 0 },
 500                 { "mm",   tilcdc_mm_show,   0 },
 501                 { "fb",   drm_fb_cma_debugfs_show, 0 },
 502 };
 503
 504 static int tilcdc_debugfs_init(struct drm_minor *minor)
 505 {
 506         struct drm_device *dev = minor->dev;
 507         struct tilcdc_module *mod;
 508         int ret;
 509
 510         ret = drm_debugfs_create_files(tilcdc_debugfs_list,
 511                         ARRAY_SIZE(tilcdc_debugfs_list),
 512                         minor->debugfs_root, minor);
 513
 514         list_for_each_entry(mod, &module_list, list)
 515                 if (mod->funcs->debugfs_init)
 516                         mod->funcs->debugfs_init(mod, minor);
 517
 518         if (ret) {
 519                 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
 520                 return ret;
 521         }
 522
 523         return ret;
 524 }
 525
 526 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
 527 {
 528         struct tilcdc_module *mod;
 529         drm_debugfs_remove_files(tilcdc_debugfs_list,
 530                         ARRAY_SIZE(tilcdc_debugfs_list), minor);
 531
 532         list_for_each_entry(mod, &module_list, list)
 533                 if (mod->funcs->debugfs_cleanup)
 534                         mod->funcs->debugfs_cleanup(mod, minor);
 535 }
 536 #endif
 537
 538 static const struct file_operations fops = {
 539         .owner              = THIS_MODULE,
 540         .open               = drm_open,
 541         .release            = drm_release,
 542         .unlocked_ioctl     = drm_ioctl,
 543 #ifdef CONFIG_COMPAT
 544         .compat_ioctl       = drm_compat_ioctl,
 545 #endif
 546         .poll               = drm_poll,
 547         .read               = drm_read,
 548         .llseek             = no_llseek,
 549         .mmap               = drm_gem_cma_mmap,
 550 };
 551
 552 static struct drm_driver tilcdc_driver = {
 553         .driver_features    = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET |
 554                                DRIVER_PRIME | DRIVER_ATOMIC),
 555         .load               = tilcdc_load,
 556         .unload             = tilcdc_unload,
 557         .lastclose          = tilcdc_lastclose,
 558         .irq_handler        = tilcdc_irq,
 559         .get_vblank_counter = drm_vblank_no_hw_counter,
 560         .enable_vblank      = tilcdc_enable_vblank,
 561         .disable_vblank     = tilcdc_disable_vblank,
 562         .gem_free_object_unlocked = drm_gem_cma_free_object,
 563         .gem_vm_ops         = &drm_gem_cma_vm_ops,
 564         .dumb_create        = drm_gem_cma_dumb_create,
 565         .dumb_map_offset    = drm_gem_cma_dumb_map_offset,
 566         .dumb_destroy       = drm_gem_dumb_destroy,
 567
 568         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
 569         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
 570         .gem_prime_import       = drm_gem_prime_import,
 571         .gem_prime_export       = drm_gem_prime_export,
 572         .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
 573         .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
 574         .gem_prime_vmap         = drm_gem_cma_prime_vmap,
 575         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
 576         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
 577 #ifdef CONFIG_DEBUG_FS
 578         .debugfs_init       = tilcdc_debugfs_init,
 579         .debugfs_cleanup    = tilcdc_debugfs_cleanup,
 580 #endif
 581         .fops               = &fops,
 582         .name               = "tilcdc",
 583         .desc               = "TI LCD Controller DRM",
 584         .date               = "20121205",
 585         .major              = 1,
 586         .minor              = 0,
 587 };
 588
 589 /*
 590  * Power management:
 591  */
 592
 593 #ifdef CONFIG_PM_SLEEP
 594 static int tilcdc_pm_suspend(struct device *dev)
 595 {
 596         struct drm_device *ddev = dev_get_drvdata(dev);
 597         struct tilcdc_drm_private *priv = ddev->dev_private;
 598
 599         priv->saved_state = drm_atomic_helper_suspend(ddev);
 600
 601         /* Select sleep pin state */
 602         pinctrl_pm_select_sleep_state(dev);
 603
 604         return 0;
 605 }
 606
 607 static int tilcdc_pm_resume(struct device *dev)
 608 {
 609         struct drm_device *ddev = dev_get_drvdata(dev);
 610         struct tilcdc_drm_private *priv = ddev->dev_private;
 611         int ret = 0;
 612
 613         /* Select default pin state */
 614         pinctrl_pm_select_default_state(dev);
 615
 616         if (priv->saved_state)
 617                 ret = drm_atomic_helper_resume(ddev, priv->saved_state);
 618
 619         return ret;
 620 }
 621 #endif
 622
 623 static const struct dev_pm_ops tilcdc_pm_ops = {
 624         SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
 625 };
 626
 627 /*
 628  * Platform driver:
 629  */
 630
 631 static int tilcdc_bind(struct device *dev)
 632 {
 633         return drm_platform_init(&tilcdc_driver, to_platform_device(dev));
 634 }
 635
 636 static void tilcdc_unbind(struct device *dev)
 637 {
 638         struct drm_device *ddev = dev_get_drvdata(dev);
 639
 640         /* Check if a subcomponent has already triggered the unloading. */
 641         if (!ddev->dev_private)
 642                 return;
 643
 644         drm_put_dev(dev_get_drvdata(dev));
 645 }
 646
 647 static const struct component_master_ops tilcdc_comp_ops = {
 648         .bind = tilcdc_bind,
 649         .unbind = tilcdc_unbind,
 650 };
 651
 652 static int tilcdc_pdev_probe(struct platform_device *pdev)
 653 {
 654         struct component_match *match = NULL;
 655         int ret;
 656
 657         /* bail out early if no DT data: */
 658         if (!pdev->dev.of_node) {
 659                 dev_err(&pdev->dev, "device-tree data is missing\n");
 660                 return -ENXIO;
 661         }
 662
 663         ret = tilcdc_get_external_components(&pdev->dev, &match);
 664         if (ret < 0)
 665                 return ret;
 666         else if (ret == 0)
 667                 return drm_platform_init(&tilcdc_driver, pdev);
 668         else
 669                 return component_master_add_with_match(&pdev->dev,
 670                                                        &tilcdc_comp_ops,
 671                                                        match);
 672 }
 673
 674 static int tilcdc_pdev_remove(struct platform_device *pdev)
 675 {
 676         int ret;
 677
 678         ret = tilcdc_get_external_components(&pdev->dev, NULL);
 679         if (ret < 0)
 680                 return ret;
 681         else if (ret == 0)
 682                 drm_put_dev(platform_get_drvdata(pdev));
 683         else
 684                 component_master_del(&pdev->dev, &tilcdc_comp_ops);
 685
 686         return 0;
 687 }
 688
 689 static struct of_device_id tilcdc_of_match[] = {
 690                 { .compatible = "ti,am33xx-tilcdc", },
 691                 { },
 692 };
 693 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
 694
 695 static struct platform_driver tilcdc_platform_driver = {
 696         .probe      = tilcdc_pdev_probe,
 697         .remove     = tilcdc_pdev_remove,
 698         .driver     = {
 699                 .name   = "tilcdc",
 700                 .pm     = &tilcdc_pm_ops,
 701                 .of_match_table = tilcdc_of_match,
 702         },
 703 };
 704
 705 static int __init tilcdc_drm_init(void)
 706 {
 707         DBG("init");
 708         tilcdc_tfp410_init();
 709         tilcdc_panel_init();
 710         return platform_driver_register(&tilcdc_platform_driver);
 711 }
 712
 713 static void __exit tilcdc_drm_fini(void)
 714 {
 715         DBG("fini");
 716         platform_driver_unregister(&tilcdc_platform_driver);
 717         tilcdc_panel_fini();
 718         tilcdc_tfp410_fini();
 719 }
 720
 721 module_init(tilcdc_drm_init);
 722 module_exit(tilcdc_drm_fini);
 723
 724 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 725 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
 726 MODULE_LICENSE("GPL");