1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
7 #include <drm/drm_atomic.h>
8 #include <drm/drm_atomic_helper.h>
9 #include <drm/drm_crtc.h>
10 #include <drm/drm_gem_dma_helper.h>
11 #include <drm/drm_vblank.h>
13 #include "tidss_crtc.h"
14 #include "tidss_dispc.h"
15 #include "tidss_drv.h"
16 #include "tidss_irq.h"
17 #include "tidss_plane.h"
19 /* Page flip and frame done IRQs */
21 static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc)
23 struct drm_device *ddev = tcrtc->crtc.dev;
24 struct tidss_device *tidss = to_tidss(ddev);
25 struct drm_pending_vblank_event *event;
29 spin_lock_irqsave(&ddev->event_lock, flags);
32 * New settings are taken into use at VFP, and GO bit is cleared at
33 * the same time. This happens before the vertical blank interrupt.
34 * So there is a small change that the driver sets GO bit after VFP, but
35 * before vblank, and we have to check for that case here.
37 busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport);
39 spin_unlock_irqrestore(&ddev->event_lock, flags);
47 spin_unlock_irqrestore(&ddev->event_lock, flags);
51 drm_crtc_send_vblank_event(&tcrtc->crtc, event);
53 spin_unlock_irqrestore(&ddev->event_lock, flags);
55 drm_crtc_vblank_put(&tcrtc->crtc);
58 void tidss_crtc_vblank_irq(struct drm_crtc *crtc)
60 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
62 drm_crtc_handle_vblank(crtc);
64 tidss_crtc_finish_page_flip(tcrtc);
67 void tidss_crtc_framedone_irq(struct drm_crtc *crtc)
69 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
71 complete(&tcrtc->framedone_completion);
74 void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus)
76 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
78 dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n",
79 tcrtc->hw_videoport, irqstatus);
82 /* drm_crtc_helper_funcs */
84 static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
85 struct drm_atomic_state *state)
87 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
89 struct drm_device *ddev = crtc->dev;
90 struct tidss_device *tidss = to_tidss(ddev);
91 struct dispc_device *dispc = tidss->dispc;
92 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
93 u32 hw_videoport = tcrtc->hw_videoport;
94 const struct drm_display_mode *mode;
95 enum drm_mode_status ok;
97 dev_dbg(ddev->dev, "%s\n", __func__);
99 if (!crtc_state->enable)
102 mode = &crtc_state->adjusted_mode;
104 ok = dispc_vp_mode_valid(dispc, hw_videoport, mode);
106 dev_dbg(ddev->dev, "%s: bad mode: %ux%u pclk %u kHz\n",
107 __func__, mode->hdisplay, mode->vdisplay, mode->clock);
111 return dispc_vp_bus_check(dispc, hw_videoport, crtc_state);
115 * This needs all affected planes to be present in the atomic
116 * state. The untouched planes are added to the state in
117 * tidss_atomic_check().
119 static void tidss_crtc_position_planes(struct tidss_device *tidss,
120 struct drm_crtc *crtc,
121 struct drm_crtc_state *old_state,
124 struct drm_atomic_state *ostate = old_state->state;
125 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
126 struct drm_crtc_state *cstate = crtc->state;
129 if (!newmodeset && !cstate->zpos_changed &&
130 !to_tidss_crtc_state(cstate)->plane_pos_changed)
133 for (layer = 0; layer < tidss->feat->num_planes; layer++) {
134 struct drm_plane_state *pstate;
135 struct drm_plane *plane;
136 bool layer_active = false;
139 for_each_new_plane_in_state(ostate, plane, pstate, i) {
140 if (pstate->crtc != crtc || !pstate->visible)
143 if (pstate->normalized_zpos == layer) {
150 struct tidss_plane *tplane = to_tidss_plane(plane);
152 dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id,
154 pstate->crtc_x, pstate->crtc_y,
157 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer,
162 static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
163 struct drm_atomic_state *state)
165 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
167 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
168 struct drm_device *ddev = crtc->dev;
169 struct tidss_device *tidss = to_tidss(ddev);
172 dev_dbg(ddev->dev, "%s: %s is %sactive, %s modeset, event %p\n",
173 __func__, crtc->name, crtc->state->active ? "" : "not ",
174 drm_atomic_crtc_needs_modeset(crtc->state) ? "needs" : "doesn't need",
177 /* There is nothing to do if CRTC is not going to be enabled. */
178 if (!crtc->state->active)
182 * Flush CRTC changes with go bit only if new modeset is not
183 * coming, so CRTC is enabled trough out the commit.
185 if (drm_atomic_crtc_needs_modeset(crtc->state))
188 /* If the GO bit is stuck we better quit here. */
189 if (WARN_ON(dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport)))
192 /* We should have event if CRTC is enabled through out this commit. */
193 if (WARN_ON(!crtc->state->event))
196 /* Write vp properties to HW if needed. */
197 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
199 /* Update plane positions if needed. */
200 tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false);
202 WARN_ON(drm_crtc_vblank_get(crtc) != 0);
204 spin_lock_irqsave(&ddev->event_lock, flags);
205 dispc_vp_go(tidss->dispc, tcrtc->hw_videoport);
207 WARN_ON(tcrtc->event);
209 tcrtc->event = crtc->state->event;
210 crtc->state->event = NULL;
212 spin_unlock_irqrestore(&ddev->event_lock, flags);
215 static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,
216 struct drm_atomic_state *state)
218 struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
220 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
221 struct drm_device *ddev = crtc->dev;
222 struct tidss_device *tidss = to_tidss(ddev);
223 const struct drm_display_mode *mode = &crtc->state->adjusted_mode;
227 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);
229 tidss_runtime_get(tidss);
231 r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport,
236 r = dispc_vp_enable_clk(tidss->dispc, tcrtc->hw_videoport);
240 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true);
241 tidss_crtc_position_planes(tidss, crtc, old_state, true);
243 /* Turn vertical blanking interrupt reporting on. */
244 drm_crtc_vblank_on(crtc);
246 dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state);
248 dispc_vp_enable(tidss->dispc, tcrtc->hw_videoport, crtc->state);
250 spin_lock_irqsave(&ddev->event_lock, flags);
252 if (crtc->state->event) {
253 drm_crtc_send_vblank_event(crtc, crtc->state->event);
254 crtc->state->event = NULL;
257 spin_unlock_irqrestore(&ddev->event_lock, flags);
260 static void tidss_crtc_atomic_disable(struct drm_crtc *crtc,
261 struct drm_atomic_state *state)
263 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
264 struct drm_device *ddev = crtc->dev;
265 struct tidss_device *tidss = to_tidss(ddev);
268 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);
270 reinit_completion(&tcrtc->framedone_completion);
272 dispc_vp_disable(tidss->dispc, tcrtc->hw_videoport);
274 if (!wait_for_completion_timeout(&tcrtc->framedone_completion,
275 msecs_to_jiffies(500)))
276 dev_err(tidss->dev, "Timeout waiting for framedone on crtc %d",
277 tcrtc->hw_videoport);
279 dispc_vp_unprepare(tidss->dispc, tcrtc->hw_videoport);
281 spin_lock_irqsave(&ddev->event_lock, flags);
282 if (crtc->state->event) {
283 drm_crtc_send_vblank_event(crtc, crtc->state->event);
284 crtc->state->event = NULL;
286 spin_unlock_irqrestore(&ddev->event_lock, flags);
288 drm_crtc_vblank_off(crtc);
290 dispc_vp_disable_clk(tidss->dispc, tcrtc->hw_videoport);
292 tidss_runtime_put(tidss);
296 enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc,
297 const struct drm_display_mode *mode)
299 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
300 struct drm_device *ddev = crtc->dev;
301 struct tidss_device *tidss = to_tidss(ddev);
303 return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode);
306 static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = {
307 .atomic_check = tidss_crtc_atomic_check,
308 .atomic_flush = tidss_crtc_atomic_flush,
309 .atomic_enable = tidss_crtc_atomic_enable,
310 .atomic_disable = tidss_crtc_atomic_disable,
312 .mode_valid = tidss_crtc_mode_valid,
317 static int tidss_crtc_enable_vblank(struct drm_crtc *crtc)
319 struct drm_device *ddev = crtc->dev;
320 struct tidss_device *tidss = to_tidss(ddev);
322 dev_dbg(ddev->dev, "%s\n", __func__);
324 tidss_runtime_get(tidss);
326 tidss_irq_enable_vblank(crtc);
331 static void tidss_crtc_disable_vblank(struct drm_crtc *crtc)
333 struct drm_device *ddev = crtc->dev;
334 struct tidss_device *tidss = to_tidss(ddev);
336 dev_dbg(ddev->dev, "%s\n", __func__);
338 tidss_irq_disable_vblank(crtc);
340 tidss_runtime_put(tidss);
343 static void tidss_crtc_reset(struct drm_crtc *crtc)
345 struct tidss_crtc_state *tcrtc;
348 __drm_atomic_helper_crtc_destroy_state(crtc->state);
352 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL);
358 __drm_atomic_helper_crtc_reset(crtc, &tcrtc->base);
361 static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc)
363 struct tidss_crtc_state *state, *current_state;
365 if (WARN_ON(!crtc->state))
368 current_state = to_tidss_crtc_state(crtc->state);
370 state = kmalloc(sizeof(*state), GFP_KERNEL);
374 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
376 state->plane_pos_changed = false;
378 state->bus_format = current_state->bus_format;
379 state->bus_flags = current_state->bus_flags;
384 static void tidss_crtc_destroy(struct drm_crtc *crtc)
386 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
388 drm_crtc_cleanup(crtc);
392 static const struct drm_crtc_funcs tidss_crtc_funcs = {
393 .reset = tidss_crtc_reset,
394 .destroy = tidss_crtc_destroy,
395 .set_config = drm_atomic_helper_set_config,
396 .page_flip = drm_atomic_helper_page_flip,
397 .atomic_duplicate_state = tidss_crtc_duplicate_state,
398 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
399 .enable_vblank = tidss_crtc_enable_vblank,
400 .disable_vblank = tidss_crtc_disable_vblank,
403 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss,
405 struct drm_plane *primary)
407 struct tidss_crtc *tcrtc;
408 struct drm_crtc *crtc;
409 unsigned int gamma_lut_size = 0;
410 bool has_ctm = tidss->feat->vp_feat.color.has_ctm;
413 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL);
415 return ERR_PTR(-ENOMEM);
417 tcrtc->hw_videoport = hw_videoport;
418 init_completion(&tcrtc->framedone_completion);
422 ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary,
423 NULL, &tidss_crtc_funcs, NULL);
429 drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs);
432 * The dispc gamma functions adapt to what ever size we ask
433 * from it no matter what HW supports. X-server assumes 256
434 * element gamma tables so lets use that.
436 if (tidss->feat->vp_feat.color.gamma_size)
437 gamma_lut_size = 256;
439 drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size);
441 drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size);