1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2013 NVIDIA Corporation
6 #ifndef DRM_TEGRA_MIPI_PHY_H
7 #define DRM_TEGRA_MIPI_PHY_H
10 * D-PHY timing parameters
12 * A detailed description of these parameters can be found in the MIPI
13 * Alliance Specification for D-PHY, Section 5.9 "Global Operation Timing
16 * All parameters are specified in nanoseconds.
18 struct mipi_dphy_timing {
22 unsigned int clkprepare;
23 unsigned int clksettle;
24 unsigned int clktermen;
25 unsigned int clktrail;
30 unsigned int hsprepare;
32 unsigned int hssettle;
43 int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
44 unsigned long period);
45 int mipi_dphy_timing_validate(struct mipi_dphy_timing *timing,
46 unsigned long period);