1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2013 Avionic Design GmbH
4 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
6 * Based on the KMS/FB DMA helpers
7 * Copyright (C) 2012 Analog Devices Inc.
10 #include <linux/console.h>
12 #include <drm/drm_fourcc.h>
13 #include <drm/drm_framebuffer.h>
14 #include <drm/drm_gem_framebuffer_helper.h>
15 #include <drm/drm_modeset_helper.h>
20 struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
23 return to_tegra_bo(drm_gem_fb_get_obj(framebuffer, index));
26 bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer)
28 struct tegra_bo *bo = tegra_fb_get_plane(framebuffer, 0);
30 if (bo->flags & TEGRA_BO_BOTTOM_UP)
36 int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
37 struct tegra_bo_tiling *tiling)
39 uint64_t modifier = framebuffer->modifier;
41 if (fourcc_mod_is_vendor(modifier, NVIDIA)) {
42 if ((modifier & DRM_FORMAT_MOD_NVIDIA_SECTOR_LAYOUT) == 0)
43 tiling->sector_layout = TEGRA_BO_SECTOR_LAYOUT_TEGRA;
45 tiling->sector_layout = TEGRA_BO_SECTOR_LAYOUT_GPU;
47 modifier &= ~DRM_FORMAT_MOD_NVIDIA_SECTOR_LAYOUT;
51 case DRM_FORMAT_MOD_LINEAR:
52 tiling->mode = TEGRA_BO_TILING_MODE_PITCH;
56 case DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED:
57 tiling->mode = TEGRA_BO_TILING_MODE_TILED;
61 case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0):
62 tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
66 case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1):
67 tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
71 case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2):
72 tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
76 case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3):
77 tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
81 case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4):
82 tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
86 case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5):
87 tiling->mode = TEGRA_BO_TILING_MODE_BLOCK;
92 DRM_DEBUG_KMS("unknown format modifier: %llx\n", modifier);
99 static const struct drm_framebuffer_funcs tegra_fb_funcs = {
100 .destroy = drm_gem_fb_destroy,
101 .create_handle = drm_gem_fb_create_handle,
104 struct drm_framebuffer *tegra_fb_alloc(struct drm_device *drm,
105 const struct drm_mode_fb_cmd2 *mode_cmd,
106 struct tegra_bo **planes,
107 unsigned int num_planes)
109 struct drm_framebuffer *fb;
113 fb = kzalloc(sizeof(*fb), GFP_KERNEL);
115 return ERR_PTR(-ENOMEM);
117 drm_helper_mode_fill_fb_struct(drm, fb, mode_cmd);
119 for (i = 0; i < fb->format->num_planes; i++)
120 fb->obj[i] = &planes[i]->gem;
122 err = drm_framebuffer_init(drm, fb, &tegra_fb_funcs);
124 dev_err(drm->dev, "failed to initialize framebuffer: %d\n",
133 struct drm_framebuffer *tegra_fb_create(struct drm_device *drm,
134 struct drm_file *file,
135 const struct drm_mode_fb_cmd2 *cmd)
137 const struct drm_format_info *info = drm_get_format_info(drm, cmd);
138 struct tegra_bo *planes[4];
139 struct drm_gem_object *gem;
140 struct drm_framebuffer *fb;
144 for (i = 0; i < info->num_planes; i++) {
145 unsigned int width = cmd->width / (i ? info->hsub : 1);
146 unsigned int height = cmd->height / (i ? info->vsub : 1);
147 unsigned int size, bpp;
149 gem = drm_gem_object_lookup(file, cmd->handles[i]);
157 size = (height - 1) * cmd->pitches[i] +
158 width * bpp + cmd->offsets[i];
160 if (gem->size < size) {
165 planes[i] = to_tegra_bo(gem);
168 fb = tegra_fb_alloc(drm, cmd, planes, i);
178 drm_gem_object_put(&planes[i]->gem);