1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics SA 2014
4 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
8 #include <linux/component.h>
9 #include <linux/debugfs.h>
10 #include <linux/hdmi.h>
11 #include <linux/i2c.h>
12 #include <linux/module.h>
14 #include <linux/platform_device.h>
15 #include <linux/reset.h>
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_bridge.h>
19 #include <drm/drm_debugfs.h>
20 #include <drm/drm_drv.h>
21 #include <drm/drm_edid.h>
22 #include <drm/drm_file.h>
23 #include <drm/drm_print.h>
24 #include <drm/drm_probe_helper.h>
26 #include <sound/hdmi-codec.h>
29 #include "sti_hdmi_tx3g4c28phy.h"
32 #define HDMI_CFG 0x0000
33 #define HDMI_INT_EN 0x0004
34 #define HDMI_INT_STA 0x0008
35 #define HDMI_INT_CLR 0x000C
36 #define HDMI_STA 0x0010
37 #define HDMI_ACTIVE_VID_XMIN 0x0100
38 #define HDMI_ACTIVE_VID_XMAX 0x0104
39 #define HDMI_ACTIVE_VID_YMIN 0x0108
40 #define HDMI_ACTIVE_VID_YMAX 0x010C
41 #define HDMI_DFLT_CHL0_DAT 0x0110
42 #define HDMI_DFLT_CHL1_DAT 0x0114
43 #define HDMI_DFLT_CHL2_DAT 0x0118
44 #define HDMI_AUDIO_CFG 0x0200
45 #define HDMI_SPDIF_FIFO_STATUS 0x0204
46 #define HDMI_SW_DI_1_HEAD_WORD 0x0210
47 #define HDMI_SW_DI_1_PKT_WORD0 0x0214
48 #define HDMI_SW_DI_1_PKT_WORD1 0x0218
49 #define HDMI_SW_DI_1_PKT_WORD2 0x021C
50 #define HDMI_SW_DI_1_PKT_WORD3 0x0220
51 #define HDMI_SW_DI_1_PKT_WORD4 0x0224
52 #define HDMI_SW_DI_1_PKT_WORD5 0x0228
53 #define HDMI_SW_DI_1_PKT_WORD6 0x022C
54 #define HDMI_SW_DI_CFG 0x0230
55 #define HDMI_SAMPLE_FLAT_MASK 0x0244
56 #define HDMI_AUDN 0x0400
57 #define HDMI_AUD_CTS 0x0404
58 #define HDMI_SW_DI_2_HEAD_WORD 0x0600
59 #define HDMI_SW_DI_2_PKT_WORD0 0x0604
60 #define HDMI_SW_DI_2_PKT_WORD1 0x0608
61 #define HDMI_SW_DI_2_PKT_WORD2 0x060C
62 #define HDMI_SW_DI_2_PKT_WORD3 0x0610
63 #define HDMI_SW_DI_2_PKT_WORD4 0x0614
64 #define HDMI_SW_DI_2_PKT_WORD5 0x0618
65 #define HDMI_SW_DI_2_PKT_WORD6 0x061C
66 #define HDMI_SW_DI_3_HEAD_WORD 0x0620
67 #define HDMI_SW_DI_3_PKT_WORD0 0x0624
68 #define HDMI_SW_DI_3_PKT_WORD1 0x0628
69 #define HDMI_SW_DI_3_PKT_WORD2 0x062C
70 #define HDMI_SW_DI_3_PKT_WORD3 0x0630
71 #define HDMI_SW_DI_3_PKT_WORD4 0x0634
72 #define HDMI_SW_DI_3_PKT_WORD5 0x0638
73 #define HDMI_SW_DI_3_PKT_WORD6 0x063C
75 #define HDMI_IFRAME_SLOT_AVI 1
76 #define HDMI_IFRAME_SLOT_AUDIO 2
77 #define HDMI_IFRAME_SLOT_VENDOR 3
79 #define XCAT(prefix, x, suffix) prefix ## x ## suffix
80 #define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD)
81 #define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0)
82 #define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1)
83 #define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2)
84 #define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3)
85 #define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4)
86 #define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5)
87 #define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6)
89 #define HDMI_SW_DI_MAX_WORD 7
91 #define HDMI_IFRAME_DISABLED 0x0
92 #define HDMI_IFRAME_SINGLE_SHOT 0x1
93 #define HDMI_IFRAME_FIELD 0x2
94 #define HDMI_IFRAME_FRAME 0x3
95 #define HDMI_IFRAME_MASK 0x3
96 #define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */
98 #define HDMI_CFG_DEVICE_EN BIT(0)
99 #define HDMI_CFG_HDMI_NOT_DVI BIT(1)
100 #define HDMI_CFG_HDCP_EN BIT(2)
101 #define HDMI_CFG_ESS_NOT_OESS BIT(3)
102 #define HDMI_CFG_H_SYNC_POL_NEG BIT(4)
103 #define HDMI_CFG_V_SYNC_POL_NEG BIT(6)
104 #define HDMI_CFG_422_EN BIT(8)
105 #define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12)
106 #define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13)
107 #define HDMI_CFG_SW_RST_EN BIT(31)
109 #define HDMI_INT_GLOBAL BIT(0)
110 #define HDMI_INT_SW_RST BIT(1)
111 #define HDMI_INT_PIX_CAP BIT(3)
112 #define HDMI_INT_HOT_PLUG BIT(4)
113 #define HDMI_INT_DLL_LCK BIT(5)
114 #define HDMI_INT_NEW_FRAME BIT(6)
115 #define HDMI_INT_GENCTRL_PKT BIT(7)
116 #define HDMI_INT_AUDIO_FIFO_XRUN BIT(8)
117 #define HDMI_INT_SINK_TERM_PRESENT BIT(11)
119 #define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
121 | HDMI_INT_HOT_PLUG \
124 #define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
125 | HDMI_INT_AUDIO_FIFO_XRUN \
126 | HDMI_INT_GENCTRL_PKT \
127 | HDMI_INT_NEW_FRAME \
129 | HDMI_INT_HOT_PLUG \
134 #define HDMI_STA_SW_RST BIT(1)
136 #define HDMI_AUD_CFG_8CH BIT(0)
137 #define HDMI_AUD_CFG_SPDIF_DIV_2 BIT(1)
138 #define HDMI_AUD_CFG_SPDIF_DIV_3 BIT(2)
139 #define HDMI_AUD_CFG_SPDIF_CLK_DIV_4 (BIT(1) | BIT(2))
140 #define HDMI_AUD_CFG_CTS_CLK_256FS BIT(12)
141 #define HDMI_AUD_CFG_DTS_INVALID BIT(16)
142 #define HDMI_AUD_CFG_ONE_BIT_INVALID (BIT(18) | BIT(19) | BIT(20) | BIT(21))
143 #define HDMI_AUD_CFG_CH12_VALID BIT(28)
144 #define HDMI_AUD_CFG_CH34_VALID BIT(29)
145 #define HDMI_AUD_CFG_CH56_VALID BIT(30)
146 #define HDMI_AUD_CFG_CH78_VALID BIT(31)
148 /* sample flat mask */
149 #define HDMI_SAMPLE_FLAT_NO 0
150 #define HDMI_SAMPLE_FLAT_SP0 BIT(0)
151 #define HDMI_SAMPLE_FLAT_SP1 BIT(1)
152 #define HDMI_SAMPLE_FLAT_SP2 BIT(2)
153 #define HDMI_SAMPLE_FLAT_SP3 BIT(3)
154 #define HDMI_SAMPLE_FLAT_ALL (HDMI_SAMPLE_FLAT_SP0 | HDMI_SAMPLE_FLAT_SP1 |\
155 HDMI_SAMPLE_FLAT_SP2 | HDMI_SAMPLE_FLAT_SP3)
157 #define HDMI_INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0)
158 #define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8)
159 #define HDMI_INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16)
161 struct sti_hdmi_connector {
162 struct drm_connector drm_connector;
163 struct drm_encoder *encoder;
164 struct sti_hdmi *hdmi;
165 struct drm_property *colorspace_property;
168 #define to_sti_hdmi_connector(x) \
169 container_of(x, struct sti_hdmi_connector, drm_connector)
171 static const struct drm_prop_enum_list colorspace_mode_names[] = {
172 { HDMI_COLORSPACE_RGB, "rgb" },
173 { HDMI_COLORSPACE_YUV422, "yuv422" },
174 { HDMI_COLORSPACE_YUV444, "yuv444" },
177 u32 hdmi_read(struct sti_hdmi *hdmi, int offset)
179 return readl(hdmi->regs + offset);
182 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset)
184 writel(val, hdmi->regs + offset);
188 * HDMI interrupt handler threaded
191 * @arg: connector structure
193 static irqreturn_t hdmi_irq_thread(int irq, void *arg)
195 struct sti_hdmi *hdmi = arg;
197 /* Hot plug/unplug IRQ */
198 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) {
199 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
201 drm_helper_hpd_irq_event(hdmi->drm_dev);
204 /* Sw reset and PLL lock are exclusive so we can use the same
205 * event to signal them
207 if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) {
208 hdmi->event_received = true;
209 wake_up_interruptible(&hdmi->wait_event);
212 /* Audio FIFO underrun IRQ */
213 if (hdmi->irq_status & HDMI_INT_AUDIO_FIFO_XRUN)
214 DRM_INFO("Warning: audio FIFO underrun occurs!\n");
220 * HDMI interrupt handler
223 * @arg: connector structure
225 static irqreturn_t hdmi_irq(int irq, void *arg)
227 struct sti_hdmi *hdmi = arg;
229 /* read interrupt status */
230 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA);
232 /* clear interrupt status */
233 hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
235 /* force sync bus write */
236 hdmi_read(hdmi, HDMI_INT_STA);
238 return IRQ_WAKE_THREAD;
242 * Set hdmi active area depending on the drm display mode selected
244 * @hdmi: pointer on the hdmi internal structure
246 static void hdmi_active_area(struct sti_hdmi *hdmi)
251 xmin = sti_vtg_get_pixel_number(hdmi->mode, 1);
252 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay);
253 ymin = sti_vtg_get_line_number(hdmi->mode, 0);
254 ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1);
256 hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
257 hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
258 hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
259 hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
263 * Overall hdmi configuration
265 * @hdmi: pointer on the hdmi internal structure
267 static void hdmi_config(struct sti_hdmi *hdmi)
271 DRM_DEBUG_DRIVER("\n");
273 /* Clear overrun and underrun fifo */
274 conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR;
276 /* Select encryption type and the framing mode */
277 conf |= HDMI_CFG_ESS_NOT_OESS;
278 if (hdmi->hdmi_monitor)
279 conf |= HDMI_CFG_HDMI_NOT_DVI;
281 /* Set Hsync polarity */
282 if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) {
283 DRM_DEBUG_DRIVER("H Sync Negative\n");
284 conf |= HDMI_CFG_H_SYNC_POL_NEG;
287 /* Set Vsync polarity */
288 if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) {
289 DRM_DEBUG_DRIVER("V Sync Negative\n");
290 conf |= HDMI_CFG_V_SYNC_POL_NEG;
294 conf |= HDMI_CFG_DEVICE_EN;
296 hdmi_write(hdmi, conf, HDMI_CFG);
300 * Helper to reset info frame
302 * @hdmi: pointer on the hdmi internal structure
303 * @slot: infoframe to reset
305 static void hdmi_infoframe_reset(struct sti_hdmi *hdmi,
309 u32 head_offset, pack_offset;
312 case HDMI_IFRAME_SLOT_AVI:
313 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
314 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
316 case HDMI_IFRAME_SLOT_AUDIO:
317 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
318 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
320 case HDMI_IFRAME_SLOT_VENDOR:
321 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR);
322 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR);
325 DRM_ERROR("unsupported infoframe slot: %#x\n", slot);
329 /* Disable transmission for the selected slot */
330 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
331 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
332 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
334 /* Reset info frame registers */
335 hdmi_write(hdmi, 0x0, head_offset);
336 for (i = 0; i < HDMI_SW_DI_MAX_WORD; i += sizeof(u32))
337 hdmi_write(hdmi, 0x0, pack_offset + i);
341 * Helper to concatenate infoframe in 32 bits word
343 * @ptr: pointer on the hdmi internal structure
344 * @size: size to write
346 static inline unsigned int hdmi_infoframe_subpack(const u8 *ptr, size_t size)
348 unsigned long value = 0;
351 for (i = size; i > 0; i--)
352 value = (value << 8) | ptr[i - 1];
358 * Helper to write info frame
360 * @hdmi: pointer on the hdmi internal structure
361 * @data: infoframe to write
362 * @size: size to write
364 static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi,
368 const u8 *ptr = data;
369 u32 val, slot, mode, i;
370 u32 head_offset, pack_offset;
373 case HDMI_INFOFRAME_TYPE_AVI:
374 slot = HDMI_IFRAME_SLOT_AVI;
375 mode = HDMI_IFRAME_FIELD;
376 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
377 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
379 case HDMI_INFOFRAME_TYPE_AUDIO:
380 slot = HDMI_IFRAME_SLOT_AUDIO;
381 mode = HDMI_IFRAME_FRAME;
382 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
383 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
385 case HDMI_INFOFRAME_TYPE_VENDOR:
386 slot = HDMI_IFRAME_SLOT_VENDOR;
387 mode = HDMI_IFRAME_FRAME;
388 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR);
389 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR);
392 DRM_ERROR("unsupported infoframe type: %#x\n", *ptr);
396 /* Disable transmission slot for updated infoframe */
397 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
398 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
399 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
401 val = HDMI_INFOFRAME_HEADER_TYPE(*ptr++);
402 val |= HDMI_INFOFRAME_HEADER_VERSION(*ptr++);
403 val |= HDMI_INFOFRAME_HEADER_LEN(*ptr++);
404 writel(val, hdmi->regs + head_offset);
407 * Each subpack contains 4 bytes
408 * The First Bytes of the first subpacket must contain the checksum
409 * Packet size is increase by one.
411 size = size - HDMI_INFOFRAME_HEADER_SIZE + 1;
412 for (i = 0; i < size; i += sizeof(u32)) {
415 num = min_t(size_t, size - i, sizeof(u32));
416 val = hdmi_infoframe_subpack(ptr, num);
418 writel(val, hdmi->regs + pack_offset + i);
421 /* Enable transmission slot for updated infoframe */
422 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
423 val |= HDMI_IFRAME_CFG_DI_N(mode, slot);
424 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
428 * Prepare and configure the AVI infoframe
430 * AVI infoframe are transmitted at least once per two video field and
431 * contains information about HDMI transmission mode such as color space,
434 * @hdmi: pointer on the hdmi internal structure
436 * Return negative value if error occurs
438 static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
440 struct drm_display_mode *mode = &hdmi->mode;
441 struct hdmi_avi_infoframe infoframe;
442 u8 buffer[HDMI_INFOFRAME_SIZE(AVI)];
445 DRM_DEBUG_DRIVER("\n");
447 ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe,
448 hdmi->drm_connector, mode);
450 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret);
454 /* fixed infoframe configuration not linked to the mode */
455 infoframe.colorspace = hdmi->colorspace;
456 infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
457 infoframe.colorimetry = HDMI_COLORIMETRY_NONE;
459 ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer));
461 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
465 hdmi_infoframe_write_infopack(hdmi, buffer, ret);
471 * Prepare and configure the AUDIO infoframe
473 * AUDIO infoframe are transmitted once per frame and
474 * contains information about HDMI transmission mode such as audio codec,
477 * @hdmi: pointer on the hdmi internal structure
479 * Return negative value if error occurs
481 static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi)
483 struct hdmi_audio_params *audio = &hdmi->audio;
484 u8 buffer[HDMI_INFOFRAME_SIZE(AUDIO)];
487 DRM_DEBUG_DRIVER("enter %s, AIF %s\n", __func__,
488 audio->enabled ? "enable" : "disable");
489 if (audio->enabled) {
490 /* set audio parameters stored*/
491 ret = hdmi_audio_infoframe_pack(&audio->cea, buffer,
494 DRM_ERROR("failed to pack audio infoframe: %d\n", ret);
497 hdmi_infoframe_write_infopack(hdmi, buffer, ret);
499 /*disable audio info frame transmission */
500 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
501 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK,
502 HDMI_IFRAME_SLOT_AUDIO);
503 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
510 * Prepare and configure the VS infoframe
512 * Vendor Specific infoframe are transmitted once per frame and
513 * contains vendor specific information.
515 * @hdmi: pointer on the hdmi internal structure
517 * Return negative value if error occurs
519 #define HDMI_VENDOR_INFOFRAME_MAX_SIZE 6
520 static int hdmi_vendor_infoframe_config(struct sti_hdmi *hdmi)
522 struct drm_display_mode *mode = &hdmi->mode;
523 struct hdmi_vendor_infoframe infoframe;
524 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_VENDOR_INFOFRAME_MAX_SIZE];
527 DRM_DEBUG_DRIVER("\n");
529 ret = drm_hdmi_vendor_infoframe_from_display_mode(&infoframe,
534 * Going into that statement does not means vendor infoframe
535 * fails. It just informed us that vendor infoframe is not
536 * needed for the selected mode. Only 4k or stereoscopic 3D
537 * mode requires vendor infoframe. So just simply return 0.
542 ret = hdmi_vendor_infoframe_pack(&infoframe, buffer, sizeof(buffer));
544 DRM_ERROR("failed to pack VS infoframe: %d\n", ret);
548 hdmi_infoframe_write_infopack(hdmi, buffer, ret);
553 #define HDMI_TIMEOUT_SWRESET 100 /*milliseconds */
556 * Software reset of the hdmi subsystem
558 * @hdmi: pointer on the hdmi internal structure
561 static void hdmi_swreset(struct sti_hdmi *hdmi)
565 DRM_DEBUG_DRIVER("\n");
567 /* Enable hdmi_audio clock only during hdmi reset */
568 if (clk_prepare_enable(hdmi->clk_audio))
569 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n");
572 hdmi->event_received = false;
574 val = hdmi_read(hdmi, HDMI_CFG);
575 val |= HDMI_CFG_SW_RST_EN;
576 hdmi_write(hdmi, val, HDMI_CFG);
578 /* Wait reset completed */
579 wait_event_interruptible_timeout(hdmi->wait_event,
580 hdmi->event_received,
582 (HDMI_TIMEOUT_SWRESET));
585 * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is
586 * set to '1' and clk_audio is running.
588 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0)
589 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n");
591 val = hdmi_read(hdmi, HDMI_CFG);
592 val &= ~HDMI_CFG_SW_RST_EN;
593 hdmi_write(hdmi, val, HDMI_CFG);
595 /* Disable hdmi_audio clock. Not used anymore for drm purpose */
596 clk_disable_unprepare(hdmi->clk_audio);
599 #define DBGFS_PRINT_STR(str1, str2) seq_printf(s, "%-24s %s\n", str1, str2)
600 #define DBGFS_PRINT_INT(str1, int2) seq_printf(s, "%-24s %d\n", str1, int2)
601 #define DBGFS_DUMP(str, reg) seq_printf(s, "%s %-25s 0x%08X", str, #reg, \
602 hdmi_read(hdmi, reg))
603 #define DBGFS_DUMP_DI(reg, slot) DBGFS_DUMP("\n", reg(slot))
605 static void hdmi_dbg_cfg(struct seq_file *s, int val)
610 tmp = val & HDMI_CFG_HDMI_NOT_DVI;
611 DBGFS_PRINT_STR("mode:", tmp ? "HDMI" : "DVI");
612 seq_puts(s, "\t\t\t\t\t");
613 tmp = val & HDMI_CFG_HDCP_EN;
614 DBGFS_PRINT_STR("HDCP:", tmp ? "enable" : "disable");
615 seq_puts(s, "\t\t\t\t\t");
616 tmp = val & HDMI_CFG_ESS_NOT_OESS;
617 DBGFS_PRINT_STR("HDCP mode:", tmp ? "ESS enable" : "OESS enable");
618 seq_puts(s, "\t\t\t\t\t");
619 tmp = val & HDMI_CFG_H_SYNC_POL_NEG;
620 DBGFS_PRINT_STR("Hsync polarity:", tmp ? "inverted" : "normal");
621 seq_puts(s, "\t\t\t\t\t");
622 tmp = val & HDMI_CFG_V_SYNC_POL_NEG;
623 DBGFS_PRINT_STR("Vsync polarity:", tmp ? "inverted" : "normal");
624 seq_puts(s, "\t\t\t\t\t");
625 tmp = val & HDMI_CFG_422_EN;
626 DBGFS_PRINT_STR("YUV422 format:", tmp ? "enable" : "disable");
629 static void hdmi_dbg_sta(struct seq_file *s, int val)
634 tmp = (val & HDMI_STA_DLL_LCK);
635 DBGFS_PRINT_STR("pll:", tmp ? "locked" : "not locked");
636 seq_puts(s, "\t\t\t\t\t");
637 tmp = (val & HDMI_STA_HOT_PLUG);
638 DBGFS_PRINT_STR("hdmi cable:", tmp ? "connected" : "not connected");
641 static void hdmi_dbg_sw_di_cfg(struct seq_file *s, int val)
644 char *const en_di[] = {"no transmission",
645 "single transmission",
650 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 1));
651 DBGFS_PRINT_STR("Data island 1:", en_di[tmp]);
652 seq_puts(s, "\t\t\t\t\t");
653 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 2)) >> 4;
654 DBGFS_PRINT_STR("Data island 2:", en_di[tmp]);
655 seq_puts(s, "\t\t\t\t\t");
656 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 3)) >> 8;
657 DBGFS_PRINT_STR("Data island 3:", en_di[tmp]);
658 seq_puts(s, "\t\t\t\t\t");
659 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 4)) >> 12;
660 DBGFS_PRINT_STR("Data island 4:", en_di[tmp]);
661 seq_puts(s, "\t\t\t\t\t");
662 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 5)) >> 16;
663 DBGFS_PRINT_STR("Data island 5:", en_di[tmp]);
664 seq_puts(s, "\t\t\t\t\t");
665 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 6)) >> 20;
666 DBGFS_PRINT_STR("Data island 6:", en_di[tmp]);
669 static int hdmi_dbg_show(struct seq_file *s, void *data)
671 struct drm_info_node *node = s->private;
672 struct sti_hdmi *hdmi = (struct sti_hdmi *)node->info_ent->data;
674 seq_printf(s, "HDMI: (vaddr = 0x%p)", hdmi->regs);
675 DBGFS_DUMP("\n", HDMI_CFG);
676 hdmi_dbg_cfg(s, hdmi_read(hdmi, HDMI_CFG));
677 DBGFS_DUMP("", HDMI_INT_EN);
678 DBGFS_DUMP("\n", HDMI_STA);
679 hdmi_dbg_sta(s, hdmi_read(hdmi, HDMI_STA));
680 DBGFS_DUMP("", HDMI_ACTIVE_VID_XMIN);
682 DBGFS_PRINT_INT("Xmin:", hdmi_read(hdmi, HDMI_ACTIVE_VID_XMIN));
683 DBGFS_DUMP("", HDMI_ACTIVE_VID_XMAX);
685 DBGFS_PRINT_INT("Xmax:", hdmi_read(hdmi, HDMI_ACTIVE_VID_XMAX));
686 DBGFS_DUMP("", HDMI_ACTIVE_VID_YMIN);
688 DBGFS_PRINT_INT("Ymin:", hdmi_read(hdmi, HDMI_ACTIVE_VID_YMIN));
689 DBGFS_DUMP("", HDMI_ACTIVE_VID_YMAX);
691 DBGFS_PRINT_INT("Ymax:", hdmi_read(hdmi, HDMI_ACTIVE_VID_YMAX));
692 DBGFS_DUMP("", HDMI_SW_DI_CFG);
693 hdmi_dbg_sw_di_cfg(s, hdmi_read(hdmi, HDMI_SW_DI_CFG));
695 DBGFS_DUMP("\n", HDMI_AUDIO_CFG);
696 DBGFS_DUMP("\n", HDMI_SPDIF_FIFO_STATUS);
697 DBGFS_DUMP("\n", HDMI_AUDN);
699 seq_printf(s, "\n AVI Infoframe (Data Island slot N=%d):",
700 HDMI_IFRAME_SLOT_AVI);
701 DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_AVI);
702 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD0, HDMI_IFRAME_SLOT_AVI);
703 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD1, HDMI_IFRAME_SLOT_AVI);
704 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD2, HDMI_IFRAME_SLOT_AVI);
705 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD3, HDMI_IFRAME_SLOT_AVI);
706 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD4, HDMI_IFRAME_SLOT_AVI);
707 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD5, HDMI_IFRAME_SLOT_AVI);
708 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD6, HDMI_IFRAME_SLOT_AVI);
709 seq_printf(s, "\n\n AUDIO Infoframe (Data Island slot N=%d):",
710 HDMI_IFRAME_SLOT_AUDIO);
711 DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_AUDIO);
712 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD0, HDMI_IFRAME_SLOT_AUDIO);
713 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD1, HDMI_IFRAME_SLOT_AUDIO);
714 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD2, HDMI_IFRAME_SLOT_AUDIO);
715 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD3, HDMI_IFRAME_SLOT_AUDIO);
716 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD4, HDMI_IFRAME_SLOT_AUDIO);
717 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD5, HDMI_IFRAME_SLOT_AUDIO);
718 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD6, HDMI_IFRAME_SLOT_AUDIO);
719 seq_printf(s, "\n\n VENDOR SPECIFIC Infoframe (Data Island slot N=%d):",
720 HDMI_IFRAME_SLOT_VENDOR);
721 DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_VENDOR);
722 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD0, HDMI_IFRAME_SLOT_VENDOR);
723 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD1, HDMI_IFRAME_SLOT_VENDOR);
724 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD2, HDMI_IFRAME_SLOT_VENDOR);
725 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD3, HDMI_IFRAME_SLOT_VENDOR);
726 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD4, HDMI_IFRAME_SLOT_VENDOR);
727 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD5, HDMI_IFRAME_SLOT_VENDOR);
728 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD6, HDMI_IFRAME_SLOT_VENDOR);
733 static struct drm_info_list hdmi_debugfs_files[] = {
734 { "hdmi", hdmi_dbg_show, 0, NULL },
737 static void hdmi_debugfs_init(struct sti_hdmi *hdmi, struct drm_minor *minor)
741 for (i = 0; i < ARRAY_SIZE(hdmi_debugfs_files); i++)
742 hdmi_debugfs_files[i].data = hdmi;
744 drm_debugfs_create_files(hdmi_debugfs_files,
745 ARRAY_SIZE(hdmi_debugfs_files),
746 minor->debugfs_root, minor);
749 static void sti_hdmi_disable(struct drm_bridge *bridge)
751 struct sti_hdmi *hdmi = bridge->driver_private;
753 u32 val = hdmi_read(hdmi, HDMI_CFG);
758 DRM_DEBUG_DRIVER("\n");
761 val &= ~HDMI_CFG_DEVICE_EN;
762 hdmi_write(hdmi, val, HDMI_CFG);
764 hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
767 hdmi->phy_ops->stop(hdmi);
769 /* Reset info frame transmission */
770 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AVI);
771 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AUDIO);
772 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_VENDOR);
774 /* Set the default channel data to be a dark red */
775 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
776 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
777 hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
779 /* Disable/unprepare hdmi clock */
780 clk_disable_unprepare(hdmi->clk_phy);
781 clk_disable_unprepare(hdmi->clk_tmds);
782 clk_disable_unprepare(hdmi->clk_pix);
784 hdmi->enabled = false;
786 cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID);
790 * sti_hdmi_audio_get_non_coherent_n() - get N parameter for non-coherent
791 * clocks. None-coherent clocks means that audio and TMDS clocks have not the
792 * same source (drifts between clocks). In this case assumption is that CTS is
793 * automatically calculated by hardware.
795 * @audio_fs: audio frame clock frequency in Hz
797 * Values computed are based on table described in HDMI specification 1.4b
801 static int sti_hdmi_audio_get_non_coherent_n(unsigned int audio_fs)
828 /* Not pre-defined, recommended value: 128 * fs / 1000 */
829 n = (audio_fs * 128) / 1000;
835 static int hdmi_audio_configure(struct sti_hdmi *hdmi)
838 struct hdmi_audio_params *params = &hdmi->audio;
839 struct hdmi_audio_infoframe *info = ¶ms->cea;
841 DRM_DEBUG_DRIVER("\n");
846 /* update N parameter */
847 n = sti_hdmi_audio_get_non_coherent_n(params->sample_rate);
849 DRM_DEBUG_DRIVER("Audio rate = %d Hz, TMDS clock = %d Hz, n = %d\n",
850 params->sample_rate, hdmi->mode.clock * 1000, n);
851 hdmi_write(hdmi, n, HDMI_AUDN);
853 /* update HDMI registers according to configuration */
854 audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 | HDMI_AUD_CFG_DTS_INVALID |
855 HDMI_AUD_CFG_ONE_BIT_INVALID;
857 switch (info->channels) {
859 audio_cfg |= HDMI_AUD_CFG_CH78_VALID;
862 audio_cfg |= HDMI_AUD_CFG_CH56_VALID;
865 audio_cfg |= HDMI_AUD_CFG_CH34_VALID | HDMI_AUD_CFG_8CH;
868 audio_cfg |= HDMI_AUD_CFG_CH12_VALID;
871 DRM_ERROR("ERROR: Unsupported number of channels (%d)!\n",
876 hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);
878 return hdmi_audio_infoframe_config(hdmi);
881 static void sti_hdmi_pre_enable(struct drm_bridge *bridge)
883 struct sti_hdmi *hdmi = bridge->driver_private;
885 DRM_DEBUG_DRIVER("\n");
890 /* Prepare/enable clocks */
891 if (clk_prepare_enable(hdmi->clk_pix))
892 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n");
893 if (clk_prepare_enable(hdmi->clk_tmds))
894 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n");
895 if (clk_prepare_enable(hdmi->clk_phy))
896 DRM_ERROR("Failed to prepare/enable hdmi_rejection_pll clk\n");
898 hdmi->enabled = true;
900 /* Program hdmi serializer and start phy */
901 if (!hdmi->phy_ops->start(hdmi)) {
902 DRM_ERROR("Unable to start hdmi phy\n");
906 /* Program hdmi active area */
907 hdmi_active_area(hdmi);
909 /* Enable working interrupts */
910 hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
912 /* Program hdmi config */
915 /* Program AVI infoframe */
916 if (hdmi_avi_infoframe_config(hdmi))
917 DRM_ERROR("Unable to configure AVI infoframe\n");
919 if (hdmi->audio.enabled) {
920 if (hdmi_audio_configure(hdmi))
921 DRM_ERROR("Unable to configure audio\n");
923 hdmi_audio_infoframe_config(hdmi);
926 /* Program VS infoframe */
927 if (hdmi_vendor_infoframe_config(hdmi))
928 DRM_ERROR("Unable to configure VS infoframe\n");
934 static void sti_hdmi_set_mode(struct drm_bridge *bridge,
935 const struct drm_display_mode *mode,
936 const struct drm_display_mode *adjusted_mode)
938 struct sti_hdmi *hdmi = bridge->driver_private;
941 DRM_DEBUG_DRIVER("\n");
943 /* Copy the drm display mode in the connector local structure */
944 drm_mode_copy(&hdmi->mode, mode);
946 /* Update clock framerate according to the selected mode */
947 ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);
949 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n",
953 ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);
955 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n",
961 static void sti_hdmi_bridge_nope(struct drm_bridge *bridge)
966 static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = {
967 .pre_enable = sti_hdmi_pre_enable,
968 .enable = sti_hdmi_bridge_nope,
969 .disable = sti_hdmi_disable,
970 .post_disable = sti_hdmi_bridge_nope,
971 .mode_set = sti_hdmi_set_mode,
974 static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
976 struct sti_hdmi_connector *hdmi_connector
977 = to_sti_hdmi_connector(connector);
978 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
982 DRM_DEBUG_DRIVER("\n");
984 edid = drm_get_edid(connector, hdmi->ddc_adapt);
988 hdmi->hdmi_monitor = drm_detect_hdmi_monitor(edid);
989 DRM_DEBUG_KMS("%s : %dx%d cm\n",
990 (hdmi->hdmi_monitor ? "hdmi monitor" : "dvi monitor"),
991 edid->width_cm, edid->height_cm);
992 cec_notifier_set_phys_addr_from_edid(hdmi->notifier, edid);
994 count = drm_add_edid_modes(connector, edid);
995 drm_connector_update_edid_property(connector, edid);
1001 DRM_ERROR("Can't read HDMI EDID\n");
1005 #define CLK_TOLERANCE_HZ 50
1007 static int sti_hdmi_connector_mode_valid(struct drm_connector *connector,
1008 struct drm_display_mode *mode)
1010 int target = mode->clock * 1000;
1011 int target_min = target - CLK_TOLERANCE_HZ;
1012 int target_max = target + CLK_TOLERANCE_HZ;
1014 struct sti_hdmi_connector *hdmi_connector
1015 = to_sti_hdmi_connector(connector);
1016 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1019 result = clk_round_rate(hdmi->clk_pix, target);
1021 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
1024 if ((result < target_min) || (result > target_max)) {
1025 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target);
1033 struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = {
1034 .get_modes = sti_hdmi_connector_get_modes,
1035 .mode_valid = sti_hdmi_connector_mode_valid,
1038 /* get detection status of display device */
1039 static enum drm_connector_status
1040 sti_hdmi_connector_detect(struct drm_connector *connector, bool force)
1042 struct sti_hdmi_connector *hdmi_connector
1043 = to_sti_hdmi_connector(connector);
1044 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1046 DRM_DEBUG_DRIVER("\n");
1049 DRM_DEBUG_DRIVER("hdmi cable connected\n");
1050 return connector_status_connected;
1053 DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
1054 cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID);
1055 return connector_status_disconnected;
1058 static void sti_hdmi_connector_init_property(struct drm_device *drm_dev,
1059 struct drm_connector *connector)
1061 struct sti_hdmi_connector *hdmi_connector
1062 = to_sti_hdmi_connector(connector);
1063 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1064 struct drm_property *prop;
1066 /* colorspace property */
1067 hdmi->colorspace = DEFAULT_COLORSPACE_MODE;
1068 prop = drm_property_create_enum(drm_dev, 0, "colorspace",
1069 colorspace_mode_names,
1070 ARRAY_SIZE(colorspace_mode_names));
1072 DRM_ERROR("fails to create colorspace property\n");
1075 hdmi_connector->colorspace_property = prop;
1076 drm_object_attach_property(&connector->base, prop, hdmi->colorspace);
1080 sti_hdmi_connector_set_property(struct drm_connector *connector,
1081 struct drm_connector_state *state,
1082 struct drm_property *property,
1085 struct sti_hdmi_connector *hdmi_connector
1086 = to_sti_hdmi_connector(connector);
1087 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1089 if (property == hdmi_connector->colorspace_property) {
1090 hdmi->colorspace = val;
1094 DRM_ERROR("failed to set hdmi connector property\n");
1099 sti_hdmi_connector_get_property(struct drm_connector *connector,
1100 const struct drm_connector_state *state,
1101 struct drm_property *property,
1104 struct sti_hdmi_connector *hdmi_connector
1105 = to_sti_hdmi_connector(connector);
1106 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1108 if (property == hdmi_connector->colorspace_property) {
1109 *val = hdmi->colorspace;
1113 DRM_ERROR("failed to get hdmi connector property\n");
1117 static int sti_hdmi_late_register(struct drm_connector *connector)
1119 struct sti_hdmi_connector *hdmi_connector
1120 = to_sti_hdmi_connector(connector);
1121 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1123 hdmi_debugfs_init(hdmi, hdmi->drm_dev->primary);
1128 static const struct drm_connector_funcs sti_hdmi_connector_funcs = {
1129 .fill_modes = drm_helper_probe_single_connector_modes,
1130 .detect = sti_hdmi_connector_detect,
1131 .destroy = drm_connector_cleanup,
1132 .reset = drm_atomic_helper_connector_reset,
1133 .atomic_set_property = sti_hdmi_connector_set_property,
1134 .atomic_get_property = sti_hdmi_connector_get_property,
1135 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1136 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1137 .late_register = sti_hdmi_late_register,
1140 static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev)
1142 struct drm_encoder *encoder;
1144 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1145 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1152 static void hdmi_audio_shutdown(struct device *dev, void *data)
1154 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1157 DRM_DEBUG_DRIVER("\n");
1160 audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 | HDMI_AUD_CFG_DTS_INVALID |
1161 HDMI_AUD_CFG_ONE_BIT_INVALID;
1162 hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);
1164 hdmi->audio.enabled = false;
1165 hdmi_audio_infoframe_config(hdmi);
1168 static int hdmi_audio_hw_params(struct device *dev,
1170 struct hdmi_codec_daifmt *daifmt,
1171 struct hdmi_codec_params *params)
1173 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1176 DRM_DEBUG_DRIVER("\n");
1178 if ((daifmt->fmt != HDMI_I2S) || daifmt->bit_clk_inv ||
1179 daifmt->frame_clk_inv || daifmt->bit_clk_provider ||
1180 daifmt->frame_clk_provider) {
1181 dev_err(dev, "%s: Bad flags %d %d %d %d\n", __func__,
1182 daifmt->bit_clk_inv, daifmt->frame_clk_inv,
1183 daifmt->bit_clk_provider,
1184 daifmt->frame_clk_provider);
1188 hdmi->audio.sample_width = params->sample_width;
1189 hdmi->audio.sample_rate = params->sample_rate;
1190 hdmi->audio.cea = params->cea;
1192 hdmi->audio.enabled = true;
1194 ret = hdmi_audio_configure(hdmi);
1201 static int hdmi_audio_mute(struct device *dev, void *data,
1202 bool enable, int direction)
1204 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1206 DRM_DEBUG_DRIVER("%s\n", enable ? "enable" : "disable");
1209 hdmi_write(hdmi, HDMI_SAMPLE_FLAT_ALL, HDMI_SAMPLE_FLAT_MASK);
1211 hdmi_write(hdmi, HDMI_SAMPLE_FLAT_NO, HDMI_SAMPLE_FLAT_MASK);
1216 static int hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf, size_t len)
1218 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1219 struct drm_connector *connector = hdmi->drm_connector;
1221 DRM_DEBUG_DRIVER("\n");
1222 memcpy(buf, connector->eld, min(sizeof(connector->eld), len));
1227 static const struct hdmi_codec_ops audio_codec_ops = {
1228 .hw_params = hdmi_audio_hw_params,
1229 .audio_shutdown = hdmi_audio_shutdown,
1230 .mute_stream = hdmi_audio_mute,
1231 .get_eld = hdmi_audio_get_eld,
1232 .no_capture_mute = 1,
1235 static int sti_hdmi_register_audio_driver(struct device *dev,
1236 struct sti_hdmi *hdmi)
1238 struct hdmi_codec_pdata codec_data = {
1239 .ops = &audio_codec_ops,
1240 .max_i2s_channels = 8,
1244 DRM_DEBUG_DRIVER("\n");
1246 hdmi->audio.enabled = false;
1248 hdmi->audio_pdev = platform_device_register_data(
1249 dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
1250 &codec_data, sizeof(codec_data));
1252 if (IS_ERR(hdmi->audio_pdev))
1253 return PTR_ERR(hdmi->audio_pdev);
1255 DRM_INFO("%s Driver bound %s\n", HDMI_CODEC_DRV_NAME, dev_name(dev));
1260 static int sti_hdmi_bind(struct device *dev, struct device *master, void *data)
1262 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1263 struct drm_device *drm_dev = data;
1264 struct drm_encoder *encoder;
1265 struct sti_hdmi_connector *connector;
1266 struct cec_connector_info conn_info;
1267 struct drm_connector *drm_connector;
1268 struct drm_bridge *bridge;
1271 /* Set the drm device handle */
1272 hdmi->drm_dev = drm_dev;
1274 encoder = sti_hdmi_find_encoder(drm_dev);
1278 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
1282 connector->hdmi = hdmi;
1284 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
1288 bridge->driver_private = hdmi;
1289 bridge->funcs = &sti_hdmi_bridge_funcs;
1290 drm_bridge_attach(encoder, bridge, NULL, 0);
1292 connector->encoder = encoder;
1294 drm_connector = (struct drm_connector *)connector;
1296 drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
1298 drm_connector_init_with_ddc(drm_dev, drm_connector,
1299 &sti_hdmi_connector_funcs,
1300 DRM_MODE_CONNECTOR_HDMIA,
1302 drm_connector_helper_add(drm_connector,
1303 &sti_hdmi_connector_helper_funcs);
1305 /* initialise property */
1306 sti_hdmi_connector_init_property(drm_dev, drm_connector);
1308 hdmi->drm_connector = drm_connector;
1310 err = drm_connector_attach_encoder(drm_connector, encoder);
1312 DRM_ERROR("Failed to attach a connector to a encoder\n");
1316 err = sti_hdmi_register_audio_driver(dev, hdmi);
1318 DRM_ERROR("Failed to attach an audio codec\n");
1322 /* Initialize audio infoframe */
1323 err = hdmi_audio_infoframe_init(&hdmi->audio.cea);
1325 DRM_ERROR("Failed to init audio infoframe\n");
1329 cec_fill_conn_info_from_drm(&conn_info, drm_connector);
1330 hdmi->notifier = cec_notifier_conn_register(&hdmi->dev, NULL,
1332 if (!hdmi->notifier) {
1333 hdmi->drm_connector = NULL;
1337 /* Enable default interrupts */
1338 hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
1343 hdmi->drm_connector = NULL;
1347 static void sti_hdmi_unbind(struct device *dev,
1348 struct device *master, void *data)
1350 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1352 cec_notifier_conn_unregister(hdmi->notifier);
1355 static const struct component_ops sti_hdmi_ops = {
1356 .bind = sti_hdmi_bind,
1357 .unbind = sti_hdmi_unbind,
1360 static const struct of_device_id hdmi_of_match[] = {
1362 .compatible = "st,stih407-hdmi",
1363 .data = &tx3g4c28phy_ops,
1368 MODULE_DEVICE_TABLE(of, hdmi_of_match);
1370 static int sti_hdmi_probe(struct platform_device *pdev)
1372 struct device *dev = &pdev->dev;
1373 struct sti_hdmi *hdmi;
1374 struct device_node *np = dev->of_node;
1375 struct resource *res;
1376 struct device_node *ddc;
1379 DRM_INFO("%s\n", __func__);
1381 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
1385 ddc = of_parse_phandle(pdev->dev.of_node, "ddc", 0);
1387 hdmi->ddc_adapt = of_get_i2c_adapter_by_node(ddc);
1389 if (!hdmi->ddc_adapt)
1390 return -EPROBE_DEFER;
1393 hdmi->dev = pdev->dev;
1396 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg");
1398 DRM_ERROR("Invalid hdmi resource\n");
1400 goto release_adapter;
1402 hdmi->regs = devm_ioremap(dev, res->start, resource_size(res));
1405 goto release_adapter;
1408 hdmi->phy_ops = (struct hdmi_phy_ops *)
1409 of_match_node(hdmi_of_match, np)->data;
1411 /* Get clock resources */
1412 hdmi->clk_pix = devm_clk_get(dev, "pix");
1413 if (IS_ERR(hdmi->clk_pix)) {
1414 DRM_ERROR("Cannot get hdmi_pix clock\n");
1415 ret = PTR_ERR(hdmi->clk_pix);
1416 goto release_adapter;
1419 hdmi->clk_tmds = devm_clk_get(dev, "tmds");
1420 if (IS_ERR(hdmi->clk_tmds)) {
1421 DRM_ERROR("Cannot get hdmi_tmds clock\n");
1422 ret = PTR_ERR(hdmi->clk_tmds);
1423 goto release_adapter;
1426 hdmi->clk_phy = devm_clk_get(dev, "phy");
1427 if (IS_ERR(hdmi->clk_phy)) {
1428 DRM_ERROR("Cannot get hdmi_phy clock\n");
1429 ret = PTR_ERR(hdmi->clk_phy);
1430 goto release_adapter;
1433 hdmi->clk_audio = devm_clk_get(dev, "audio");
1434 if (IS_ERR(hdmi->clk_audio)) {
1435 DRM_ERROR("Cannot get hdmi_audio clock\n");
1436 ret = PTR_ERR(hdmi->clk_audio);
1437 goto release_adapter;
1440 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
1442 init_waitqueue_head(&hdmi->wait_event);
1444 hdmi->irq = platform_get_irq_byname(pdev, "irq");
1445 if (hdmi->irq < 0) {
1446 DRM_ERROR("Cannot get HDMI irq\n");
1448 goto release_adapter;
1451 ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq,
1452 hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi);
1454 DRM_ERROR("Failed to register HDMI interrupt\n");
1455 goto release_adapter;
1458 hdmi->reset = devm_reset_control_get(dev, "hdmi");
1459 /* Take hdmi out of reset */
1460 if (!IS_ERR(hdmi->reset))
1461 reset_control_deassert(hdmi->reset);
1463 platform_set_drvdata(pdev, hdmi);
1465 return component_add(&pdev->dev, &sti_hdmi_ops);
1468 i2c_put_adapter(hdmi->ddc_adapt);
1473 static int sti_hdmi_remove(struct platform_device *pdev)
1475 struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
1477 i2c_put_adapter(hdmi->ddc_adapt);
1478 if (hdmi->audio_pdev)
1479 platform_device_unregister(hdmi->audio_pdev);
1480 component_del(&pdev->dev, &sti_hdmi_ops);
1485 struct platform_driver sti_hdmi_driver = {
1488 .owner = THIS_MODULE,
1489 .of_match_table = hdmi_of_match,
1491 .probe = sti_hdmi_probe,
1492 .remove = sti_hdmi_remove,
1495 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
1496 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
1497 MODULE_LICENSE("GPL");