Merge tag 'hardening-v6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees...
[platform/kernel/linux-starfive.git] / drivers / gpu / drm / sti / sti_dvo.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) STMicroelectronics SA 2014
4  * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
5  */
6
7 #include <linux/clk.h>
8 #include <linux/component.h>
9 #include <linux/debugfs.h>
10 #include <linux/module.h>
11 #include <linux/of_gpio.h>
12 #include <linux/platform_device.h>
13
14 #include <drm/drm_atomic_helper.h>
15 #include <drm/drm_bridge.h>
16 #include <drm/drm_device.h>
17 #include <drm/drm_panel.h>
18 #include <drm/drm_print.h>
19 #include <drm/drm_probe_helper.h>
20
21 #include "sti_awg_utils.h"
22 #include "sti_drv.h"
23 #include "sti_mixer.h"
24
25 /* DVO registers */
26 #define DVO_AWG_DIGSYNC_CTRL      0x0000
27 #define DVO_DOF_CFG               0x0004
28 #define DVO_LUT_PROG_LOW          0x0008
29 #define DVO_LUT_PROG_MID          0x000C
30 #define DVO_LUT_PROG_HIGH         0x0010
31 #define DVO_DIGSYNC_INSTR_I       0x0100
32
33 #define DVO_AWG_CTRL_EN           BIT(0)
34 #define DVO_AWG_FRAME_BASED_SYNC  BIT(2)
35
36 #define DVO_DOF_EN_LOWBYTE        BIT(0)
37 #define DVO_DOF_EN_MIDBYTE        BIT(1)
38 #define DVO_DOF_EN_HIGHBYTE       BIT(2)
39 #define DVO_DOF_EN                BIT(6)
40 #define DVO_DOF_MOD_COUNT_SHIFT   8
41
42 #define DVO_LUT_ZERO              0
43 #define DVO_LUT_Y_G               1
44 #define DVO_LUT_Y_G_DEL           2
45 #define DVO_LUT_CB_B              3
46 #define DVO_LUT_CB_B_DEL          4
47 #define DVO_LUT_CR_R              5
48 #define DVO_LUT_CR_R_DEL          6
49 #define DVO_LUT_HOLD              7
50
51 struct dvo_config {
52         u32 flags;
53         u32 lowbyte;
54         u32 midbyte;
55         u32 highbyte;
56         int (*awg_fwgen_fct)(
57                         struct awg_code_generation_params *fw_gen_params,
58                         struct awg_timing *timing);
59 };
60
61 static struct dvo_config rgb_24bit_de_cfg = {
62         .flags         = (0L << DVO_DOF_MOD_COUNT_SHIFT),
63         .lowbyte       = DVO_LUT_CR_R,
64         .midbyte       = DVO_LUT_Y_G,
65         .highbyte      = DVO_LUT_CB_B,
66         .awg_fwgen_fct = sti_awg_generate_code_data_enable_mode,
67 };
68
69 /*
70  * STI digital video output structure
71  *
72  * @dev: driver device
73  * @drm_dev: pointer to drm device
74  * @mode: current display mode selected
75  * @regs: dvo registers
76  * @clk_pix: pixel clock for dvo
77  * @clk: clock for dvo
78  * @clk_main_parent: dvo parent clock if main path used
79  * @clk_aux_parent: dvo parent clock if aux path used
80  * @panel_node: panel node reference from device tree
81  * @panel: reference to the panel connected to the dvo
82  * @enabled: true if dvo is enabled else false
83  * @encoder: drm_encoder it is bound
84  */
85 struct sti_dvo {
86         struct device dev;
87         struct drm_device *drm_dev;
88         struct drm_display_mode mode;
89         void __iomem *regs;
90         struct clk *clk_pix;
91         struct clk *clk;
92         struct clk *clk_main_parent;
93         struct clk *clk_aux_parent;
94         struct device_node *panel_node;
95         struct drm_panel *panel;
96         struct dvo_config *config;
97         bool enabled;
98         struct drm_encoder *encoder;
99         struct drm_bridge *bridge;
100 };
101
102 struct sti_dvo_connector {
103         struct drm_connector drm_connector;
104         struct drm_encoder *encoder;
105         struct sti_dvo *dvo;
106 };
107
108 #define to_sti_dvo_connector(x) \
109         container_of(x, struct sti_dvo_connector, drm_connector)
110
111 #define BLANKING_LEVEL 16
112 static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
113 {
114         struct drm_display_mode *mode = &dvo->mode;
115         struct dvo_config *config = dvo->config;
116         struct awg_code_generation_params fw_gen_params;
117         struct awg_timing timing;
118
119         fw_gen_params.ram_code = ram_code;
120         fw_gen_params.instruction_offset = 0;
121
122         timing.total_lines = mode->vtotal;
123         timing.active_lines = mode->vdisplay;
124         timing.blanking_lines = mode->vsync_start - mode->vdisplay;
125         timing.trailing_lines = mode->vtotal - mode->vsync_start;
126         timing.total_pixels = mode->htotal;
127         timing.active_pixels = mode->hdisplay;
128         timing.blanking_pixels = mode->hsync_start - mode->hdisplay;
129         timing.trailing_pixels = mode->htotal - mode->hsync_start;
130         timing.blanking_level = BLANKING_LEVEL;
131
132         if (config->awg_fwgen_fct(&fw_gen_params, &timing)) {
133                 DRM_ERROR("AWG firmware not properly generated\n");
134                 return -EINVAL;
135         }
136
137         *ram_size = fw_gen_params.instruction_offset;
138
139         return 0;
140 }
141
142 /* Configure AWG, writing instructions
143  *
144  * @dvo: pointer to DVO structure
145  * @awg_ram_code: pointer to AWG instructions table
146  * @nb: nb of AWG instructions
147  */
148 static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb)
149 {
150         int i;
151
152         DRM_DEBUG_DRIVER("\n");
153
154         for (i = 0; i < nb; i++)
155                 writel(awg_ram_code[i],
156                        dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
157         for (i = nb; i < AWG_MAX_INST; i++)
158                 writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
159
160         writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
161 }
162
163 #define DBGFS_DUMP(reg) seq_printf(s, "\n  %-25s 0x%08X", #reg, \
164                                    readl(dvo->regs + reg))
165
166 static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg)
167 {
168         unsigned int i;
169
170         seq_puts(s, "\n\n");
171         seq_puts(s, "  DVO AWG microcode:");
172         for (i = 0; i < AWG_MAX_INST; i++) {
173                 if (i % 8 == 0)
174                         seq_printf(s, "\n  %04X:", i);
175                 seq_printf(s, " %04X", readl(reg + i * 4));
176         }
177 }
178
179 static int dvo_dbg_show(struct seq_file *s, void *data)
180 {
181         struct drm_info_node *node = s->private;
182         struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data;
183
184         seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs);
185         DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL);
186         DBGFS_DUMP(DVO_DOF_CFG);
187         DBGFS_DUMP(DVO_LUT_PROG_LOW);
188         DBGFS_DUMP(DVO_LUT_PROG_MID);
189         DBGFS_DUMP(DVO_LUT_PROG_HIGH);
190         dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I);
191         seq_putc(s, '\n');
192         return 0;
193 }
194
195 static struct drm_info_list dvo_debugfs_files[] = {
196         { "dvo", dvo_dbg_show, 0, NULL },
197 };
198
199 static void dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor)
200 {
201         unsigned int i;
202
203         for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++)
204                 dvo_debugfs_files[i].data = dvo;
205
206         drm_debugfs_create_files(dvo_debugfs_files,
207                                  ARRAY_SIZE(dvo_debugfs_files),
208                                  minor->debugfs_root, minor);
209 }
210
211 static void sti_dvo_disable(struct drm_bridge *bridge)
212 {
213         struct sti_dvo *dvo = bridge->driver_private;
214
215         if (!dvo->enabled)
216                 return;
217
218         DRM_DEBUG_DRIVER("\n");
219
220         if (dvo->config->awg_fwgen_fct)
221                 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
222
223         writel(0x00000000, dvo->regs + DVO_DOF_CFG);
224
225         drm_panel_disable(dvo->panel);
226
227         /* Disable/unprepare dvo clock */
228         clk_disable_unprepare(dvo->clk_pix);
229         clk_disable_unprepare(dvo->clk);
230
231         dvo->enabled = false;
232 }
233
234 static void sti_dvo_pre_enable(struct drm_bridge *bridge)
235 {
236         struct sti_dvo *dvo = bridge->driver_private;
237         struct dvo_config *config = dvo->config;
238         u32 val;
239
240         DRM_DEBUG_DRIVER("\n");
241
242         if (dvo->enabled)
243                 return;
244
245         /* Make sure DVO is disabled */
246         writel(0x00000000, dvo->regs + DVO_DOF_CFG);
247         writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
248
249         if (config->awg_fwgen_fct) {
250                 u8 nb_instr;
251                 u32 awg_ram_code[AWG_MAX_INST];
252                 /* Configure AWG */
253                 if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code))
254                         dvo_awg_configure(dvo, awg_ram_code, nb_instr);
255                 else
256                         return;
257         }
258
259         /* Prepare/enable clocks */
260         if (clk_prepare_enable(dvo->clk_pix))
261                 DRM_ERROR("Failed to prepare/enable dvo_pix clk\n");
262         if (clk_prepare_enable(dvo->clk))
263                 DRM_ERROR("Failed to prepare/enable dvo clk\n");
264
265         drm_panel_enable(dvo->panel);
266
267         /* Set LUT */
268         writel(config->lowbyte,  dvo->regs + DVO_LUT_PROG_LOW);
269         writel(config->midbyte,  dvo->regs + DVO_LUT_PROG_MID);
270         writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
271
272         /* Digital output formatter config */
273         val = (config->flags | DVO_DOF_EN);
274         writel(val, dvo->regs + DVO_DOF_CFG);
275
276         dvo->enabled = true;
277 }
278
279 static void sti_dvo_set_mode(struct drm_bridge *bridge,
280                              const struct drm_display_mode *mode,
281                              const struct drm_display_mode *adjusted_mode)
282 {
283         struct sti_dvo *dvo = bridge->driver_private;
284         struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);
285         int rate = mode->clock * 1000;
286         struct clk *clkp;
287         int ret;
288
289         DRM_DEBUG_DRIVER("\n");
290
291         drm_mode_copy(&dvo->mode, mode);
292
293         /* According to the path used (main or aux), the dvo clocks should
294          * have a different parent clock. */
295         if (mixer->id == STI_MIXER_MAIN)
296                 clkp = dvo->clk_main_parent;
297         else
298                 clkp = dvo->clk_aux_parent;
299
300         if (clkp) {
301                 clk_set_parent(dvo->clk_pix, clkp);
302                 clk_set_parent(dvo->clk, clkp);
303         }
304
305         /* DVO clocks = compositor clock */
306         ret = clk_set_rate(dvo->clk_pix, rate);
307         if (ret < 0) {
308                 DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate);
309                 return;
310         }
311
312         ret = clk_set_rate(dvo->clk, rate);
313         if (ret < 0) {
314                 DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate);
315                 return;
316         }
317
318         /* For now, we only support 24bit data enable (DE) synchro format */
319         dvo->config = &rgb_24bit_de_cfg;
320 }
321
322 static void sti_dvo_bridge_nope(struct drm_bridge *bridge)
323 {
324         /* do nothing */
325 }
326
327 static const struct drm_bridge_funcs sti_dvo_bridge_funcs = {
328         .pre_enable = sti_dvo_pre_enable,
329         .enable = sti_dvo_bridge_nope,
330         .disable = sti_dvo_disable,
331         .post_disable = sti_dvo_bridge_nope,
332         .mode_set = sti_dvo_set_mode,
333 };
334
335 static int sti_dvo_connector_get_modes(struct drm_connector *connector)
336 {
337         struct sti_dvo_connector *dvo_connector
338                 = to_sti_dvo_connector(connector);
339         struct sti_dvo *dvo = dvo_connector->dvo;
340
341         if (dvo->panel)
342                 return drm_panel_get_modes(dvo->panel, connector);
343
344         return 0;
345 }
346
347 #define CLK_TOLERANCE_HZ 50
348
349 static enum drm_mode_status
350 sti_dvo_connector_mode_valid(struct drm_connector *connector,
351                              struct drm_display_mode *mode)
352 {
353         int target = mode->clock * 1000;
354         int target_min = target - CLK_TOLERANCE_HZ;
355         int target_max = target + CLK_TOLERANCE_HZ;
356         int result;
357         struct sti_dvo_connector *dvo_connector
358                 = to_sti_dvo_connector(connector);
359         struct sti_dvo *dvo = dvo_connector->dvo;
360
361         result = clk_round_rate(dvo->clk_pix, target);
362
363         DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
364                          target, result);
365
366         if ((result < target_min) || (result > target_max)) {
367                 DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target);
368                 return MODE_BAD;
369         }
370
371         return MODE_OK;
372 }
373
374 static const
375 struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = {
376         .get_modes = sti_dvo_connector_get_modes,
377         .mode_valid = sti_dvo_connector_mode_valid,
378 };
379
380 static enum drm_connector_status
381 sti_dvo_connector_detect(struct drm_connector *connector, bool force)
382 {
383         struct sti_dvo_connector *dvo_connector
384                 = to_sti_dvo_connector(connector);
385         struct sti_dvo *dvo = dvo_connector->dvo;
386
387         DRM_DEBUG_DRIVER("\n");
388
389         if (!dvo->panel) {
390                 dvo->panel = of_drm_find_panel(dvo->panel_node);
391                 if (IS_ERR(dvo->panel))
392                         dvo->panel = NULL;
393         }
394
395         if (dvo->panel)
396                 return connector_status_connected;
397
398         return connector_status_disconnected;
399 }
400
401 static int sti_dvo_late_register(struct drm_connector *connector)
402 {
403         struct sti_dvo_connector *dvo_connector
404                 = to_sti_dvo_connector(connector);
405         struct sti_dvo *dvo = dvo_connector->dvo;
406
407         dvo_debugfs_init(dvo, dvo->drm_dev->primary);
408
409         return 0;
410 }
411
412 static const struct drm_connector_funcs sti_dvo_connector_funcs = {
413         .fill_modes = drm_helper_probe_single_connector_modes,
414         .detect = sti_dvo_connector_detect,
415         .destroy = drm_connector_cleanup,
416         .reset = drm_atomic_helper_connector_reset,
417         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
418         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
419         .late_register = sti_dvo_late_register,
420 };
421
422 static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev)
423 {
424         struct drm_encoder *encoder;
425
426         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
427                 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
428                         return encoder;
429         }
430
431         return NULL;
432 }
433
434 static int sti_dvo_bind(struct device *dev, struct device *master, void *data)
435 {
436         struct sti_dvo *dvo = dev_get_drvdata(dev);
437         struct drm_device *drm_dev = data;
438         struct drm_encoder *encoder;
439         struct sti_dvo_connector *connector;
440         struct drm_connector *drm_connector;
441         struct drm_bridge *bridge;
442         int err;
443
444         /* Set the drm device handle */
445         dvo->drm_dev = drm_dev;
446
447         encoder = sti_dvo_find_encoder(drm_dev);
448         if (!encoder)
449                 return -ENOMEM;
450
451         connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
452         if (!connector)
453                 return -ENOMEM;
454
455         connector->dvo = dvo;
456
457         bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
458         if (!bridge)
459                 return -ENOMEM;
460
461         bridge->driver_private = dvo;
462         bridge->funcs = &sti_dvo_bridge_funcs;
463         bridge->of_node = dvo->dev.of_node;
464         drm_bridge_add(bridge);
465
466         err = drm_bridge_attach(encoder, bridge, NULL, 0);
467         if (err)
468                 return err;
469
470         dvo->bridge = bridge;
471         connector->encoder = encoder;
472         dvo->encoder = encoder;
473
474         drm_connector = (struct drm_connector *)connector;
475
476         drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
477
478         drm_connector_init(drm_dev, drm_connector,
479                            &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
480         drm_connector_helper_add(drm_connector,
481                                  &sti_dvo_connector_helper_funcs);
482
483         err = drm_connector_attach_encoder(drm_connector, encoder);
484         if (err) {
485                 DRM_ERROR("Failed to attach a connector to a encoder\n");
486                 goto err_sysfs;
487         }
488
489         return 0;
490
491 err_sysfs:
492         drm_bridge_remove(bridge);
493         return -EINVAL;
494 }
495
496 static void sti_dvo_unbind(struct device *dev,
497                            struct device *master, void *data)
498 {
499         struct sti_dvo *dvo = dev_get_drvdata(dev);
500
501         drm_bridge_remove(dvo->bridge);
502 }
503
504 static const struct component_ops sti_dvo_ops = {
505         .bind = sti_dvo_bind,
506         .unbind = sti_dvo_unbind,
507 };
508
509 static int sti_dvo_probe(struct platform_device *pdev)
510 {
511         struct device *dev = &pdev->dev;
512         struct sti_dvo *dvo;
513         struct resource *res;
514         struct device_node *np = dev->of_node;
515
516         DRM_INFO("%s\n", __func__);
517
518         dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL);
519         if (!dvo) {
520                 DRM_ERROR("Failed to allocate memory for DVO\n");
521                 return -ENOMEM;
522         }
523
524         dvo->dev = pdev->dev;
525
526         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg");
527         if (!res) {
528                 DRM_ERROR("Invalid dvo resource\n");
529                 return -ENOMEM;
530         }
531         dvo->regs = devm_ioremap(dev, res->start,
532                         resource_size(res));
533         if (!dvo->regs)
534                 return -ENOMEM;
535
536         dvo->clk_pix = devm_clk_get(dev, "dvo_pix");
537         if (IS_ERR(dvo->clk_pix)) {
538                 DRM_ERROR("Cannot get dvo_pix clock\n");
539                 return PTR_ERR(dvo->clk_pix);
540         }
541
542         dvo->clk = devm_clk_get(dev, "dvo");
543         if (IS_ERR(dvo->clk)) {
544                 DRM_ERROR("Cannot get dvo clock\n");
545                 return PTR_ERR(dvo->clk);
546         }
547
548         dvo->clk_main_parent = devm_clk_get(dev, "main_parent");
549         if (IS_ERR(dvo->clk_main_parent)) {
550                 DRM_DEBUG_DRIVER("Cannot get main_parent clock\n");
551                 dvo->clk_main_parent = NULL;
552         }
553
554         dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent");
555         if (IS_ERR(dvo->clk_aux_parent)) {
556                 DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n");
557                 dvo->clk_aux_parent = NULL;
558         }
559
560         dvo->panel_node = of_parse_phandle(np, "sti,panel", 0);
561         if (!dvo->panel_node)
562                 DRM_ERROR("No panel associated to the dvo output\n");
563         of_node_put(dvo->panel_node);
564
565         platform_set_drvdata(pdev, dvo);
566
567         return component_add(&pdev->dev, &sti_dvo_ops);
568 }
569
570 static int sti_dvo_remove(struct platform_device *pdev)
571 {
572         component_del(&pdev->dev, &sti_dvo_ops);
573         return 0;
574 }
575
576 static const struct of_device_id dvo_of_match[] = {
577         { .compatible = "st,stih407-dvo", },
578         { /* end node */ }
579 };
580 MODULE_DEVICE_TABLE(of, dvo_of_match);
581
582 struct platform_driver sti_dvo_driver = {
583         .driver = {
584                 .name = "sti-dvo",
585                 .owner = THIS_MODULE,
586                 .of_match_table = dvo_of_match,
587         },
588         .probe = sti_dvo_probe,
589         .remove = sti_dvo_remove,
590 };
591
592 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
593 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
594 MODULE_LICENSE("GPL");