2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
33 #include <linux/dma-mapping.h>
34 #include <linux/pagemap.h>
35 #include <linux/pci.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
38 #include <linux/swap.h>
39 #include <linux/swiotlb.h>
41 #include <drm/drm_agpsupport.h>
42 #include <drm/drm_debugfs.h>
43 #include <drm/drm_device.h>
44 #include <drm/drm_file.h>
45 #include <drm/drm_prime.h>
46 #include <drm/radeon_drm.h>
47 #include <drm/ttm/ttm_bo_api.h>
48 #include <drm/ttm/ttm_bo_driver.h>
49 #include <drm/ttm/ttm_module.h>
50 #include <drm/ttm/ttm_page_alloc.h>
51 #include <drm/ttm/ttm_placement.h>
53 #include "radeon_reg.h"
56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
59 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
61 struct ttm_resource *bo_mem);
62 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
65 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
67 struct radeon_mman *mman;
68 struct radeon_device *rdev;
70 mman = container_of(bdev, struct radeon_mman, bdev);
71 rdev = container_of(mman, struct radeon_device, mman);
75 static int radeon_ttm_init_vram(struct radeon_device *rdev)
77 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
78 false, rdev->mc.real_vram_size >> PAGE_SHIFT);
81 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
83 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
84 true, rdev->mc.gtt_size >> PAGE_SHIFT);
87 static void radeon_evict_flags(struct ttm_buffer_object *bo,
88 struct ttm_placement *placement)
90 static const struct ttm_place placements = {
93 .mem_type = TTM_PL_SYSTEM,
97 struct radeon_bo *rbo;
99 if (!radeon_ttm_bo_is_radeon_bo(bo)) {
100 placement->placement = &placements;
101 placement->busy_placement = &placements;
102 placement->num_placement = 1;
103 placement->num_busy_placement = 1;
106 rbo = container_of(bo, struct radeon_bo, tbo);
107 switch (bo->mem.mem_type) {
109 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
110 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
111 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
112 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
113 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
116 /* Try evicting to the CPU inaccessible part of VRAM
117 * first, but only set GTT as busy placement, so this
118 * BO will be evicted to GTT rather than causing other
119 * BOs to be evicted from VRAM
121 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
122 RADEON_GEM_DOMAIN_GTT);
123 rbo->placement.num_busy_placement = 0;
124 for (i = 0; i < rbo->placement.num_placement; i++) {
125 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
126 if (rbo->placements[i].fpfn < fpfn)
127 rbo->placements[i].fpfn = fpfn;
129 rbo->placement.busy_placement =
131 rbo->placement.num_busy_placement = 1;
135 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
139 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
141 *placement = rbo->placement;
144 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
146 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
147 struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
149 if (radeon_ttm_tt_has_userptr(rdev, bo->ttm))
151 return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
155 static int radeon_move_blit(struct ttm_buffer_object *bo,
157 struct ttm_resource *new_mem,
158 struct ttm_resource *old_mem)
160 struct radeon_device *rdev;
161 uint64_t old_start, new_start;
162 struct radeon_fence *fence;
166 rdev = radeon_get_rdev(bo->bdev);
167 ridx = radeon_copy_ring_index(rdev);
168 old_start = (u64)old_mem->start << PAGE_SHIFT;
169 new_start = (u64)new_mem->start << PAGE_SHIFT;
171 switch (old_mem->mem_type) {
173 old_start += rdev->mc.vram_start;
176 old_start += rdev->mc.gtt_start;
179 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
182 switch (new_mem->mem_type) {
184 new_start += rdev->mc.vram_start;
187 new_start += rdev->mc.gtt_start;
190 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
193 if (!rdev->ring[ridx].ready) {
194 DRM_ERROR("Trying to move memory with ring turned off.\n");
198 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
200 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
201 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
203 return PTR_ERR(fence);
205 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);
206 radeon_fence_unref(&fence);
210 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
212 struct ttm_operation_ctx *ctx,
213 struct ttm_resource *new_mem)
215 struct ttm_resource *old_mem = &bo->mem;
216 struct ttm_resource tmp_mem;
217 struct ttm_place placements;
218 struct ttm_placement placement;
222 tmp_mem.mm_node = NULL;
223 placement.num_placement = 1;
224 placement.placement = &placements;
225 placement.num_busy_placement = 1;
226 placement.busy_placement = &placements;
229 placements.mem_type = TTM_PL_TT;
230 placements.flags = 0;
231 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
236 r = ttm_tt_populate(bo->bdev, bo->ttm, ctx);
241 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_mem);
245 r = radeon_move_blit(bo, true, &tmp_mem, old_mem);
249 r = ttm_bo_wait_ctx(bo, ctx);
253 radeon_ttm_tt_unbind(bo->bdev, bo->ttm);
254 ttm_resource_free(bo, &bo->mem);
255 ttm_bo_assign_mem(bo, new_mem);
257 ttm_resource_free(bo, &tmp_mem);
261 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
263 struct ttm_operation_ctx *ctx,
264 struct ttm_resource *new_mem)
266 struct ttm_resource *old_mem = &bo->mem;
267 struct ttm_resource tmp_mem;
268 struct ttm_placement placement;
269 struct ttm_place placements;
273 tmp_mem.mm_node = NULL;
274 placement.num_placement = 1;
275 placement.placement = &placements;
276 placement.num_busy_placement = 1;
277 placement.busy_placement = &placements;
280 placements.mem_type = TTM_PL_TT;
281 placements.flags = 0;
282 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
287 r = ttm_tt_populate(bo->bdev, bo->ttm, ctx);
291 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_mem);
295 ttm_bo_assign_mem(bo, &tmp_mem);
296 r = radeon_move_blit(bo, true, new_mem, old_mem);
301 ttm_resource_free(bo, &tmp_mem);
305 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
306 struct ttm_operation_ctx *ctx,
307 struct ttm_resource *new_mem)
309 struct radeon_device *rdev;
310 struct radeon_bo *rbo;
311 struct ttm_resource *old_mem = &bo->mem;
314 if (new_mem->mem_type == TTM_PL_TT) {
315 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem);
319 radeon_bo_move_notify(bo, evict, new_mem);
321 r = ttm_bo_wait_ctx(bo, ctx);
325 /* Can't move a pinned BO */
326 rbo = container_of(bo, struct radeon_bo, tbo);
327 if (WARN_ON_ONCE(rbo->tbo.pin_count > 0))
330 rdev = radeon_get_rdev(bo->bdev);
331 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
332 ttm_bo_move_null(bo, new_mem);
335 if (old_mem->mem_type == TTM_PL_SYSTEM &&
336 new_mem->mem_type == TTM_PL_TT) {
337 ttm_bo_move_null(bo, new_mem);
341 if (old_mem->mem_type == TTM_PL_TT &&
342 new_mem->mem_type == TTM_PL_SYSTEM) {
343 radeon_ttm_tt_unbind(bo->bdev, bo->ttm);
344 ttm_resource_free(bo, &bo->mem);
345 ttm_bo_assign_mem(bo, new_mem);
348 if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
349 rdev->asic->copy.copy == NULL) {
354 if (old_mem->mem_type == TTM_PL_VRAM &&
355 new_mem->mem_type == TTM_PL_SYSTEM) {
356 r = radeon_move_vram_ram(bo, evict, ctx, new_mem);
357 } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
358 new_mem->mem_type == TTM_PL_VRAM) {
359 r = radeon_move_ram_vram(bo, evict, ctx, new_mem);
361 r = radeon_move_blit(bo, evict,
367 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
373 /* update statistics */
374 atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
377 swap(*new_mem, bo->mem);
378 radeon_bo_move_notify(bo, false, new_mem);
379 swap(*new_mem, bo->mem);
383 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem)
385 struct radeon_device *rdev = radeon_get_rdev(bdev);
386 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
388 switch (mem->mem_type) {
393 #if IS_ENABLED(CONFIG_AGP)
394 if (rdev->flags & RADEON_IS_AGP) {
395 /* RADEON_IS_AGP is set only if AGP is active */
396 mem->bus.offset = (mem->start << PAGE_SHIFT) +
398 mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
399 mem->bus.caching = ttm_write_combined;
404 mem->bus.offset = mem->start << PAGE_SHIFT;
405 /* check if it's visible */
406 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
408 mem->bus.offset += rdev->mc.aper_base;
409 mem->bus.is_iomem = true;
410 mem->bus.caching = ttm_write_combined;
413 * Alpha: use bus.addr to hold the ioremap() return,
414 * so we can modify bus.base below.
416 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);
421 * Alpha: Use just the bus offset plus
422 * the hose/domain memory base for bus.base.
423 * It then can be used to build PTEs for VRAM
424 * access, as done in ttm_bo_vm_fault().
426 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
427 rdev->ddev->hose->dense_mem_base;
437 * TTM backend functions.
439 struct radeon_ttm_tt {
440 struct ttm_dma_tt ttm;
444 struct mm_struct *usermm;
449 /* prepare the sg table with the user pages */
450 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
452 struct radeon_device *rdev = radeon_get_rdev(bdev);
453 struct radeon_ttm_tt *gtt = (void *)ttm;
457 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
458 enum dma_data_direction direction = write ?
459 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
461 if (current->mm != gtt->usermm)
464 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
465 /* check that we only pin down anonymous memory
466 to prevent problems with writeback */
467 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
468 struct vm_area_struct *vma;
469 vma = find_vma(gtt->usermm, gtt->userptr);
470 if (!vma || vma->vm_file || vma->vm_end < end)
475 unsigned num_pages = ttm->num_pages - pinned;
476 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
477 struct page **pages = ttm->pages + pinned;
479 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
486 } while (pinned < ttm->num_pages);
488 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
489 ttm->num_pages << PAGE_SHIFT,
494 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
498 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
499 gtt->ttm.dma_address, ttm->num_pages);
507 release_pages(ttm->pages, pinned);
511 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
513 struct radeon_device *rdev = radeon_get_rdev(bdev);
514 struct radeon_ttm_tt *gtt = (void *)ttm;
515 struct sg_page_iter sg_iter;
517 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
518 enum dma_data_direction direction = write ?
519 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
521 /* double check that we don't free the table twice */
525 /* free the sg table and pages again */
526 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
528 for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
529 struct page *page = sg_page_iter_page(&sg_iter);
530 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
531 set_page_dirty(page);
533 mark_page_accessed(page);
537 sg_free_table(ttm->sg);
540 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
542 struct radeon_ttm_tt *gtt = (void*)ttm;
547 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev,
549 struct ttm_resource *bo_mem)
551 struct radeon_ttm_tt *gtt = (void*)ttm;
552 struct radeon_device *rdev = radeon_get_rdev(bdev);
553 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
554 RADEON_GART_PAGE_WRITE;
561 radeon_ttm_tt_pin_userptr(bdev, ttm);
562 flags &= ~RADEON_GART_PAGE_WRITE;
565 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
566 if (!ttm->num_pages) {
567 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
568 ttm->num_pages, bo_mem, ttm);
570 if (ttm->caching == ttm_cached)
571 flags |= RADEON_GART_PAGE_SNOOP;
572 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
573 ttm->pages, gtt->ttm.dma_address, flags);
575 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
576 ttm->num_pages, (unsigned)gtt->offset);
583 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
585 struct radeon_ttm_tt *gtt = (void *)ttm;
586 struct radeon_device *rdev = radeon_get_rdev(bdev);
591 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
594 radeon_ttm_tt_unpin_userptr(bdev, ttm);
598 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
600 struct radeon_ttm_tt *gtt = (void *)ttm;
602 radeon_ttm_backend_unbind(bdev, ttm);
603 ttm_tt_destroy_common(bdev, ttm);
605 ttm_dma_tt_fini(>t->ttm);
609 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
612 struct radeon_device *rdev;
613 struct radeon_ttm_tt *gtt;
614 enum ttm_caching caching;
615 struct radeon_bo *rbo;
617 rbo = container_of(bo, struct radeon_bo, tbo);
619 rdev = radeon_get_rdev(bo->bdev);
620 #if IS_ENABLED(CONFIG_AGP)
621 if (rdev->flags & RADEON_IS_AGP) {
622 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
627 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
632 if (rbo->flags & RADEON_GEM_GTT_UC)
633 caching = ttm_uncached;
634 else if (rbo->flags & RADEON_GEM_GTT_WC)
635 caching = ttm_write_combined;
637 caching = ttm_cached;
639 if (ttm_dma_tt_init(>t->ttm, bo, page_flags, caching)) {
643 return >t->ttm.ttm;
646 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
649 #if IS_ENABLED(CONFIG_AGP)
650 if (rdev->flags & RADEON_IS_AGP)
656 return container_of(ttm, struct radeon_ttm_tt, ttm.ttm);
659 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev,
661 struct ttm_operation_ctx *ctx)
663 struct radeon_device *rdev = radeon_get_rdev(bdev);
664 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
665 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
667 if (gtt && gtt->userptr) {
668 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
672 ttm->page_flags |= TTM_PAGE_FLAG_SG;
676 if (slave && ttm->sg) {
677 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
678 gtt->ttm.dma_address, ttm->num_pages);
682 #if IS_ENABLED(CONFIG_AGP)
683 if (rdev->flags & RADEON_IS_AGP) {
684 return ttm_pool_populate(ttm, ctx);
688 #ifdef CONFIG_SWIOTLB
689 if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
690 return ttm_dma_populate(>t->ttm, rdev->dev, ctx);
694 return ttm_populate_and_map_pages(rdev->dev, >t->ttm, ctx);
697 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
699 struct radeon_device *rdev = radeon_get_rdev(bdev);
700 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
701 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
703 if (gtt && gtt->userptr) {
705 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
712 #if IS_ENABLED(CONFIG_AGP)
713 if (rdev->flags & RADEON_IS_AGP) {
714 ttm_pool_unpopulate(ttm);
719 #ifdef CONFIG_SWIOTLB
720 if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
721 ttm_dma_unpopulate(>t->ttm, rdev->dev);
726 ttm_unmap_and_unpopulate_pages(rdev->dev, >t->ttm);
729 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
730 struct ttm_tt *ttm, uint64_t addr,
733 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
739 gtt->usermm = current->mm;
740 gtt->userflags = flags;
744 bool radeon_ttm_tt_is_bound(struct ttm_bo_device *bdev,
747 #if IS_ENABLED(CONFIG_AGP)
748 struct radeon_device *rdev = radeon_get_rdev(bdev);
749 if (rdev->flags & RADEON_IS_AGP)
750 return ttm_agp_is_bound(ttm);
752 return radeon_ttm_backend_is_bound(ttm);
755 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
757 struct ttm_resource *bo_mem)
759 #if IS_ENABLED(CONFIG_AGP)
760 struct radeon_device *rdev = radeon_get_rdev(bdev);
765 #if IS_ENABLED(CONFIG_AGP)
766 if (rdev->flags & RADEON_IS_AGP)
767 return ttm_agp_bind(ttm, bo_mem);
770 return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
773 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
776 #if IS_ENABLED(CONFIG_AGP)
777 struct radeon_device *rdev = radeon_get_rdev(bdev);
779 if (rdev->flags & RADEON_IS_AGP) {
784 radeon_ttm_backend_unbind(bdev, ttm);
787 static void radeon_ttm_tt_destroy(struct ttm_bo_device *bdev,
790 #if IS_ENABLED(CONFIG_AGP)
791 struct radeon_device *rdev = radeon_get_rdev(bdev);
793 if (rdev->flags & RADEON_IS_AGP) {
795 ttm_tt_destroy_common(bdev, ttm);
796 ttm_agp_destroy(ttm);
800 radeon_ttm_backend_destroy(bdev, ttm);
803 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
806 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
811 return !!gtt->userptr;
814 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
817 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
822 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
826 radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo)
828 radeon_bo_move_notify(bo, false, NULL);
831 static struct ttm_bo_driver radeon_bo_driver = {
832 .ttm_tt_create = &radeon_ttm_tt_create,
833 .ttm_tt_populate = &radeon_ttm_tt_populate,
834 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
835 .ttm_tt_destroy = &radeon_ttm_tt_destroy,
836 .eviction_valuable = ttm_bo_eviction_valuable,
837 .evict_flags = &radeon_evict_flags,
838 .move = &radeon_bo_move,
839 .verify_access = &radeon_verify_access,
840 .delete_mem_notify = &radeon_bo_delete_mem_notify,
841 .io_mem_reserve = &radeon_ttm_io_mem_reserve,
844 int radeon_ttm_init(struct radeon_device *rdev)
848 /* No others user of address space so set it to 0 */
849 r = ttm_bo_device_init(&rdev->mman.bdev,
851 rdev->ddev->anon_inode->i_mapping,
852 rdev->ddev->vma_offset_manager,
853 dma_addressing_limited(&rdev->pdev->dev));
855 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
858 rdev->mman.initialized = true;
860 r = radeon_ttm_init_vram(rdev);
862 DRM_ERROR("Failed initializing VRAM heap.\n");
865 /* Change the size here instead of the init above so only lpfn is affected */
866 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
868 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
869 RADEON_GEM_DOMAIN_VRAM, 0, NULL,
870 NULL, &rdev->stolen_vga_memory);
874 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
877 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
878 radeon_bo_unreserve(rdev->stolen_vga_memory);
880 radeon_bo_unref(&rdev->stolen_vga_memory);
883 DRM_INFO("radeon: %uM of VRAM memory ready\n",
884 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
886 r = radeon_ttm_init_gtt(rdev);
888 DRM_ERROR("Failed initializing GTT heap.\n");
891 DRM_INFO("radeon: %uM of GTT memory ready.\n",
892 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
894 r = radeon_ttm_debugfs_init(rdev);
896 DRM_ERROR("Failed to init debugfs\n");
902 void radeon_ttm_fini(struct radeon_device *rdev)
906 if (!rdev->mman.initialized)
908 radeon_ttm_debugfs_fini(rdev);
909 if (rdev->stolen_vga_memory) {
910 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
912 radeon_bo_unpin(rdev->stolen_vga_memory);
913 radeon_bo_unreserve(rdev->stolen_vga_memory);
915 radeon_bo_unref(&rdev->stolen_vga_memory);
917 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
918 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
919 ttm_bo_device_release(&rdev->mman.bdev);
920 radeon_gart_fini(rdev);
921 rdev->mman.initialized = false;
922 DRM_INFO("radeon: ttm finalized\n");
925 /* this should only be called at bootup or when userspace
927 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
929 struct ttm_resource_manager *man;
931 if (!rdev->mman.initialized)
934 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
935 /* this just adjusts TTM size idea, which sets lpfn to the correct value */
936 man->size = size >> PAGE_SHIFT;
939 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
941 struct ttm_buffer_object *bo = vmf->vma->vm_private_data;
942 struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
945 down_read(&rdev->pm.mclk_lock);
947 ret = ttm_bo_vm_reserve(bo, vmf);
951 ret = radeon_bo_fault_reserve_notify(bo);
955 ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot,
956 TTM_BO_VM_NUM_PREFAULT, 1);
957 if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
961 dma_resv_unlock(bo->base.resv);
964 up_read(&rdev->pm.mclk_lock);
968 static struct vm_operations_struct radeon_ttm_vm_ops = {
969 .fault = radeon_ttm_fault,
970 .open = ttm_bo_vm_open,
971 .close = ttm_bo_vm_close,
972 .access = ttm_bo_vm_access
975 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
978 struct drm_file *file_priv = filp->private_data;
979 struct radeon_device *rdev = file_priv->minor->dev->dev_private;
984 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
985 if (unlikely(r != 0))
988 vma->vm_ops = &radeon_ttm_vm_ops;
992 #if defined(CONFIG_DEBUG_FS)
994 static int radeon_mm_dump_table(struct seq_file *m, void *data)
996 struct drm_info_node *node = (struct drm_info_node *)m->private;
997 unsigned ttm_pl = *(int*)node->info_ent->data;
998 struct drm_device *dev = node->minor->dev;
999 struct radeon_device *rdev = dev->dev_private;
1000 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl);
1001 struct drm_printer p = drm_seq_file_printer(m);
1003 man->func->debug(man, &p);
1008 static int ttm_pl_vram = TTM_PL_VRAM;
1009 static int ttm_pl_tt = TTM_PL_TT;
1011 static struct drm_info_list radeon_ttm_debugfs_list[] = {
1012 {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
1013 {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
1014 {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
1015 #ifdef CONFIG_SWIOTLB
1016 {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
1020 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
1022 struct radeon_device *rdev = inode->i_private;
1023 i_size_write(inode, rdev->mc.mc_vram_size);
1024 filep->private_data = inode->i_private;
1028 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
1029 size_t size, loff_t *pos)
1031 struct radeon_device *rdev = f->private_data;
1035 if (size & 0x3 || *pos & 0x3)
1039 unsigned long flags;
1042 if (*pos >= rdev->mc.mc_vram_size)
1045 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
1046 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
1047 if (rdev->family >= CHIP_CEDAR)
1048 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
1049 value = RREG32(RADEON_MM_DATA);
1050 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
1052 r = put_user(value, (uint32_t *)buf);
1065 static const struct file_operations radeon_ttm_vram_fops = {
1066 .owner = THIS_MODULE,
1067 .open = radeon_ttm_vram_open,
1068 .read = radeon_ttm_vram_read,
1069 .llseek = default_llseek
1072 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
1074 struct radeon_device *rdev = inode->i_private;
1075 i_size_write(inode, rdev->mc.gtt_size);
1076 filep->private_data = inode->i_private;
1080 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
1081 size_t size, loff_t *pos)
1083 struct radeon_device *rdev = f->private_data;
1088 loff_t p = *pos / PAGE_SIZE;
1089 unsigned off = *pos & ~PAGE_MASK;
1090 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
1094 if (p >= rdev->gart.num_cpu_pages)
1097 page = rdev->gart.pages[p];
1102 r = copy_to_user(buf, ptr, cur_size);
1103 kunmap(rdev->gart.pages[p]);
1105 r = clear_user(buf, cur_size);
1119 static const struct file_operations radeon_ttm_gtt_fops = {
1120 .owner = THIS_MODULE,
1121 .open = radeon_ttm_gtt_open,
1122 .read = radeon_ttm_gtt_read,
1123 .llseek = default_llseek
1128 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1130 #if defined(CONFIG_DEBUG_FS)
1133 struct drm_minor *minor = rdev->ddev->primary;
1134 struct dentry *root = minor->debugfs_root;
1136 rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1138 &radeon_ttm_vram_fops);
1140 rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1141 root, rdev, &radeon_ttm_gtt_fops);
1143 count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1145 #ifdef CONFIG_SWIOTLB
1146 if (!(rdev->need_swiotlb && swiotlb_nr_tbl()))
1150 return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1157 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1159 #if defined(CONFIG_DEBUG_FS)
1161 debugfs_remove(rdev->mman.vram);
1162 rdev->mman.vram = NULL;
1164 debugfs_remove(rdev->mman.gtt);
1165 rdev->mman.gtt = NULL;