drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32
  33 #include <linux/dma-mapping.h>
  34 #include <linux/pagemap.h>
  35 #include <linux/pci.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/slab.h>
  38 #include <linux/swap.h>
  39 #include <linux/swiotlb.h>
  40
  41 #include <drm/drm_agpsupport.h>
  42 #include <drm/drm_debugfs.h>
  43 #include <drm/drm_device.h>
  44 #include <drm/drm_file.h>
  45 #include <drm/drm_prime.h>
  46 #include <drm/radeon_drm.h>
  47 #include <drm/ttm/ttm_bo_api.h>
  48 #include <drm/ttm/ttm_bo_driver.h>
  49 #include <drm/ttm/ttm_module.h>
  50 #include <drm/ttm/ttm_page_alloc.h>
  51 #include <drm/ttm/ttm_placement.h>
  52
  53 #include "radeon_reg.h"
  54 #include "radeon.h"
  55
  56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
  58
  59 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
  60                               struct ttm_tt *ttm,
  61                               struct ttm_resource *bo_mem);
  62
  63 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  64 {
  65         struct radeon_mman *mman;
  66         struct radeon_device *rdev;
  67
  68         mman = container_of(bdev, struct radeon_mman, bdev);
  69         rdev = container_of(mman, struct radeon_device, mman);
  70         return rdev;
  71 }
  72
  73 static int radeon_ttm_init_vram(struct radeon_device *rdev)
  74 {
  75         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
  76                                   false, rdev->mc.real_vram_size >> PAGE_SHIFT);
  77 }
  78
  79 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
  80 {
  81         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
  82                                   true, rdev->mc.gtt_size >> PAGE_SHIFT);
  83 }
  84
  85 static void radeon_evict_flags(struct ttm_buffer_object *bo,
  86                                 struct ttm_placement *placement)
  87 {
  88         static const struct ttm_place placements = {
  89                 .fpfn = 0,
  90                 .lpfn = 0,
  91                 .mem_type = TTM_PL_SYSTEM,
  92                 .flags = 0
  93         };
  94
  95         struct radeon_bo *rbo;
  96
  97         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
  98                 placement->placement = &placements;
  99                 placement->busy_placement = &placements;
 100                 placement->num_placement = 1;
 101                 placement->num_busy_placement = 1;
 102                 return;
 103         }
 104         rbo = container_of(bo, struct radeon_bo, tbo);
 105         switch (bo->mem.mem_type) {
 106         case TTM_PL_VRAM:
 107                 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
 108                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 109                 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
 110                          bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
 111                         unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
 112                         int i;
 113
 114                         /* Try evicting to the CPU inaccessible part of VRAM
 115                          * first, but only set GTT as busy placement, so this
 116                          * BO will be evicted to GTT rather than causing other
 117                          * BOs to be evicted from VRAM
 118                          */
 119                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
 120                                                          RADEON_GEM_DOMAIN_GTT);
 121                         rbo->placement.num_busy_placement = 0;
 122                         for (i = 0; i < rbo->placement.num_placement; i++) {
 123                                 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
 124                                         if (rbo->placements[i].fpfn < fpfn)
 125                                                 rbo->placements[i].fpfn = fpfn;
 126                                 } else {
 127                                         rbo->placement.busy_placement =
 128                                                 &rbo->placements[i];
 129                                         rbo->placement.num_busy_placement = 1;
 130                                 }
 131                         }
 132                 } else
 133                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 134                 break;
 135         case TTM_PL_TT:
 136         default:
 137                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 138         }
 139         *placement = rbo->placement;
 140 }
 141
 142 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 143 {
 144         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 145         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
 146
 147         if (radeon_ttm_tt_has_userptr(rdev, bo->ttm))
 148                 return -EPERM;
 149         return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
 150                                           filp->private_data);
 151 }
 152
 153 static int radeon_move_blit(struct ttm_buffer_object *bo,
 154                         bool evict,
 155                         struct ttm_resource *new_mem,
 156                         struct ttm_resource *old_mem)
 157 {
 158         struct radeon_device *rdev;
 159         uint64_t old_start, new_start;
 160         struct radeon_fence *fence;
 161         unsigned num_pages;
 162         int r, ridx;
 163
 164         rdev = radeon_get_rdev(bo->bdev);
 165         ridx = radeon_copy_ring_index(rdev);
 166         old_start = (u64)old_mem->start << PAGE_SHIFT;
 167         new_start = (u64)new_mem->start << PAGE_SHIFT;
 168
 169         switch (old_mem->mem_type) {
 170         case TTM_PL_VRAM:
 171                 old_start += rdev->mc.vram_start;
 172                 break;
 173         case TTM_PL_TT:
 174                 old_start += rdev->mc.gtt_start;
 175                 break;
 176         default:
 177                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 178                 return -EINVAL;
 179         }
 180         switch (new_mem->mem_type) {
 181         case TTM_PL_VRAM:
 182                 new_start += rdev->mc.vram_start;
 183                 break;
 184         case TTM_PL_TT:
 185                 new_start += rdev->mc.gtt_start;
 186                 break;
 187         default:
 188                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 189                 return -EINVAL;
 190         }
 191         if (!rdev->ring[ridx].ready) {
 192                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 193                 return -EINVAL;
 194         }
 195
 196         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
 197
 198         num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 199         fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
 200         if (IS_ERR(fence))
 201                 return PTR_ERR(fence);
 202
 203         r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);
 204         radeon_fence_unref(&fence);
 205         return r;
 206 }
 207
 208 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 209                                 bool evict,
 210                                 struct ttm_operation_ctx *ctx,
 211                                 struct ttm_resource *new_mem)
 212 {
 213         struct ttm_resource *old_mem = &bo->mem;
 214         struct ttm_resource tmp_mem;
 215         struct ttm_place placements;
 216         struct ttm_placement placement;
 217         int r;
 218
 219         tmp_mem = *new_mem;
 220         tmp_mem.mm_node = NULL;
 221         placement.num_placement = 1;
 222         placement.placement = &placements;
 223         placement.num_busy_placement = 1;
 224         placement.busy_placement = &placements;
 225         placements.fpfn = 0;
 226         placements.lpfn = 0;
 227         placements.mem_type = TTM_PL_TT;
 228         placements.flags = 0;
 229         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
 230         if (unlikely(r)) {
 231                 return r;
 232         }
 233
 234         r = ttm_tt_populate(bo->bdev, bo->ttm, ctx);
 235         if (unlikely(r)) {
 236                 goto out_cleanup;
 237         }
 238
 239         r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_mem);
 240         if (unlikely(r)) {
 241                 goto out_cleanup;
 242         }
 243         r = radeon_move_blit(bo, true, &tmp_mem, old_mem);
 244         if (unlikely(r)) {
 245                 goto out_cleanup;
 246         }
 247         r = ttm_bo_move_ttm(bo, ctx, new_mem);
 248 out_cleanup:
 249         ttm_resource_free(bo, &tmp_mem);
 250         return r;
 251 }
 252
 253 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 254                                 bool evict,
 255                                 struct ttm_operation_ctx *ctx,
 256                                 struct ttm_resource *new_mem)
 257 {
 258         struct ttm_resource *old_mem = &bo->mem;
 259         struct ttm_resource tmp_mem;
 260         struct ttm_placement placement;
 261         struct ttm_place placements;
 262         int r;
 263
 264         tmp_mem = *new_mem;
 265         tmp_mem.mm_node = NULL;
 266         placement.num_placement = 1;
 267         placement.placement = &placements;
 268         placement.num_busy_placement = 1;
 269         placement.busy_placement = &placements;
 270         placements.fpfn = 0;
 271         placements.lpfn = 0;
 272         placements.mem_type = TTM_PL_TT;
 273         placements.flags = 0;
 274         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
 275         if (unlikely(r)) {
 276                 return r;
 277         }
 278         r = ttm_bo_move_to_new_tt_mem(bo, ctx, &tmp_mem);
 279         if (unlikely(r)) {
 280                 goto out_cleanup;
 281         }
 282         ttm_bo_assign_mem(bo, &tmp_mem);
 283         r = radeon_move_blit(bo, true, new_mem, old_mem);
 284         if (unlikely(r)) {
 285                 goto out_cleanup;
 286         }
 287 out_cleanup:
 288         ttm_resource_free(bo, &tmp_mem);
 289         return r;
 290 }
 291
 292 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
 293                           struct ttm_operation_ctx *ctx,
 294                           struct ttm_resource *new_mem)
 295 {
 296         struct radeon_device *rdev;
 297         struct radeon_bo *rbo;
 298         struct ttm_resource *old_mem = &bo->mem;
 299         int r;
 300
 301         r = ttm_bo_wait_ctx(bo, ctx);
 302         if (r)
 303                 return r;
 304
 305         /* Can't move a pinned BO */
 306         rbo = container_of(bo, struct radeon_bo, tbo);
 307         if (WARN_ON_ONCE(rbo->tbo.pin_count > 0))
 308                 return -EINVAL;
 309
 310         rdev = radeon_get_rdev(bo->bdev);
 311         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 312                 ttm_bo_move_null(bo, new_mem);
 313                 return 0;
 314         }
 315         if (old_mem->mem_type == TTM_PL_SYSTEM &&
 316             new_mem->mem_type == TTM_PL_TT) {
 317                 ttm_bo_move_null(bo, new_mem);
 318                 return 0;
 319         }
 320
 321         if (old_mem->mem_type == TTM_PL_TT &&
 322             new_mem->mem_type == TTM_PL_SYSTEM)
 323                 return ttm_bo_move_ttm(bo, ctx, new_mem);
 324
 325         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
 326             rdev->asic->copy.copy == NULL) {
 327                 /* use memcpy */
 328                 goto memcpy;
 329         }
 330
 331         if (old_mem->mem_type == TTM_PL_VRAM &&
 332             new_mem->mem_type == TTM_PL_SYSTEM) {
 333                 r = radeon_move_vram_ram(bo, evict, ctx, new_mem);
 334         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 335                    new_mem->mem_type == TTM_PL_VRAM) {
 336                 r = radeon_move_ram_vram(bo, evict, ctx, new_mem);
 337         } else {
 338                 r = radeon_move_blit(bo, evict,
 339                                      new_mem, old_mem);
 340         }
 341
 342         if (r) {
 343 memcpy:
 344                 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
 345                 if (r) {
 346                         return r;
 347                 }
 348         }
 349
 350         /* update statistics */
 351         atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
 352         return 0;
 353 }
 354
 355 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem)
 356 {
 357         struct radeon_device *rdev = radeon_get_rdev(bdev);
 358         size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
 359
 360         switch (mem->mem_type) {
 361         case TTM_PL_SYSTEM:
 362                 /* system memory */
 363                 return 0;
 364         case TTM_PL_TT:
 365 #if IS_ENABLED(CONFIG_AGP)
 366                 if (rdev->flags & RADEON_IS_AGP) {
 367                         /* RADEON_IS_AGP is set only if AGP is active */
 368                         mem->bus.offset = (mem->start << PAGE_SHIFT) +
 369                                 rdev->mc.agp_base;
 370                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 371                         mem->bus.caching = ttm_write_combined;
 372                 }
 373 #endif
 374                 break;
 375         case TTM_PL_VRAM:
 376                 mem->bus.offset = mem->start << PAGE_SHIFT;
 377                 /* check if it's visible */
 378                 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
 379                         return -EINVAL;
 380                 mem->bus.offset += rdev->mc.aper_base;
 381                 mem->bus.is_iomem = true;
 382                 mem->bus.caching = ttm_write_combined;
 383 #ifdef __alpha__
 384                 /*
 385                  * Alpha: use bus.addr to hold the ioremap() return,
 386                  * so we can modify bus.base below.
 387                  */
 388                 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);
 389                 if (!mem->bus.addr)
 390                         return -ENOMEM;
 391
 392                 /*
 393                  * Alpha: Use just the bus offset plus
 394                  * the hose/domain memory base for bus.base.
 395                  * It then can be used to build PTEs for VRAM
 396                  * access, as done in ttm_bo_vm_fault().
 397                  */
 398                 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
 399                         rdev->ddev->hose->dense_mem_base;
 400 #endif
 401                 break;
 402         default:
 403                 return -EINVAL;
 404         }
 405         return 0;
 406 }
 407
 408 /*
 409  * TTM backend functions.
 410  */
 411 struct radeon_ttm_tt {
 412         struct ttm_dma_tt               ttm;
 413         u64                             offset;
 414
 415         uint64_t                        userptr;
 416         struct mm_struct                *usermm;
 417         uint32_t                        userflags;
 418         bool bound;
 419 };
 420
 421 /* prepare the sg table with the user pages */
 422 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 423 {
 424         struct radeon_device *rdev = radeon_get_rdev(bdev);
 425         struct radeon_ttm_tt *gtt = (void *)ttm;
 426         unsigned pinned = 0;
 427         int r;
 428
 429         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 430         enum dma_data_direction direction = write ?
 431                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 432
 433         if (current->mm != gtt->usermm)
 434                 return -EPERM;
 435
 436         if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
 437                 /* check that we only pin down anonymous memory
 438                    to prevent problems with writeback */
 439                 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
 440                 struct vm_area_struct *vma;
 441                 vma = find_vma(gtt->usermm, gtt->userptr);
 442                 if (!vma || vma->vm_file || vma->vm_end < end)
 443                         return -EPERM;
 444         }
 445
 446         do {
 447                 unsigned num_pages = ttm->num_pages - pinned;
 448                 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
 449                 struct page **pages = ttm->pages + pinned;
 450
 451                 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
 452                                    pages, NULL);
 453                 if (r < 0)
 454                         goto release_pages;
 455
 456                 pinned += r;
 457
 458         } while (pinned < ttm->num_pages);
 459
 460         r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
 461                                       ttm->num_pages << PAGE_SHIFT,
 462                                       GFP_KERNEL);
 463         if (r)
 464                 goto release_sg;
 465
 466         r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
 467         if (r)
 468                 goto release_sg;
 469
 470         drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 471                                          gtt->ttm.dma_address, ttm->num_pages);
 472
 473         return 0;
 474
 475 release_sg:
 476         kfree(ttm->sg);
 477
 478 release_pages:
 479         release_pages(ttm->pages, pinned);
 480         return r;
 481 }
 482
 483 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 484 {
 485         struct radeon_device *rdev = radeon_get_rdev(bdev);
 486         struct radeon_ttm_tt *gtt = (void *)ttm;
 487         struct sg_page_iter sg_iter;
 488
 489         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 490         enum dma_data_direction direction = write ?
 491                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 492
 493         /* double check that we don't free the table twice */
 494         if (!ttm->sg->sgl)
 495                 return;
 496
 497         /* free the sg table and pages again */
 498         dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
 499
 500         for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
 501                 struct page *page = sg_page_iter_page(&sg_iter);
 502                 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
 503                         set_page_dirty(page);
 504
 505                 mark_page_accessed(page);
 506                 put_page(page);
 507         }
 508
 509         sg_free_table(ttm->sg);
 510 }
 511
 512 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
 513 {
 514         struct radeon_ttm_tt *gtt = (void*)ttm;
 515
 516         return (gtt->bound);
 517 }
 518
 519 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev,
 520                                    struct ttm_tt *ttm,
 521                                    struct ttm_resource *bo_mem)
 522 {
 523         struct radeon_ttm_tt *gtt = (void*)ttm;
 524         struct radeon_device *rdev = radeon_get_rdev(bdev);
 525         uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
 526                 RADEON_GART_PAGE_WRITE;
 527         int r;
 528
 529         if (gtt->bound)
 530                 return 0;
 531
 532         if (gtt->userptr) {
 533                 radeon_ttm_tt_pin_userptr(bdev, ttm);
 534                 flags &= ~RADEON_GART_PAGE_WRITE;
 535         }
 536
 537         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 538         if (!ttm->num_pages) {
 539                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
 540                      ttm->num_pages, bo_mem, ttm);
 541         }
 542         if (ttm->caching == ttm_cached)
 543                 flags |= RADEON_GART_PAGE_SNOOP;
 544         r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
 545                              ttm->pages, gtt->ttm.dma_address, flags);
 546         if (r) {
 547                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 548                           ttm->num_pages, (unsigned)gtt->offset);
 549                 return r;
 550         }
 551         gtt->bound = true;
 552         return 0;
 553 }
 554
 555 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 556 {
 557         struct radeon_ttm_tt *gtt = (void *)ttm;
 558         struct radeon_device *rdev = radeon_get_rdev(bdev);
 559
 560         if (!gtt->bound)
 561                 return;
 562
 563         radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
 564
 565         if (gtt->userptr)
 566                 radeon_ttm_tt_unpin_userptr(bdev, ttm);
 567         gtt->bound = false;
 568 }
 569
 570 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 571 {
 572         struct radeon_ttm_tt *gtt = (void *)ttm;
 573
 574         radeon_ttm_backend_unbind(bdev, ttm);
 575         ttm_tt_destroy_common(bdev, ttm);
 576
 577         ttm_dma_tt_fini(&gtt->ttm);
 578         kfree(gtt);
 579 }
 580
 581 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
 582                                            uint32_t page_flags)
 583 {
 584         struct radeon_device *rdev;
 585         struct radeon_ttm_tt *gtt;
 586         enum ttm_caching caching;
 587         struct radeon_bo *rbo;
 588
 589         rbo = container_of(bo, struct radeon_bo, tbo);
 590
 591         rdev = radeon_get_rdev(bo->bdev);
 592 #if IS_ENABLED(CONFIG_AGP)
 593         if (rdev->flags & RADEON_IS_AGP) {
 594                 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
 595                                          page_flags);
 596         }
 597 #endif
 598
 599         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
 600         if (gtt == NULL) {
 601                 return NULL;
 602         }
 603
 604         if (rbo->flags & RADEON_GEM_GTT_UC)
 605                 caching = ttm_uncached;
 606         else if (rbo->flags & RADEON_GEM_GTT_WC)
 607                 caching = ttm_write_combined;
 608         else
 609                 caching = ttm_cached;
 610
 611         if (ttm_dma_tt_init(&gtt->ttm, bo, page_flags, caching)) {
 612                 kfree(gtt);
 613                 return NULL;
 614         }
 615         return &gtt->ttm.ttm;
 616 }
 617
 618 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
 619                                                   struct ttm_tt *ttm)
 620 {
 621 #if IS_ENABLED(CONFIG_AGP)
 622         if (rdev->flags & RADEON_IS_AGP)
 623                 return NULL;
 624 #endif
 625
 626         if (!ttm)
 627                 return NULL;
 628         return container_of(ttm, struct radeon_ttm_tt, ttm.ttm);
 629 }
 630
 631 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev,
 632                                   struct ttm_tt *ttm,
 633                                   struct ttm_operation_ctx *ctx)
 634 {
 635         struct radeon_device *rdev = radeon_get_rdev(bdev);
 636         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 637         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 638
 639         if (gtt && gtt->userptr) {
 640                 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
 641                 if (!ttm->sg)
 642                         return -ENOMEM;
 643
 644                 ttm->page_flags |= TTM_PAGE_FLAG_SG;
 645                 ttm_tt_set_populated(ttm);
 646                 return 0;
 647         }
 648
 649         if (slave && ttm->sg) {
 650                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 651                                                  gtt->ttm.dma_address, ttm->num_pages);
 652                 ttm_tt_set_populated(ttm);
 653                 return 0;
 654         }
 655
 656 #if IS_ENABLED(CONFIG_AGP)
 657         if (rdev->flags & RADEON_IS_AGP) {
 658                 return ttm_pool_populate(ttm, ctx);
 659         }
 660 #endif
 661
 662 #ifdef CONFIG_SWIOTLB
 663         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 664                 return ttm_dma_populate(&gtt->ttm, rdev->dev, ctx);
 665         }
 666 #endif
 667
 668         return ttm_populate_and_map_pages(rdev->dev, &gtt->ttm, ctx);
 669 }
 670
 671 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 672 {
 673         struct radeon_device *rdev = radeon_get_rdev(bdev);
 674         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 675         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 676
 677         if (gtt && gtt->userptr) {
 678                 kfree(ttm->sg);
 679                 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
 680                 return;
 681         }
 682
 683         if (slave)
 684                 return;
 685
 686 #if IS_ENABLED(CONFIG_AGP)
 687         if (rdev->flags & RADEON_IS_AGP) {
 688                 ttm_pool_unpopulate(ttm);
 689                 return;
 690         }
 691 #endif
 692
 693 #ifdef CONFIG_SWIOTLB
 694         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 695                 ttm_dma_unpopulate(&gtt->ttm, rdev->dev);
 696                 return;
 697         }
 698 #endif
 699
 700         ttm_unmap_and_unpopulate_pages(rdev->dev, &gtt->ttm);
 701 }
 702
 703 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
 704                               struct ttm_tt *ttm, uint64_t addr,
 705                               uint32_t flags)
 706 {
 707         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 708
 709         if (gtt == NULL)
 710                 return -EINVAL;
 711
 712         gtt->userptr = addr;
 713         gtt->usermm = current->mm;
 714         gtt->userflags = flags;
 715         return 0;
 716 }
 717
 718 bool radeon_ttm_tt_is_bound(struct ttm_bo_device *bdev,
 719                             struct ttm_tt *ttm)
 720 {
 721 #if IS_ENABLED(CONFIG_AGP)
 722         struct radeon_device *rdev = radeon_get_rdev(bdev);
 723         if (rdev->flags & RADEON_IS_AGP)
 724                 return ttm_agp_is_bound(ttm);
 725 #endif
 726         return radeon_ttm_backend_is_bound(ttm);
 727 }
 728
 729 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
 730                               struct ttm_tt *ttm,
 731                               struct ttm_resource *bo_mem)
 732 {
 733 #if IS_ENABLED(CONFIG_AGP)
 734         struct radeon_device *rdev = radeon_get_rdev(bdev);
 735 #endif
 736
 737         if (!bo_mem)
 738                 return -EINVAL;
 739 #if IS_ENABLED(CONFIG_AGP)
 740         if (rdev->flags & RADEON_IS_AGP)
 741                 return ttm_agp_bind(ttm, bo_mem);
 742 #endif
 743
 744         return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
 745 }
 746
 747 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
 748                                  struct ttm_tt *ttm)
 749 {
 750 #if IS_ENABLED(CONFIG_AGP)
 751         struct radeon_device *rdev = radeon_get_rdev(bdev);
 752
 753         if (rdev->flags & RADEON_IS_AGP) {
 754                 ttm_agp_unbind(ttm);
 755                 return;
 756         }
 757 #endif
 758         radeon_ttm_backend_unbind(bdev, ttm);
 759 }
 760
 761 static void radeon_ttm_tt_destroy(struct ttm_bo_device *bdev,
 762                                   struct ttm_tt *ttm)
 763 {
 764 #if IS_ENABLED(CONFIG_AGP)
 765         struct radeon_device *rdev = radeon_get_rdev(bdev);
 766
 767         if (rdev->flags & RADEON_IS_AGP) {
 768                 ttm_agp_unbind(ttm);
 769                 ttm_tt_destroy_common(bdev, ttm);
 770                 ttm_agp_destroy(ttm);
 771                 return;
 772         }
 773 #endif
 774         radeon_ttm_backend_destroy(bdev, ttm);
 775 }
 776
 777 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
 778                                struct ttm_tt *ttm)
 779 {
 780         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 781
 782         if (gtt == NULL)
 783                 return false;
 784
 785         return !!gtt->userptr;
 786 }
 787
 788 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
 789                                struct ttm_tt *ttm)
 790 {
 791         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 792
 793         if (gtt == NULL)
 794                 return false;
 795
 796         return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 797 }
 798
 799 static struct ttm_bo_driver radeon_bo_driver = {
 800         .ttm_tt_create = &radeon_ttm_tt_create,
 801         .ttm_tt_populate = &radeon_ttm_tt_populate,
 802         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 803         .ttm_tt_bind = &radeon_ttm_tt_bind,
 804         .ttm_tt_unbind = &radeon_ttm_tt_unbind,
 805         .ttm_tt_destroy = &radeon_ttm_tt_destroy,
 806         .eviction_valuable = ttm_bo_eviction_valuable,
 807         .evict_flags = &radeon_evict_flags,
 808         .move = &radeon_bo_move,
 809         .verify_access = &radeon_verify_access,
 810         .move_notify = &radeon_bo_move_notify,
 811         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 812 };
 813
 814 int radeon_ttm_init(struct radeon_device *rdev)
 815 {
 816         int r;
 817
 818         /* No others user of address space so set it to 0 */
 819         r = ttm_bo_device_init(&rdev->mman.bdev,
 820                                &radeon_bo_driver,
 821                                rdev->ddev->anon_inode->i_mapping,
 822                                rdev->ddev->vma_offset_manager,
 823                                dma_addressing_limited(&rdev->pdev->dev));
 824         if (r) {
 825                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 826                 return r;
 827         }
 828         rdev->mman.initialized = true;
 829
 830         r = radeon_ttm_init_vram(rdev);
 831         if (r) {
 832                 DRM_ERROR("Failed initializing VRAM heap.\n");
 833                 return r;
 834         }
 835         /* Change the size here instead of the init above so only lpfn is affected */
 836         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
 837
 838         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 839                              RADEON_GEM_DOMAIN_VRAM, 0, NULL,
 840                              NULL, &rdev->stolen_vga_memory);
 841         if (r) {
 842                 return r;
 843         }
 844         r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 845         if (r)
 846                 return r;
 847         r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 848         radeon_bo_unreserve(rdev->stolen_vga_memory);
 849         if (r) {
 850                 radeon_bo_unref(&rdev->stolen_vga_memory);
 851                 return r;
 852         }
 853         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 854                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
 855
 856         r = radeon_ttm_init_gtt(rdev);
 857         if (r) {
 858                 DRM_ERROR("Failed initializing GTT heap.\n");
 859                 return r;
 860         }
 861         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 862                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 863
 864         r = radeon_ttm_debugfs_init(rdev);
 865         if (r) {
 866                 DRM_ERROR("Failed to init debugfs\n");
 867                 return r;
 868         }
 869         return 0;
 870 }
 871
 872 void radeon_ttm_fini(struct radeon_device *rdev)
 873 {
 874         int r;
 875
 876         if (!rdev->mman.initialized)
 877                 return;
 878         radeon_ttm_debugfs_fini(rdev);
 879         if (rdev->stolen_vga_memory) {
 880                 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 881                 if (r == 0) {
 882                         radeon_bo_unpin(rdev->stolen_vga_memory);
 883                         radeon_bo_unreserve(rdev->stolen_vga_memory);
 884                 }
 885                 radeon_bo_unref(&rdev->stolen_vga_memory);
 886         }
 887         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
 888         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
 889         ttm_bo_device_release(&rdev->mman.bdev);
 890         radeon_gart_fini(rdev);
 891         rdev->mman.initialized = false;
 892         DRM_INFO("radeon: ttm finalized\n");
 893 }
 894
 895 /* this should only be called at bootup or when userspace
 896  * isn't running */
 897 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 898 {
 899         struct ttm_resource_manager *man;
 900
 901         if (!rdev->mman.initialized)
 902                 return;
 903
 904         man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
 905         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 906         man->size = size >> PAGE_SHIFT;
 907 }
 908
 909 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
 910 {
 911         struct ttm_buffer_object *bo = vmf->vma->vm_private_data;
 912         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
 913         vm_fault_t ret;
 914
 915         down_read(&rdev->pm.mclk_lock);
 916
 917         ret = ttm_bo_vm_reserve(bo, vmf);
 918         if (ret)
 919                 goto unlock_mclk;
 920
 921         ret = radeon_bo_fault_reserve_notify(bo);
 922         if (ret)
 923                 goto unlock_resv;
 924
 925         ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot,
 926                                        TTM_BO_VM_NUM_PREFAULT, 1);
 927         if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
 928                 goto unlock_mclk;
 929
 930 unlock_resv:
 931         dma_resv_unlock(bo->base.resv);
 932
 933 unlock_mclk:
 934         up_read(&rdev->pm.mclk_lock);
 935         return ret;
 936 }
 937
 938 static struct vm_operations_struct radeon_ttm_vm_ops = {
 939         .fault = radeon_ttm_fault,
 940         .open = ttm_bo_vm_open,
 941         .close = ttm_bo_vm_close,
 942         .access = ttm_bo_vm_access
 943 };
 944
 945 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 946 {
 947         int r;
 948         struct drm_file *file_priv = filp->private_data;
 949         struct radeon_device *rdev = file_priv->minor->dev->dev_private;
 950
 951         if (rdev == NULL)
 952                 return -EINVAL;
 953
 954         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 955         if (unlikely(r != 0))
 956                 return r;
 957
 958         vma->vm_ops = &radeon_ttm_vm_ops;
 959         return 0;
 960 }
 961
 962 #if defined(CONFIG_DEBUG_FS)
 963
 964 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 965 {
 966         struct drm_info_node *node = (struct drm_info_node *)m->private;
 967         unsigned ttm_pl = *(int*)node->info_ent->data;
 968         struct drm_device *dev = node->minor->dev;
 969         struct radeon_device *rdev = dev->dev_private;
 970         struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl);
 971         struct drm_printer p = drm_seq_file_printer(m);
 972
 973         man->func->debug(man, &p);
 974         return 0;
 975 }
 976
 977
 978 static int ttm_pl_vram = TTM_PL_VRAM;
 979 static int ttm_pl_tt = TTM_PL_TT;
 980
 981 static struct drm_info_list radeon_ttm_debugfs_list[] = {
 982         {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
 983         {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
 984         {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
 985 #ifdef CONFIG_SWIOTLB
 986         {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
 987 #endif
 988 };
 989
 990 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
 991 {
 992         struct radeon_device *rdev = inode->i_private;
 993         i_size_write(inode, rdev->mc.mc_vram_size);
 994         filep->private_data = inode->i_private;
 995         return 0;
 996 }
 997
 998 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
 999                                     size_t size, loff_t *pos)
1000 {
1001         struct radeon_device *rdev = f->private_data;
1002         ssize_t result = 0;
1003         int r;
1004
1005         if (size & 0x3 || *pos & 0x3)
1006                 return -EINVAL;
1007
1008         while (size) {
1009                 unsigned long flags;
1010                 uint32_t value;
1011
1012                 if (*pos >= rdev->mc.mc_vram_size)
1013                         return result;
1014
1015                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
1016                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
1017                 if (rdev->family >= CHIP_CEDAR)
1018                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
1019                 value = RREG32(RADEON_MM_DATA);
1020                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
1021
1022                 r = put_user(value, (uint32_t *)buf);
1023                 if (r)
1024                         return r;
1025
1026                 result += 4;
1027                 buf += 4;
1028                 *pos += 4;
1029                 size -= 4;
1030         }
1031
1032         return result;
1033 }
1034
1035 static const struct file_operations radeon_ttm_vram_fops = {
1036         .owner = THIS_MODULE,
1037         .open = radeon_ttm_vram_open,
1038         .read = radeon_ttm_vram_read,
1039         .llseek = default_llseek
1040 };
1041
1042 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
1043 {
1044         struct radeon_device *rdev = inode->i_private;
1045         i_size_write(inode, rdev->mc.gtt_size);
1046         filep->private_data = inode->i_private;
1047         return 0;
1048 }
1049
1050 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
1051                                    size_t size, loff_t *pos)
1052 {
1053         struct radeon_device *rdev = f->private_data;
1054         ssize_t result = 0;
1055         int r;
1056
1057         while (size) {
1058                 loff_t p = *pos / PAGE_SIZE;
1059                 unsigned off = *pos & ~PAGE_MASK;
1060                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
1061                 struct page *page;
1062                 void *ptr;
1063
1064                 if (p >= rdev->gart.num_cpu_pages)
1065                         return result;
1066
1067                 page = rdev->gart.pages[p];
1068                 if (page) {
1069                         ptr = kmap(page);
1070                         ptr += off;
1071
1072                         r = copy_to_user(buf, ptr, cur_size);
1073                         kunmap(rdev->gart.pages[p]);
1074                 } else
1075                         r = clear_user(buf, cur_size);
1076
1077                 if (r)
1078                         return -EFAULT;
1079
1080                 result += cur_size;
1081                 buf += cur_size;
1082                 *pos += cur_size;
1083                 size -= cur_size;
1084         }
1085
1086         return result;
1087 }
1088
1089 static const struct file_operations radeon_ttm_gtt_fops = {
1090         .owner = THIS_MODULE,
1091         .open = radeon_ttm_gtt_open,
1092         .read = radeon_ttm_gtt_read,
1093         .llseek = default_llseek
1094 };
1095
1096 #endif
1097
1098 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1099 {
1100 #if defined(CONFIG_DEBUG_FS)
1101         unsigned count;
1102
1103         struct drm_minor *minor = rdev->ddev->primary;
1104         struct dentry *root = minor->debugfs_root;
1105
1106         rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1107                                               root, rdev,
1108                                               &radeon_ttm_vram_fops);
1109
1110         rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1111                                              root, rdev, &radeon_ttm_gtt_fops);
1112
1113         count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1114
1115 #ifdef CONFIG_SWIOTLB
1116         if (!(rdev->need_swiotlb && swiotlb_nr_tbl()))
1117                 --count;
1118 #endif
1119
1120         return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1121 #else
1122
1123         return 0;
1124 #endif
1125 }
1126
1127 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1128 {
1129 #if defined(CONFIG_DEBUG_FS)
1130
1131         debugfs_remove(rdev->mman.vram);
1132         rdev->mman.vram = NULL;
1133
1134         debugfs_remove(rdev->mman.gtt);
1135         rdev->mman.gtt = NULL;
1136 #endif
1137 }