2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
33 #include <linux/dma-mapping.h>
34 #include <linux/pagemap.h>
35 #include <linux/pci.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
38 #include <linux/swap.h>
39 #include <linux/swiotlb.h>
41 #include <drm/drm_agpsupport.h>
42 #include <drm/drm_debugfs.h>
43 #include <drm/drm_device.h>
44 #include <drm/drm_file.h>
45 #include <drm/drm_prime.h>
46 #include <drm/radeon_drm.h>
47 #include <drm/ttm/ttm_bo_api.h>
48 #include <drm/ttm/ttm_bo_driver.h>
49 #include <drm/ttm/ttm_module.h>
50 #include <drm/ttm/ttm_page_alloc.h>
51 #include <drm/ttm/ttm_placement.h>
53 #include "radeon_reg.h"
56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
59 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
61 struct radeon_mman *mman;
62 struct radeon_device *rdev;
64 mman = container_of(bdev, struct radeon_mman, bdev);
65 rdev = container_of(mman, struct radeon_device, mman);
69 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
70 struct ttm_mem_type_manager *man)
72 struct radeon_device *rdev;
74 rdev = radeon_get_rdev(bdev);
79 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
80 man->available_caching = TTM_PL_MASK_CACHING;
81 man->default_caching = TTM_PL_FLAG_CACHED;
84 man->func = &ttm_bo_manager_func;
85 man->gpu_offset = rdev->mc.gtt_start;
86 man->available_caching = TTM_PL_MASK_CACHING;
87 man->default_caching = TTM_PL_FLAG_CACHED;
88 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
89 #if IS_ENABLED(CONFIG_AGP)
90 if (rdev->flags & RADEON_IS_AGP) {
91 if (!rdev->ddev->agp) {
92 DRM_ERROR("AGP is not enabled for memory type %u\n",
96 if (!rdev->ddev->agp->cant_use_aperture)
97 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
98 man->available_caching = TTM_PL_FLAG_UNCACHED |
100 man->default_caching = TTM_PL_FLAG_WC;
105 /* "On-card" video ram */
106 man->func = &ttm_bo_manager_func;
107 man->gpu_offset = rdev->mc.vram_start;
108 man->flags = TTM_MEMTYPE_FLAG_FIXED |
109 TTM_MEMTYPE_FLAG_MAPPABLE;
110 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
111 man->default_caching = TTM_PL_FLAG_WC;
114 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
120 static void radeon_evict_flags(struct ttm_buffer_object *bo,
121 struct ttm_placement *placement)
123 static const struct ttm_place placements = {
126 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM
129 struct radeon_bo *rbo;
131 if (!radeon_ttm_bo_is_radeon_bo(bo)) {
132 placement->placement = &placements;
133 placement->busy_placement = &placements;
134 placement->num_placement = 1;
135 placement->num_busy_placement = 1;
138 rbo = container_of(bo, struct radeon_bo, tbo);
139 switch (bo->mem.mem_type) {
141 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
142 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
143 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
144 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
145 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
148 /* Try evicting to the CPU inaccessible part of VRAM
149 * first, but only set GTT as busy placement, so this
150 * BO will be evicted to GTT rather than causing other
151 * BOs to be evicted from VRAM
153 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
154 RADEON_GEM_DOMAIN_GTT);
155 rbo->placement.num_busy_placement = 0;
156 for (i = 0; i < rbo->placement.num_placement; i++) {
157 if (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) {
158 if (rbo->placements[i].fpfn < fpfn)
159 rbo->placements[i].fpfn = fpfn;
161 rbo->placement.busy_placement =
163 rbo->placement.num_busy_placement = 1;
167 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
171 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
173 *placement = rbo->placement;
176 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
178 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
180 if (radeon_ttm_tt_has_userptr(bo->ttm))
182 return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
186 static void radeon_move_null(struct ttm_buffer_object *bo,
187 struct ttm_mem_reg *new_mem)
189 struct ttm_mem_reg *old_mem = &bo->mem;
191 BUG_ON(old_mem->mm_node != NULL);
193 new_mem->mm_node = NULL;
196 static int radeon_move_blit(struct ttm_buffer_object *bo,
197 bool evict, bool no_wait_gpu,
198 struct ttm_mem_reg *new_mem,
199 struct ttm_mem_reg *old_mem)
201 struct radeon_device *rdev;
202 uint64_t old_start, new_start;
203 struct radeon_fence *fence;
207 rdev = radeon_get_rdev(bo->bdev);
208 ridx = radeon_copy_ring_index(rdev);
209 old_start = (u64)old_mem->start << PAGE_SHIFT;
210 new_start = (u64)new_mem->start << PAGE_SHIFT;
212 switch (old_mem->mem_type) {
214 old_start += rdev->mc.vram_start;
217 old_start += rdev->mc.gtt_start;
220 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
223 switch (new_mem->mem_type) {
225 new_start += rdev->mc.vram_start;
228 new_start += rdev->mc.gtt_start;
231 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
234 if (!rdev->ring[ridx].ready) {
235 DRM_ERROR("Trying to move memory with ring turned off.\n");
239 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
241 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
242 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
244 return PTR_ERR(fence);
246 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, new_mem);
247 radeon_fence_unref(&fence);
251 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
252 bool evict, bool interruptible,
254 struct ttm_mem_reg *new_mem)
256 struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
257 struct ttm_mem_reg *old_mem = &bo->mem;
258 struct ttm_mem_reg tmp_mem;
259 struct ttm_place placements;
260 struct ttm_placement placement;
264 tmp_mem.mm_node = NULL;
265 placement.num_placement = 1;
266 placement.placement = &placements;
267 placement.num_busy_placement = 1;
268 placement.busy_placement = &placements;
271 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
272 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
277 r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
282 r = ttm_tt_bind(bo->ttm, &tmp_mem, &ctx);
286 r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
290 r = ttm_bo_move_ttm(bo, &ctx, new_mem);
292 ttm_bo_mem_put(bo, &tmp_mem);
296 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
297 bool evict, bool interruptible,
299 struct ttm_mem_reg *new_mem)
301 struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
302 struct ttm_mem_reg *old_mem = &bo->mem;
303 struct ttm_mem_reg tmp_mem;
304 struct ttm_placement placement;
305 struct ttm_place placements;
309 tmp_mem.mm_node = NULL;
310 placement.num_placement = 1;
311 placement.placement = &placements;
312 placement.num_busy_placement = 1;
313 placement.busy_placement = &placements;
316 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
317 r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
321 r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem);
325 r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
330 ttm_bo_mem_put(bo, &tmp_mem);
334 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
335 struct ttm_operation_ctx *ctx,
336 struct ttm_mem_reg *new_mem)
338 struct radeon_device *rdev;
339 struct radeon_bo *rbo;
340 struct ttm_mem_reg *old_mem = &bo->mem;
343 r = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
347 /* Can't move a pinned BO */
348 rbo = container_of(bo, struct radeon_bo, tbo);
349 if (WARN_ON_ONCE(rbo->pin_count > 0))
352 rdev = radeon_get_rdev(bo->bdev);
353 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
354 radeon_move_null(bo, new_mem);
357 if ((old_mem->mem_type == TTM_PL_TT &&
358 new_mem->mem_type == TTM_PL_SYSTEM) ||
359 (old_mem->mem_type == TTM_PL_SYSTEM &&
360 new_mem->mem_type == TTM_PL_TT)) {
362 radeon_move_null(bo, new_mem);
365 if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
366 rdev->asic->copy.copy == NULL) {
371 if (old_mem->mem_type == TTM_PL_VRAM &&
372 new_mem->mem_type == TTM_PL_SYSTEM) {
373 r = radeon_move_vram_ram(bo, evict, ctx->interruptible,
374 ctx->no_wait_gpu, new_mem);
375 } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
376 new_mem->mem_type == TTM_PL_VRAM) {
377 r = radeon_move_ram_vram(bo, evict, ctx->interruptible,
378 ctx->no_wait_gpu, new_mem);
380 r = radeon_move_blit(bo, evict, ctx->no_wait_gpu,
386 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
392 /* update statistics */
393 atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
397 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
399 struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
400 struct radeon_device *rdev = radeon_get_rdev(bdev);
402 mem->bus.addr = NULL;
404 mem->bus.size = mem->num_pages << PAGE_SHIFT;
406 mem->bus.is_iomem = false;
407 if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
409 switch (mem->mem_type) {
414 #if IS_ENABLED(CONFIG_AGP)
415 if (rdev->flags & RADEON_IS_AGP) {
416 /* RADEON_IS_AGP is set only if AGP is active */
417 mem->bus.offset = mem->start << PAGE_SHIFT;
418 mem->bus.base = rdev->mc.agp_base;
419 mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
424 mem->bus.offset = mem->start << PAGE_SHIFT;
425 /* check if it's visible */
426 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
428 mem->bus.base = rdev->mc.aper_base;
429 mem->bus.is_iomem = true;
432 * Alpha: use bus.addr to hold the ioremap() return,
433 * so we can modify bus.base below.
435 if (mem->placement & TTM_PL_FLAG_WC)
437 ioremap_wc(mem->bus.base + mem->bus.offset,
441 ioremap_nocache(mem->bus.base + mem->bus.offset,
447 * Alpha: Use just the bus offset plus
448 * the hose/domain memory base for bus.base.
449 * It then can be used to build PTEs for VRAM
450 * access, as done in ttm_bo_vm_fault().
452 mem->bus.base = (mem->bus.base & 0x0ffffffffUL) +
453 rdev->ddev->hose->dense_mem_base;
462 static void radeon_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
467 * TTM backend functions.
469 struct radeon_ttm_tt {
470 struct ttm_dma_tt ttm;
471 struct radeon_device *rdev;
475 struct mm_struct *usermm;
479 /* prepare the sg table with the user pages */
480 static int radeon_ttm_tt_pin_userptr(struct ttm_tt *ttm)
482 struct radeon_device *rdev = radeon_get_rdev(ttm->bdev);
483 struct radeon_ttm_tt *gtt = (void *)ttm;
484 unsigned pinned = 0, nents;
487 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
488 enum dma_data_direction direction = write ?
489 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
491 if (current->mm != gtt->usermm)
494 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
495 /* check that we only pin down anonymous memory
496 to prevent problems with writeback */
497 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
498 struct vm_area_struct *vma;
499 vma = find_vma(gtt->usermm, gtt->userptr);
500 if (!vma || vma->vm_file || vma->vm_end < end)
505 unsigned num_pages = ttm->num_pages - pinned;
506 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
507 struct page **pages = ttm->pages + pinned;
509 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
516 } while (pinned < ttm->num_pages);
518 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
519 ttm->num_pages << PAGE_SHIFT,
525 nents = dma_map_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction);
526 if (nents != ttm->sg->nents)
529 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
530 gtt->ttm.dma_address, ttm->num_pages);
538 release_pages(ttm->pages, pinned);
542 static void radeon_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
544 struct radeon_device *rdev = radeon_get_rdev(ttm->bdev);
545 struct radeon_ttm_tt *gtt = (void *)ttm;
546 struct sg_page_iter sg_iter;
548 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
549 enum dma_data_direction direction = write ?
550 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
552 /* double check that we don't free the table twice */
556 /* free the sg table and pages again */
557 dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction);
559 for_each_sg_page(ttm->sg->sgl, &sg_iter, ttm->sg->nents, 0) {
560 struct page *page = sg_page_iter_page(&sg_iter);
561 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
562 set_page_dirty(page);
564 mark_page_accessed(page);
568 sg_free_table(ttm->sg);
571 static int radeon_ttm_backend_bind(struct ttm_tt *ttm,
572 struct ttm_mem_reg *bo_mem)
574 struct radeon_ttm_tt *gtt = (void*)ttm;
575 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
576 RADEON_GART_PAGE_WRITE;
580 radeon_ttm_tt_pin_userptr(ttm);
581 flags &= ~RADEON_GART_PAGE_WRITE;
584 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
585 if (!ttm->num_pages) {
586 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
587 ttm->num_pages, bo_mem, ttm);
589 if (ttm->caching_state == tt_cached)
590 flags |= RADEON_GART_PAGE_SNOOP;
591 r = radeon_gart_bind(gtt->rdev, gtt->offset, ttm->num_pages,
592 ttm->pages, gtt->ttm.dma_address, flags);
594 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
595 ttm->num_pages, (unsigned)gtt->offset);
601 static int radeon_ttm_backend_unbind(struct ttm_tt *ttm)
603 struct radeon_ttm_tt *gtt = (void *)ttm;
605 radeon_gart_unbind(gtt->rdev, gtt->offset, ttm->num_pages);
608 radeon_ttm_tt_unpin_userptr(ttm);
613 static void radeon_ttm_backend_destroy(struct ttm_tt *ttm)
615 struct radeon_ttm_tt *gtt = (void *)ttm;
617 ttm_dma_tt_fini(>t->ttm);
621 static struct ttm_backend_func radeon_backend_func = {
622 .bind = &radeon_ttm_backend_bind,
623 .unbind = &radeon_ttm_backend_unbind,
624 .destroy = &radeon_ttm_backend_destroy,
627 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
630 struct radeon_device *rdev;
631 struct radeon_ttm_tt *gtt;
633 rdev = radeon_get_rdev(bo->bdev);
634 #if IS_ENABLED(CONFIG_AGP)
635 if (rdev->flags & RADEON_IS_AGP) {
636 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
641 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
645 gtt->ttm.ttm.func = &radeon_backend_func;
647 if (ttm_dma_tt_init(>t->ttm, bo, page_flags)) {
651 return >t->ttm.ttm;
654 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct ttm_tt *ttm)
656 if (!ttm || ttm->func != &radeon_backend_func)
658 return (struct radeon_ttm_tt *)ttm;
661 static int radeon_ttm_tt_populate(struct ttm_tt *ttm,
662 struct ttm_operation_ctx *ctx)
664 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
665 struct radeon_device *rdev;
666 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
668 if (gtt && gtt->userptr) {
669 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
673 ttm->page_flags |= TTM_PAGE_FLAG_SG;
674 ttm->state = tt_unbound;
678 if (slave && ttm->sg) {
679 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
680 gtt->ttm.dma_address, ttm->num_pages);
681 ttm->state = tt_unbound;
685 rdev = radeon_get_rdev(ttm->bdev);
686 #if IS_ENABLED(CONFIG_AGP)
687 if (rdev->flags & RADEON_IS_AGP) {
688 return ttm_agp_tt_populate(ttm, ctx);
692 #ifdef CONFIG_SWIOTLB
693 if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
694 return ttm_dma_populate(>t->ttm, rdev->dev, ctx);
698 return ttm_populate_and_map_pages(rdev->dev, >t->ttm, ctx);
701 static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm)
703 struct radeon_device *rdev;
704 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
705 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
707 if (gtt && gtt->userptr) {
709 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
716 rdev = radeon_get_rdev(ttm->bdev);
717 #if IS_ENABLED(CONFIG_AGP)
718 if (rdev->flags & RADEON_IS_AGP) {
719 ttm_agp_tt_unpopulate(ttm);
724 #ifdef CONFIG_SWIOTLB
725 if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
726 ttm_dma_unpopulate(>t->ttm, rdev->dev);
731 ttm_unmap_and_unpopulate_pages(rdev->dev, >t->ttm);
734 int radeon_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr,
737 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
743 gtt->usermm = current->mm;
744 gtt->userflags = flags;
748 bool radeon_ttm_tt_has_userptr(struct ttm_tt *ttm)
750 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
755 return !!gtt->userptr;
758 bool radeon_ttm_tt_is_readonly(struct ttm_tt *ttm)
760 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
765 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
768 static struct ttm_bo_driver radeon_bo_driver = {
769 .ttm_tt_create = &radeon_ttm_tt_create,
770 .ttm_tt_populate = &radeon_ttm_tt_populate,
771 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
772 .init_mem_type = &radeon_init_mem_type,
773 .eviction_valuable = ttm_bo_eviction_valuable,
774 .evict_flags = &radeon_evict_flags,
775 .move = &radeon_bo_move,
776 .verify_access = &radeon_verify_access,
777 .move_notify = &radeon_bo_move_notify,
778 .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
779 .io_mem_reserve = &radeon_ttm_io_mem_reserve,
780 .io_mem_free = &radeon_ttm_io_mem_free,
783 int radeon_ttm_init(struct radeon_device *rdev)
787 /* No others user of address space so set it to 0 */
788 r = ttm_bo_device_init(&rdev->mman.bdev,
790 rdev->ddev->anon_inode->i_mapping,
791 rdev->ddev->vma_offset_manager,
792 dma_addressing_limited(&rdev->pdev->dev));
794 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
797 rdev->mman.initialized = true;
798 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
799 rdev->mc.real_vram_size >> PAGE_SHIFT);
801 DRM_ERROR("Failed initializing VRAM heap.\n");
804 /* Change the size here instead of the init above so only lpfn is affected */
805 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
807 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
808 RADEON_GEM_DOMAIN_VRAM, 0, NULL,
809 NULL, &rdev->stolen_vga_memory);
813 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
816 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
817 radeon_bo_unreserve(rdev->stolen_vga_memory);
819 radeon_bo_unref(&rdev->stolen_vga_memory);
822 DRM_INFO("radeon: %uM of VRAM memory ready\n",
823 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
824 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
825 rdev->mc.gtt_size >> PAGE_SHIFT);
827 DRM_ERROR("Failed initializing GTT heap.\n");
830 DRM_INFO("radeon: %uM of GTT memory ready.\n",
831 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
833 r = radeon_ttm_debugfs_init(rdev);
835 DRM_ERROR("Failed to init debugfs\n");
841 void radeon_ttm_fini(struct radeon_device *rdev)
845 if (!rdev->mman.initialized)
847 radeon_ttm_debugfs_fini(rdev);
848 if (rdev->stolen_vga_memory) {
849 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
851 radeon_bo_unpin(rdev->stolen_vga_memory);
852 radeon_bo_unreserve(rdev->stolen_vga_memory);
854 radeon_bo_unref(&rdev->stolen_vga_memory);
856 ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
857 ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
858 ttm_bo_device_release(&rdev->mman.bdev);
859 radeon_gart_fini(rdev);
860 rdev->mman.initialized = false;
861 DRM_INFO("radeon: ttm finalized\n");
864 /* this should only be called at bootup or when userspace
866 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
868 struct ttm_mem_type_manager *man;
870 if (!rdev->mman.initialized)
873 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
874 /* this just adjusts TTM size idea, which sets lpfn to the correct value */
875 man->size = size >> PAGE_SHIFT;
878 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
880 struct ttm_buffer_object *bo;
881 struct radeon_device *rdev;
884 bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data;
886 return VM_FAULT_NOPAGE;
888 rdev = radeon_get_rdev(bo->bdev);
889 down_read(&rdev->pm.mclk_lock);
890 ret = ttm_bo_vm_fault(vmf);
891 up_read(&rdev->pm.mclk_lock);
895 static struct vm_operations_struct radeon_ttm_vm_ops = {
896 .fault = radeon_ttm_fault,
897 .open = ttm_bo_vm_open,
898 .close = ttm_bo_vm_close,
899 .access = ttm_bo_vm_access
902 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
905 struct drm_file *file_priv = filp->private_data;
906 struct radeon_device *rdev = file_priv->minor->dev->dev_private;
911 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
912 if (unlikely(r != 0))
915 vma->vm_ops = &radeon_ttm_vm_ops;
919 #if defined(CONFIG_DEBUG_FS)
921 static int radeon_mm_dump_table(struct seq_file *m, void *data)
923 struct drm_info_node *node = (struct drm_info_node *)m->private;
924 unsigned ttm_pl = *(int*)node->info_ent->data;
925 struct drm_device *dev = node->minor->dev;
926 struct radeon_device *rdev = dev->dev_private;
927 struct ttm_mem_type_manager *man = &rdev->mman.bdev.man[ttm_pl];
928 struct drm_printer p = drm_seq_file_printer(m);
930 man->func->debug(man, &p);
935 static int ttm_pl_vram = TTM_PL_VRAM;
936 static int ttm_pl_tt = TTM_PL_TT;
938 static struct drm_info_list radeon_ttm_debugfs_list[] = {
939 {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
940 {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
941 {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
942 #ifdef CONFIG_SWIOTLB
943 {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
947 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
949 struct radeon_device *rdev = inode->i_private;
950 i_size_write(inode, rdev->mc.mc_vram_size);
951 filep->private_data = inode->i_private;
955 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
956 size_t size, loff_t *pos)
958 struct radeon_device *rdev = f->private_data;
962 if (size & 0x3 || *pos & 0x3)
969 if (*pos >= rdev->mc.mc_vram_size)
972 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
973 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
974 if (rdev->family >= CHIP_CEDAR)
975 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
976 value = RREG32(RADEON_MM_DATA);
977 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
979 r = put_user(value, (uint32_t *)buf);
992 static const struct file_operations radeon_ttm_vram_fops = {
993 .owner = THIS_MODULE,
994 .open = radeon_ttm_vram_open,
995 .read = radeon_ttm_vram_read,
996 .llseek = default_llseek
999 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
1001 struct radeon_device *rdev = inode->i_private;
1002 i_size_write(inode, rdev->mc.gtt_size);
1003 filep->private_data = inode->i_private;
1007 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
1008 size_t size, loff_t *pos)
1010 struct radeon_device *rdev = f->private_data;
1015 loff_t p = *pos / PAGE_SIZE;
1016 unsigned off = *pos & ~PAGE_MASK;
1017 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
1021 if (p >= rdev->gart.num_cpu_pages)
1024 page = rdev->gart.pages[p];
1029 r = copy_to_user(buf, ptr, cur_size);
1030 kunmap(rdev->gart.pages[p]);
1032 r = clear_user(buf, cur_size);
1046 static const struct file_operations radeon_ttm_gtt_fops = {
1047 .owner = THIS_MODULE,
1048 .open = radeon_ttm_gtt_open,
1049 .read = radeon_ttm_gtt_read,
1050 .llseek = default_llseek
1055 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1057 #if defined(CONFIG_DEBUG_FS)
1060 struct drm_minor *minor = rdev->ddev->primary;
1061 struct dentry *root = minor->debugfs_root;
1063 rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1065 &radeon_ttm_vram_fops);
1067 rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1068 root, rdev, &radeon_ttm_gtt_fops);
1070 count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1072 #ifdef CONFIG_SWIOTLB
1073 if (!(rdev->need_swiotlb && swiotlb_nr_tbl()))
1077 return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1084 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1086 #if defined(CONFIG_DEBUG_FS)
1088 debugfs_remove(rdev->mman.vram);
1089 rdev->mman.vram = NULL;
1091 debugfs_remove(rdev->mman.gtt);
1092 rdev->mman.gtt = NULL;