2 * Copyright 2011 Red Hat Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
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11 * the following conditions:
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15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
32 * We store the last allocated bo in "hole", we always try to allocate
33 * after the last allocated bo. Principle is that in a linear GPU ring
34 * progression was is after last is the oldest bo we allocated and thus
35 * the first one that should no longer be in use by the GPU.
37 * If it's not the case we skip over the bo after last to the closest
38 * done bo if such one exist. If none exist and we are not asked to
39 * block we report failure to allocate.
41 * If we are asked to block we wait on all the oldest fence of all
42 * rings. We just wait for any of those fence to complete.
47 static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo);
48 static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager);
50 int radeon_sa_bo_manager_init(struct radeon_device *rdev,
51 struct radeon_sa_manager *sa_manager,
52 unsigned size, u32 domain)
56 init_waitqueue_head(&sa_manager->wq);
57 sa_manager->bo = NULL;
58 sa_manager->size = size;
59 sa_manager->domain = domain;
60 sa_manager->hole = &sa_manager->olist;
61 INIT_LIST_HEAD(&sa_manager->olist);
62 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
63 INIT_LIST_HEAD(&sa_manager->flist[i]);
66 r = radeon_bo_create(rdev, size, RADEON_GPU_PAGE_SIZE, true,
67 RADEON_GEM_DOMAIN_CPU, NULL, &sa_manager->bo);
69 dev_err(rdev->dev, "(%d) failed to allocate bo for manager\n", r);
76 void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
77 struct radeon_sa_manager *sa_manager)
79 struct radeon_sa_bo *sa_bo, *tmp;
81 if (!list_empty(&sa_manager->olist)) {
82 sa_manager->hole = &sa_manager->olist,
83 radeon_sa_bo_try_free(sa_manager);
84 if (!list_empty(&sa_manager->olist)) {
85 dev_err(rdev->dev, "sa_manager is not empty, clearing anyway\n");
88 list_for_each_entry_safe(sa_bo, tmp, &sa_manager->olist, olist) {
89 radeon_sa_bo_remove_locked(sa_bo);
91 radeon_bo_unref(&sa_manager->bo);
95 int radeon_sa_bo_manager_start(struct radeon_device *rdev,
96 struct radeon_sa_manager *sa_manager)
100 if (sa_manager->bo == NULL) {
101 dev_err(rdev->dev, "no bo for sa manager\n");
106 r = radeon_bo_reserve(sa_manager->bo, false);
108 dev_err(rdev->dev, "(%d) failed to reserve manager bo\n", r);
111 r = radeon_bo_pin(sa_manager->bo, sa_manager->domain, &sa_manager->gpu_addr);
113 radeon_bo_unreserve(sa_manager->bo);
114 dev_err(rdev->dev, "(%d) failed to pin manager bo\n", r);
117 r = radeon_bo_kmap(sa_manager->bo, &sa_manager->cpu_ptr);
118 radeon_bo_unreserve(sa_manager->bo);
122 int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
123 struct radeon_sa_manager *sa_manager)
127 if (sa_manager->bo == NULL) {
128 dev_err(rdev->dev, "no bo for sa manager\n");
132 r = radeon_bo_reserve(sa_manager->bo, false);
134 radeon_bo_kunmap(sa_manager->bo);
135 radeon_bo_unpin(sa_manager->bo);
136 radeon_bo_unreserve(sa_manager->bo);
141 static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo)
143 struct radeon_sa_manager *sa_manager = sa_bo->manager;
144 if (sa_manager->hole == &sa_bo->olist) {
145 sa_manager->hole = sa_bo->olist.prev;
147 list_del_init(&sa_bo->olist);
148 list_del_init(&sa_bo->flist);
149 radeon_fence_unref(&sa_bo->fence);
153 static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager)
155 struct radeon_sa_bo *sa_bo, *tmp;
157 if (sa_manager->hole->next == &sa_manager->olist)
160 sa_bo = list_entry(sa_manager->hole->next, struct radeon_sa_bo, olist);
161 list_for_each_entry_safe_from(sa_bo, tmp, &sa_manager->olist, olist) {
162 if (sa_bo->fence == NULL || !radeon_fence_signaled(sa_bo->fence)) {
165 radeon_sa_bo_remove_locked(sa_bo);
169 static inline unsigned radeon_sa_bo_hole_soffset(struct radeon_sa_manager *sa_manager)
171 struct list_head *hole = sa_manager->hole;
173 if (hole != &sa_manager->olist) {
174 return list_entry(hole, struct radeon_sa_bo, olist)->eoffset;
179 static inline unsigned radeon_sa_bo_hole_eoffset(struct radeon_sa_manager *sa_manager)
181 struct list_head *hole = sa_manager->hole;
183 if (hole->next != &sa_manager->olist) {
184 return list_entry(hole->next, struct radeon_sa_bo, olist)->soffset;
186 return sa_manager->size;
189 static bool radeon_sa_bo_try_alloc(struct radeon_sa_manager *sa_manager,
190 struct radeon_sa_bo *sa_bo,
191 unsigned size, unsigned align)
193 unsigned soffset, eoffset, wasted;
195 soffset = radeon_sa_bo_hole_soffset(sa_manager);
196 eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
197 wasted = (align - (soffset % align)) % align;
199 if ((eoffset - soffset) >= (size + wasted)) {
202 sa_bo->manager = sa_manager;
203 sa_bo->soffset = soffset;
204 sa_bo->eoffset = soffset + size;
205 list_add(&sa_bo->olist, sa_manager->hole);
206 INIT_LIST_HEAD(&sa_bo->flist);
207 sa_manager->hole = &sa_bo->olist;
214 * radeon_sa_event - Check if we can stop waiting
216 * @sa_manager: pointer to the sa_manager
217 * @size: number of bytes we want to allocate
218 * @align: alignment we need to match
220 * Check if either there is a fence we can wait for or
221 * enough free memory to satisfy the allocation directly
223 static bool radeon_sa_event(struct radeon_sa_manager *sa_manager,
224 unsigned size, unsigned align)
226 unsigned soffset, eoffset, wasted;
229 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
230 if (!list_empty(&sa_manager->flist[i])) {
235 soffset = radeon_sa_bo_hole_soffset(sa_manager);
236 eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
237 wasted = (align - (soffset % align)) % align;
239 if ((eoffset - soffset) >= (size + wasted)) {
246 static bool radeon_sa_bo_next_hole(struct radeon_sa_manager *sa_manager,
247 struct radeon_fence **fences,
250 struct radeon_sa_bo *best_bo = NULL;
251 unsigned i, soffset, best, tmp;
253 /* if hole points to the end of the buffer */
254 if (sa_manager->hole->next == &sa_manager->olist) {
255 /* try again with its beginning */
256 sa_manager->hole = &sa_manager->olist;
260 soffset = radeon_sa_bo_hole_soffset(sa_manager);
261 /* to handle wrap around we add sa_manager->size */
262 best = sa_manager->size * 2;
263 /* go over all fence list and try to find the closest sa_bo
264 * of the current last
266 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
267 struct radeon_sa_bo *sa_bo;
269 if (list_empty(&sa_manager->flist[i])) {
273 sa_bo = list_first_entry(&sa_manager->flist[i],
274 struct radeon_sa_bo, flist);
276 if (!radeon_fence_signaled(sa_bo->fence)) {
277 fences[i] = sa_bo->fence;
281 /* limit the number of tries each ring gets */
286 tmp = sa_bo->soffset;
288 /* wrap around, pretend it's after */
289 tmp += sa_manager->size;
293 /* this sa bo is the closest one */
300 ++tries[best_bo->fence->ring];
301 sa_manager->hole = best_bo->olist.prev;
303 /* we knew that this one is signaled,
304 so it's save to remote it */
305 radeon_sa_bo_remove_locked(best_bo);
311 int radeon_sa_bo_new(struct radeon_device *rdev,
312 struct radeon_sa_manager *sa_manager,
313 struct radeon_sa_bo **sa_bo,
314 unsigned size, unsigned align, bool block)
316 struct radeon_fence *fences[RADEON_NUM_RINGS];
317 unsigned tries[RADEON_NUM_RINGS];
320 BUG_ON(align > RADEON_GPU_PAGE_SIZE);
321 BUG_ON(size > sa_manager->size);
323 *sa_bo = kmalloc(sizeof(struct radeon_sa_bo), GFP_KERNEL);
324 if ((*sa_bo) == NULL) {
327 (*sa_bo)->manager = sa_manager;
328 (*sa_bo)->fence = NULL;
329 INIT_LIST_HEAD(&(*sa_bo)->olist);
330 INIT_LIST_HEAD(&(*sa_bo)->flist);
332 spin_lock(&sa_manager->wq.lock);
334 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
340 radeon_sa_bo_try_free(sa_manager);
342 if (radeon_sa_bo_try_alloc(sa_manager, *sa_bo,
344 spin_unlock(&sa_manager->wq.lock);
348 /* see if we can skip over some allocations */
349 } while (radeon_sa_bo_next_hole(sa_manager, fences, tries));
351 spin_unlock(&sa_manager->wq.lock);
352 r = radeon_fence_wait_any(rdev, fences, false);
353 spin_lock(&sa_manager->wq.lock);
354 /* if we have nothing to wait for block */
355 if (r == -ENOENT && block) {
356 r = wait_event_interruptible_locked(
358 radeon_sa_event(sa_manager, size, align)
361 } else if (r == -ENOENT) {
367 spin_unlock(&sa_manager->wq.lock);
373 void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo **sa_bo,
374 struct radeon_fence *fence)
376 struct radeon_sa_manager *sa_manager;
378 if (sa_bo == NULL || *sa_bo == NULL) {
382 sa_manager = (*sa_bo)->manager;
383 spin_lock(&sa_manager->wq.lock);
384 if (fence && !radeon_fence_signaled(fence)) {
385 (*sa_bo)->fence = radeon_fence_ref(fence);
386 list_add_tail(&(*sa_bo)->flist,
387 &sa_manager->flist[fence->ring]);
389 radeon_sa_bo_remove_locked(*sa_bo);
391 wake_up_all_locked(&sa_manager->wq);
392 spin_unlock(&sa_manager->wq.lock);
396 #if defined(CONFIG_DEBUG_FS)
397 void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
400 struct radeon_sa_bo *i;
402 spin_lock(&sa_manager->wq.lock);
403 list_for_each_entry(i, &sa_manager->olist, olist) {
404 if (&i->olist == sa_manager->hole) {
409 seq_printf(m, "[0x%08x 0x%08x] size %8d",
410 i->soffset, i->eoffset, i->eoffset - i->soffset);
412 seq_printf(m, " protected by 0x%016llx on ring %d",
413 i->fence->seq, i->fence->ring);
417 spin_unlock(&sa_manager->wq.lock);