2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
33 #include <drm/display/drm_dp_helper.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_edid.h>
36 #include <drm/drm_encoder.h>
37 #include <drm/drm_fixed.h>
38 #include <drm/drm_crtc_helper.h>
39 #include <linux/i2c.h>
40 #include <linux/i2c-algo-bit.h>
45 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
46 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
47 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
49 #define RADEON_MAX_HPD_PINS 7
50 #define RADEON_MAX_CRTCS 6
51 #define RADEON_MAX_AFMT_BLOCKS 7
53 enum radeon_rmx_type {
72 enum radeon_underscan_type {
85 RADEON_HPD_NONE = 0xff,
88 enum radeon_output_csc {
89 RADEON_OUTPUT_CSC_BYPASS = 0,
90 RADEON_OUTPUT_CSC_TVRGB = 1,
91 RADEON_OUTPUT_CSC_YCBCR601 = 2,
92 RADEON_OUTPUT_CSC_YCBCR709 = 3,
95 #define RADEON_MAX_I2C_BUS 16
97 /* radeon gpio-based i2c
98 * 1. "mask" reg and bits
99 * grabs the gpio pins for software use
101 * 2. "a" reg and bits
104 * 3. "en" reg and bits
105 * sets the pin direction
107 * 4. "y" reg and bits
111 struct radeon_i2c_bus_rec {
113 /* id used by atom */
115 /* id used by atom */
116 enum radeon_hpd_id hpd;
117 /* can be used with hw i2c engine */
119 /* uses multi-media i2c engine */
122 uint32_t mask_clk_reg;
123 uint32_t mask_data_reg;
127 uint32_t en_data_reg;
130 uint32_t mask_clk_mask;
131 uint32_t mask_data_mask;
133 uint32_t a_data_mask;
134 uint32_t en_clk_mask;
135 uint32_t en_data_mask;
137 uint32_t y_data_mask;
140 struct radeon_tmds_pll {
145 #define RADEON_MAX_BIOS_CONNECTOR 16
148 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
149 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
150 #define RADEON_PLL_USE_REF_DIV (1 << 2)
151 #define RADEON_PLL_LEGACY (1 << 3)
152 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
153 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
154 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
155 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
156 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
157 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
158 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
159 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
160 #define RADEON_PLL_USE_POST_DIV (1 << 12)
161 #define RADEON_PLL_IS_LCD (1 << 13)
162 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
165 /* reference frequency */
166 uint32_t reference_freq;
169 uint32_t reference_div;
172 /* pll in/out limits */
175 uint32_t pll_out_min;
176 uint32_t pll_out_max;
177 uint32_t lcd_pll_out_min;
178 uint32_t lcd_pll_out_max;
182 uint32_t min_ref_div;
183 uint32_t max_ref_div;
184 uint32_t min_post_div;
185 uint32_t max_post_div;
186 uint32_t min_feedback_div;
187 uint32_t max_feedback_div;
188 uint32_t min_frac_feedback_div;
189 uint32_t max_frac_feedback_div;
191 /* flags for the current clock */
198 struct radeon_i2c_chan {
199 struct i2c_adapter adapter;
200 struct drm_device *dev;
201 struct i2c_algo_bit_data bit;
202 struct radeon_i2c_bus_rec rec;
203 struct drm_dp_aux aux;
208 /* mostly for macs, but really any system without connector tables */
209 enum radeon_connector_table {
213 CT_POWERBOOK_EXTERNAL,
214 CT_POWERBOOK_INTERNAL,
227 enum radeon_dvo_chip {
237 bool last_buffer_filled_status;
241 struct radeon_mode_info {
242 struct atom_context *atom_context;
243 struct card_info *atom_card_info;
244 enum radeon_connector_table connector_table;
245 bool mode_config_initialized;
246 struct radeon_crtc *crtcs[RADEON_MAX_CRTCS];
247 struct radeon_afmt *afmt[RADEON_MAX_AFMT_BLOCKS];
248 /* DVI-I properties */
249 struct drm_property *coherent_mode_property;
250 /* DAC enable load detect */
251 struct drm_property *load_detect_property;
253 struct drm_property *tv_std_property;
254 /* legacy TMDS PLL detect */
255 struct drm_property *tmds_pll_property;
257 struct drm_property *underscan_property;
258 struct drm_property *underscan_hborder_property;
259 struct drm_property *underscan_vborder_property;
261 struct drm_property *audio_property;
263 struct drm_property *dither_property;
265 struct drm_property *output_csc_property;
266 /* hardcoded DFP edid from BIOS */
267 struct edid *bios_hardcoded_edid;
268 int bios_hardcoded_edid_size;
270 /* pointer to fbdev info structure */
271 struct radeon_fbdev *rfbdev;
274 /* pointer to backlight encoder */
275 struct radeon_encoder *bl_encoder;
277 /* bitmask for active encoder frontends */
278 uint32_t active_encoders;
281 #define RADEON_MAX_BL_LEVEL 0xFF
283 struct radeon_backlight_privdata {
284 struct radeon_encoder *encoder;
288 #define MAX_H_CODE_TIMING_LEN 32
289 #define MAX_V_CODE_TIMING_LEN 32
291 /* need to store these as reading
292 back code tables is excessive */
293 struct radeon_tv_regs {
295 uint32_t timing_cntl;
299 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
300 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
303 struct radeon_atom_ss {
305 uint16_t percentage_divider;
316 enum radeon_flip_status {
319 RADEON_FLIP_SUBMITTED
323 struct drm_crtc base;
327 bool cursor_out_of_bounds;
328 uint32_t crtc_offset;
329 struct drm_gem_object *cursor_bo;
330 uint64_t cursor_addr;
337 int max_cursor_width;
338 int max_cursor_height;
339 uint32_t legacy_display_base_addr;
340 enum radeon_rmx_type rmx_type;
345 struct drm_display_mode native_mode;
348 struct workqueue_struct *flip_queue;
349 struct radeon_flip_work *flip_work;
350 enum radeon_flip_status flip_status;
352 struct radeon_atom_ss ss;
356 u32 pll_reference_div;
359 struct drm_encoder *encoder;
360 struct drm_connector *connector;
365 u32 lb_vblank_lead_lines;
366 struct drm_display_mode hw_mode;
367 enum radeon_output_csc output_csc;
370 struct radeon_encoder_primary_dac {
371 /* legacy primary dac */
372 uint32_t ps2_pdac_adj;
375 struct radeon_encoder_lvds {
377 uint16_t panel_vcc_delay;
378 uint8_t panel_pwr_delay;
379 uint8_t panel_digon_delay;
380 uint8_t panel_blon_delay;
381 uint16_t panel_ref_divider;
382 uint8_t panel_post_divider;
383 uint16_t panel_fb_divider;
384 bool use_bios_dividers;
385 uint32_t lvds_gen_cntl;
387 struct drm_display_mode native_mode;
388 struct backlight_device *bl_dev;
390 uint8_t backlight_level;
393 struct radeon_encoder_tv_dac {
395 uint32_t ps2_tvdac_adj;
396 uint32_t ntsc_tvdac_adj;
397 uint32_t pal_tvdac_adj;
402 int supported_tv_stds;
404 enum radeon_tv_std tv_std;
405 struct radeon_tv_regs tv;
408 struct radeon_encoder_int_tmds {
409 /* legacy int tmds */
410 struct radeon_tmds_pll tmds_pll[4];
413 struct radeon_encoder_ext_tmds {
415 struct radeon_i2c_chan *i2c_bus;
417 enum radeon_dvo_chip dvo_chip;
420 /* spread spectrum */
421 struct radeon_encoder_atom_dig {
425 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
428 uint16_t panel_pwr_delay;
431 struct drm_display_mode native_mode;
432 struct backlight_device *bl_dev;
434 uint8_t backlight_level;
436 struct radeon_afmt *afmt;
437 struct r600_audio_pin *pin;
440 struct radeon_encoder_atom_dac {
441 enum radeon_tv_std tv_std;
444 struct radeon_encoder {
445 struct drm_encoder base;
446 uint32_t encoder_enum;
449 uint32_t active_device;
451 uint32_t pixel_clock;
452 enum radeon_rmx_type rmx_type;
453 enum radeon_underscan_type underscan_type;
454 uint32_t underscan_hborder;
455 uint32_t underscan_vborder;
456 struct drm_display_mode native_mode;
458 int audio_polling_active;
461 struct radeon_audio_funcs *audio;
462 enum radeon_output_csc output_csc;
467 struct radeon_connector_atom_dig {
468 uint32_t igp_lane_info;
470 u8 dpcd[DP_RECEIVER_CAP_SIZE];
477 struct radeon_gpio_rec {
486 enum radeon_hpd_id hpd;
488 struct radeon_gpio_rec gpio;
491 struct radeon_router {
493 struct radeon_i2c_bus_rec i2c_info;
498 u8 ddc_mux_control_pin;
503 u8 cd_mux_control_pin;
507 enum radeon_connector_audio {
508 RADEON_AUDIO_DISABLE = 0,
509 RADEON_AUDIO_ENABLE = 1,
510 RADEON_AUDIO_AUTO = 2
513 enum radeon_connector_dither {
514 RADEON_FMT_DITHER_DISABLE = 0,
515 RADEON_FMT_DITHER_ENABLE = 1,
518 struct radeon_connector {
519 struct drm_connector base;
520 uint32_t connector_id;
522 struct radeon_i2c_chan *ddc_bus;
523 /* some systems have an hdmi and vga port with a shared ddc line */
526 /* we need to mind the EDID between detect
527 and get modes due to analog/digital/tvencoder */
530 bool dac_load_detect;
531 bool detected_by_load; /* if the connection status was determined by load */
532 bool detected_hpd_without_ddc; /* if an HPD signal was detected on DVI, but ddc probing failed */
533 uint16_t connector_object_id;
534 struct radeon_hpd hpd;
535 struct radeon_router router;
536 struct radeon_i2c_chan *router_bus;
537 enum radeon_connector_audio audio;
538 enum radeon_connector_dither dither;
539 int pixelclock_for_modeset;
542 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
543 ((em) == ATOM_ENCODER_MODE_DP_MST))
545 struct atom_clock_dividers {
551 u32 whole_fb_div : 12;
552 u32 frac_fb_div : 14;
554 u32 frac_fb_div : 14;
555 u32 whole_fb_div : 12;
562 bool enable_post_div;
571 struct atom_mpll_param {
595 #define MEM_TYPE_GDDR5 0x50
596 #define MEM_TYPE_GDDR4 0x40
597 #define MEM_TYPE_GDDR3 0x30
598 #define MEM_TYPE_DDR2 0x20
599 #define MEM_TYPE_GDDR1 0x10
600 #define MEM_TYPE_DDR3 0xb0
601 #define MEM_TYPE_MASK 0xf0
603 struct atom_memory_info {
608 #define MAX_AC_TIMING_ENTRIES 16
610 struct atom_memory_clock_range_table
614 u32 mclk[MAX_AC_TIMING_ENTRIES];
617 #define VBIOS_MC_REGISTER_ARRAY_SIZE 32
618 #define VBIOS_MAX_AC_TIMING_ENTRIES 20
620 struct atom_mc_reg_entry {
622 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE];
625 struct atom_mc_register_address {
630 struct atom_mc_reg_table {
633 struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
634 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];
637 #define MAX_VOLTAGE_ENTRIES 32
639 struct atom_voltage_table_entry
645 struct atom_voltage_table
650 struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES];
653 /* Driver internal use only flags of radeon_get_crtc_scanoutpos() */
654 #define DRM_SCANOUTPOS_VALID (1 << 0)
655 #define DRM_SCANOUTPOS_IN_VBLANK (1 << 1)
656 #define DRM_SCANOUTPOS_ACCURATE (1 << 2)
657 #define USE_REAL_VBLANKSTART (1 << 30)
658 #define GET_DISTANCE_TO_VBLANKSTART (1 << 31)
661 radeon_add_atom_connector(struct drm_device *dev,
662 uint32_t connector_id,
663 uint32_t supported_device,
665 struct radeon_i2c_bus_rec *i2c_bus,
666 uint32_t igp_lane_info,
667 uint16_t connector_object_id,
668 struct radeon_hpd *hpd,
669 struct radeon_router *router);
671 radeon_add_legacy_connector(struct drm_device *dev,
672 uint32_t connector_id,
673 uint32_t supported_device,
675 struct radeon_i2c_bus_rec *i2c_bus,
676 uint16_t connector_object_id,
677 struct radeon_hpd *hpd);
679 radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device,
681 extern void radeon_link_encoder_connector(struct drm_device *dev);
683 extern enum radeon_tv_std
684 radeon_combios_get_tv_info(struct radeon_device *rdev);
685 extern enum radeon_tv_std
686 radeon_atombios_get_tv_info(struct radeon_device *rdev);
687 extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev,
688 u16 *vddc, u16 *vddci, u16 *mvdd);
691 radeon_combios_connected_scratch_regs(struct drm_connector *connector,
692 struct drm_encoder *encoder,
695 radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
696 struct drm_encoder *encoder,
699 extern struct drm_connector *
700 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
701 extern struct drm_connector *
702 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
703 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
706 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
707 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
708 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
709 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
711 extern struct edid *radeon_connector_edid(struct drm_connector *connector);
713 extern void radeon_connector_hotplug(struct drm_connector *connector);
714 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
715 struct drm_display_mode *mode);
716 extern void radeon_dp_set_link_config(struct drm_connector *connector,
717 const struct drm_display_mode *mode);
718 extern void radeon_dp_link_train(struct drm_encoder *encoder,
719 struct drm_connector *connector);
720 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
721 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
722 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
723 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
724 struct drm_connector *connector);
725 extern void radeon_dp_set_rx_power_state(struct drm_connector *connector,
727 extern void radeon_dp_aux_init(struct radeon_connector *radeon_connector);
729 radeon_dp_aux_transfer_native(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg);
731 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
732 extern void atombios_dig_encoder_setup2(struct drm_encoder *encoder, int action, int panel_mode, int enc_override);
733 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
734 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
735 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
736 int action, uint8_t lane_num,
738 extern void atombios_dig_transmitter_setup2(struct drm_encoder *encoder,
739 int action, uint8_t lane_num,
740 uint8_t lane_set, int fe);
741 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
742 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
743 void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
745 extern void radeon_i2c_init(struct radeon_device *rdev);
746 extern void radeon_i2c_fini(struct radeon_device *rdev);
747 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
748 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
749 extern void radeon_i2c_add(struct radeon_device *rdev,
750 struct radeon_i2c_bus_rec *rec,
752 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
753 struct radeon_i2c_bus_rec *i2c_bus);
754 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
755 struct radeon_i2c_bus_rec *rec,
757 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
758 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
762 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
766 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
767 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
768 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
770 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
771 struct radeon_atom_ss *ss,
773 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
774 struct radeon_atom_ss *ss,
776 extern struct radeon_gpio_rec radeon_atombios_lookup_gpio(struct radeon_device *rdev,
779 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
781 uint32_t *dot_clock_p,
783 uint32_t *frac_fb_div_p,
785 uint32_t *post_div_p);
787 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
795 extern void radeon_setup_encoder_clones(struct drm_device *dev);
797 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
798 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
799 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
800 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
801 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
802 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
803 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
804 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
805 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
806 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
807 extern bool radeon_encoder_is_digital(struct drm_encoder *encoder);
809 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
810 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
811 struct drm_framebuffer *old_fb);
812 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
813 struct drm_framebuffer *fb,
815 enum mode_set_atomic state);
816 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
817 struct drm_display_mode *mode,
818 struct drm_display_mode *adjusted_mode,
820 struct drm_framebuffer *old_fb);
821 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
823 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
824 struct drm_framebuffer *old_fb);
825 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
826 struct drm_framebuffer *fb,
828 enum mode_set_atomic state);
829 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
830 struct drm_framebuffer *fb,
831 int x, int y, int atomic);
832 extern int radeon_crtc_cursor_set2(struct drm_crtc *crtc,
833 struct drm_file *file_priv,
839 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
841 extern void radeon_cursor_reset(struct drm_crtc *crtc);
843 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe,
844 unsigned int flags, int *vpos, int *hpos,
845 ktime_t *stime, ktime_t *etime,
846 const struct drm_display_mode *mode);
849 radeon_get_crtc_scanout_position(struct drm_crtc *crtc, bool in_vblank_irq,
850 int *vpos, int *hpos,
851 ktime_t *stime, ktime_t *etime,
852 const struct drm_display_mode *mode);
854 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
856 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
857 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
858 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
859 extern struct radeon_encoder_atom_dig *
860 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
861 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
862 struct radeon_encoder_int_tmds *tmds);
863 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
864 struct radeon_encoder_int_tmds *tmds);
865 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
866 struct radeon_encoder_int_tmds *tmds);
867 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
868 struct radeon_encoder_ext_tmds *tmds);
869 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
870 struct radeon_encoder_ext_tmds *tmds);
871 extern struct radeon_encoder_primary_dac *
872 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
873 extern struct radeon_encoder_tv_dac *
874 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
875 extern struct radeon_encoder_lvds *
876 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
877 extern struct radeon_encoder_tv_dac *
878 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
879 extern struct radeon_encoder_primary_dac *
880 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
881 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
882 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
883 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
884 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
885 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
886 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
887 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
888 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
890 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
892 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
894 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
896 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
897 int radeon_framebuffer_init(struct drm_device *dev,
898 struct drm_framebuffer *rfb,
899 const struct drm_mode_fb_cmd2 *mode_cmd,
900 struct drm_gem_object *obj);
902 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
903 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
904 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
905 void radeon_atombios_init_crtc(struct drm_device *dev,
906 struct radeon_crtc *radeon_crtc);
907 void radeon_legacy_init_crtc(struct drm_device *dev,
908 struct radeon_crtc *radeon_crtc);
910 void radeon_get_clock_info(struct drm_device *dev);
912 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
913 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
915 void radeon_enc_destroy(struct drm_encoder *encoder);
916 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
917 void radeon_combios_asic_init(struct drm_device *dev);
918 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
919 const struct drm_display_mode *mode,
920 struct drm_display_mode *adjusted_mode);
921 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
922 struct drm_display_mode *adjusted_mode);
923 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
926 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
927 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
928 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
929 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
930 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
931 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
932 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
933 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
934 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
935 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
936 struct drm_display_mode *mode,
937 struct drm_display_mode *adjusted_mode);
940 void avivo_program_fmt(struct drm_encoder *encoder);
941 void dce3_program_fmt(struct drm_encoder *encoder);
942 void dce4_program_fmt(struct drm_encoder *encoder);
943 void dce8_program_fmt(struct drm_encoder *encoder);
946 int radeon_fbdev_init(struct radeon_device *rdev);
947 void radeon_fbdev_fini(struct radeon_device *rdev);
948 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
949 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
951 void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id);
953 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
955 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
957 int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder, int fe_idx);
958 void radeon_atom_release_dig_encoder(struct radeon_device *rdev, int enc_idx);