2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
36 #include <drm_dp_helper.h>
37 #include <drm_fixed.h>
38 #include <drm_crtc_helper.h>
39 #include <linux/i2c.h>
40 #include <linux/i2c-algo-bit.h>
45 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
46 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
47 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
48 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
50 enum radeon_rmx_type {
69 enum radeon_underscan_type {
82 RADEON_HPD_NONE = 0xff,
85 #define RADEON_MAX_I2C_BUS 16
87 /* radeon gpio-based i2c
88 * 1. "mask" reg and bits
89 * grabs the gpio pins for software use
94 * 3. "en" reg and bits
95 * sets the pin direction
101 struct radeon_i2c_bus_rec {
103 /* id used by atom */
105 /* id used by atom */
106 enum radeon_hpd_id hpd;
107 /* can be used with hw i2c engine */
109 /* uses multi-media i2c engine */
112 uint32_t mask_clk_reg;
113 uint32_t mask_data_reg;
117 uint32_t en_data_reg;
120 uint32_t mask_clk_mask;
121 uint32_t mask_data_mask;
123 uint32_t a_data_mask;
124 uint32_t en_clk_mask;
125 uint32_t en_data_mask;
127 uint32_t y_data_mask;
130 struct radeon_tmds_pll {
135 #define RADEON_MAX_BIOS_CONNECTOR 16
138 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
139 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
140 #define RADEON_PLL_USE_REF_DIV (1 << 2)
141 #define RADEON_PLL_LEGACY (1 << 3)
142 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
143 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
144 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
145 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
146 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
147 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
148 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
149 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
150 #define RADEON_PLL_USE_POST_DIV (1 << 12)
151 #define RADEON_PLL_IS_LCD (1 << 13)
152 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
155 /* reference frequency */
156 uint32_t reference_freq;
159 uint32_t reference_div;
162 /* pll in/out limits */
165 uint32_t pll_out_min;
166 uint32_t pll_out_max;
167 uint32_t lcd_pll_out_min;
168 uint32_t lcd_pll_out_max;
172 uint32_t min_ref_div;
173 uint32_t max_ref_div;
174 uint32_t min_post_div;
175 uint32_t max_post_div;
176 uint32_t min_feedback_div;
177 uint32_t max_feedback_div;
178 uint32_t min_frac_feedback_div;
179 uint32_t max_frac_feedback_div;
181 /* flags for the current clock */
188 struct radeon_i2c_chan {
189 struct i2c_adapter adapter;
190 struct drm_device *dev;
192 struct i2c_algo_bit_data bit;
193 struct i2c_algo_dp_aux_data dp;
195 struct radeon_i2c_bus_rec rec;
198 /* mostly for macs, but really any system without connector tables */
199 enum radeon_connector_table {
203 CT_POWERBOOK_EXTERNAL,
204 CT_POWERBOOK_INTERNAL,
216 enum radeon_dvo_chip {
226 bool last_buffer_filled_status;
230 struct radeon_mode_info {
231 struct atom_context *atom_context;
232 struct card_info *atom_card_info;
233 enum radeon_connector_table connector_table;
234 bool mode_config_initialized;
235 struct radeon_crtc *crtcs[6];
236 struct radeon_afmt *afmt[6];
237 /* DVI-I properties */
238 struct drm_property *coherent_mode_property;
239 /* DAC enable load detect */
240 struct drm_property *load_detect_property;
242 struct drm_property *tv_std_property;
243 /* legacy TMDS PLL detect */
244 struct drm_property *tmds_pll_property;
246 struct drm_property *underscan_property;
247 struct drm_property *underscan_hborder_property;
248 struct drm_property *underscan_vborder_property;
249 /* hardcoded DFP edid from BIOS */
250 struct edid *bios_hardcoded_edid;
251 int bios_hardcoded_edid_size;
253 /* pointer to fbdev info structure */
254 struct radeon_fbdev *rfbdev;
259 #define MAX_H_CODE_TIMING_LEN 32
260 #define MAX_V_CODE_TIMING_LEN 32
262 /* need to store these as reading
263 back code tables is excessive */
264 struct radeon_tv_regs {
266 uint32_t timing_cntl;
270 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
271 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
275 struct drm_crtc base;
277 u16 lut_r[256], lut_g[256], lut_b[256];
281 uint32_t crtc_offset;
282 struct drm_gem_object *cursor_bo;
283 uint64_t cursor_addr;
286 uint32_t legacy_display_base_addr;
287 uint32_t legacy_cursor_offset;
288 enum radeon_rmx_type rmx_type;
293 struct drm_display_mode native_mode;
296 struct radeon_unpin_work *unpin_work;
297 int deferred_flip_completion;
300 struct radeon_encoder_primary_dac {
301 /* legacy primary dac */
302 uint32_t ps2_pdac_adj;
305 struct radeon_encoder_lvds {
307 uint16_t panel_vcc_delay;
308 uint8_t panel_pwr_delay;
309 uint8_t panel_digon_delay;
310 uint8_t panel_blon_delay;
311 uint16_t panel_ref_divider;
312 uint8_t panel_post_divider;
313 uint16_t panel_fb_divider;
314 bool use_bios_dividers;
315 uint32_t lvds_gen_cntl;
317 struct drm_display_mode native_mode;
318 struct backlight_device *bl_dev;
320 uint8_t backlight_level;
323 struct radeon_encoder_tv_dac {
325 uint32_t ps2_tvdac_adj;
326 uint32_t ntsc_tvdac_adj;
327 uint32_t pal_tvdac_adj;
332 int supported_tv_stds;
334 enum radeon_tv_std tv_std;
335 struct radeon_tv_regs tv;
338 struct radeon_encoder_int_tmds {
339 /* legacy int tmds */
340 struct radeon_tmds_pll tmds_pll[4];
343 struct radeon_encoder_ext_tmds {
345 struct radeon_i2c_chan *i2c_bus;
347 enum radeon_dvo_chip dvo_chip;
350 /* spread spectrum */
351 struct radeon_atom_ss {
363 struct radeon_encoder_atom_dig {
367 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
370 uint16_t panel_pwr_delay;
373 struct drm_display_mode native_mode;
374 struct backlight_device *bl_dev;
376 uint8_t backlight_level;
378 struct radeon_afmt *afmt;
381 struct radeon_encoder_atom_dac {
382 enum radeon_tv_std tv_std;
385 struct radeon_encoder {
386 struct drm_encoder base;
387 uint32_t encoder_enum;
390 uint32_t active_device;
392 uint32_t pixel_clock;
393 enum radeon_rmx_type rmx_type;
394 enum radeon_underscan_type underscan_type;
395 uint32_t underscan_hborder;
396 uint32_t underscan_vborder;
397 struct drm_display_mode native_mode;
399 int audio_polling_active;
404 struct radeon_connector_atom_dig {
405 uint32_t igp_lane_info;
407 struct radeon_i2c_chan *dp_i2c_bus;
415 struct radeon_gpio_rec {
423 enum radeon_hpd_id hpd;
425 struct radeon_gpio_rec gpio;
428 struct radeon_router {
430 struct radeon_i2c_bus_rec i2c_info;
435 u8 ddc_mux_control_pin;
440 u8 cd_mux_control_pin;
444 struct radeon_connector {
445 struct drm_connector base;
446 uint32_t connector_id;
448 struct radeon_i2c_chan *ddc_bus;
449 /* some systems have an hdmi and vga port with a shared ddc line */
452 /* we need to mind the EDID between detect
453 and get modes due to analog/digital/tvencoder */
456 bool dac_load_detect;
457 bool detected_by_load; /* if the connection status was determined by load */
458 uint16_t connector_object_id;
459 struct radeon_hpd hpd;
460 struct radeon_router router;
461 struct radeon_i2c_chan *router_bus;
464 struct radeon_framebuffer {
465 struct drm_framebuffer base;
466 struct drm_gem_object *obj;
469 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
470 ((em) == ATOM_ENCODER_MODE_DP_MST))
472 extern enum radeon_tv_std
473 radeon_combios_get_tv_info(struct radeon_device *rdev);
474 extern enum radeon_tv_std
475 radeon_atombios_get_tv_info(struct radeon_device *rdev);
477 extern struct drm_connector *
478 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
479 extern struct drm_connector *
480 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
481 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
484 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
485 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
486 extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
487 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
488 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
490 extern void radeon_connector_hotplug(struct drm_connector *connector);
491 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
492 struct drm_display_mode *mode);
493 extern void radeon_dp_set_link_config(struct drm_connector *connector,
494 const struct drm_display_mode *mode);
495 extern void radeon_dp_link_train(struct drm_encoder *encoder,
496 struct drm_connector *connector);
497 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
498 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
499 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
500 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
501 struct drm_connector *connector);
502 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
503 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
504 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
505 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
506 int action, uint8_t lane_num,
508 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
509 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
510 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
511 u8 write_byte, u8 *read_byte);
513 extern void radeon_i2c_init(struct radeon_device *rdev);
514 extern void radeon_i2c_fini(struct radeon_device *rdev);
515 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
516 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
517 extern void radeon_i2c_add(struct radeon_device *rdev,
518 struct radeon_i2c_bus_rec *rec,
520 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
521 struct radeon_i2c_bus_rec *i2c_bus);
522 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
523 struct radeon_i2c_bus_rec *rec,
525 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
526 struct radeon_i2c_bus_rec *rec,
528 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
529 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
533 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
537 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
538 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
539 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
540 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
542 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
544 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
545 struct radeon_atom_ss *ss,
547 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
548 struct radeon_atom_ss *ss,
551 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
553 uint32_t *dot_clock_p,
555 uint32_t *frac_fb_div_p,
557 uint32_t *post_div_p);
559 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
567 extern void radeon_setup_encoder_clones(struct drm_device *dev);
569 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
570 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
571 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
572 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
573 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
574 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
575 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
576 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
577 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
578 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
580 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
581 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
582 struct drm_framebuffer *old_fb);
583 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
584 struct drm_framebuffer *fb,
586 enum mode_set_atomic state);
587 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
588 struct drm_display_mode *mode,
589 struct drm_display_mode *adjusted_mode,
591 struct drm_framebuffer *old_fb);
592 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
594 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
595 struct drm_framebuffer *old_fb);
596 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
597 struct drm_framebuffer *fb,
599 enum mode_set_atomic state);
600 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
601 struct drm_framebuffer *fb,
602 int x, int y, int atomic);
603 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
604 struct drm_file *file_priv,
608 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
611 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
612 int *vpos, int *hpos);
614 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
616 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
617 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
618 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
619 extern struct radeon_encoder_atom_dig *
620 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
621 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
622 struct radeon_encoder_int_tmds *tmds);
623 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
624 struct radeon_encoder_int_tmds *tmds);
625 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
626 struct radeon_encoder_int_tmds *tmds);
627 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
628 struct radeon_encoder_ext_tmds *tmds);
629 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
630 struct radeon_encoder_ext_tmds *tmds);
631 extern struct radeon_encoder_primary_dac *
632 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
633 extern struct radeon_encoder_tv_dac *
634 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
635 extern struct radeon_encoder_lvds *
636 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
637 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
638 extern struct radeon_encoder_tv_dac *
639 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
640 extern struct radeon_encoder_primary_dac *
641 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
642 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
643 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
644 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
645 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
646 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
647 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
648 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
649 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
651 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
653 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
655 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
657 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
658 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
659 u16 blue, int regno);
660 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
661 u16 *blue, int regno);
662 int radeon_framebuffer_init(struct drm_device *dev,
663 struct radeon_framebuffer *rfb,
664 struct drm_mode_fb_cmd2 *mode_cmd,
665 struct drm_gem_object *obj);
667 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
668 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
669 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
670 void radeon_atombios_init_crtc(struct drm_device *dev,
671 struct radeon_crtc *radeon_crtc);
672 void radeon_legacy_init_crtc(struct drm_device *dev,
673 struct radeon_crtc *radeon_crtc);
675 void radeon_get_clock_info(struct drm_device *dev);
677 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
678 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
680 void radeon_enc_destroy(struct drm_encoder *encoder);
681 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
682 void radeon_combios_asic_init(struct drm_device *dev);
683 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
684 const struct drm_display_mode *mode,
685 struct drm_display_mode *adjusted_mode);
686 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
687 struct drm_display_mode *adjusted_mode);
688 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
691 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
692 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
693 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
694 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
695 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
696 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
697 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
698 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
699 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
700 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
701 struct drm_display_mode *mode,
702 struct drm_display_mode *adjusted_mode);
705 int radeon_fbdev_init(struct radeon_device *rdev);
706 void radeon_fbdev_fini(struct radeon_device *rdev);
707 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
708 int radeon_fbdev_total_size(struct radeon_device *rdev);
709 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
711 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
713 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
715 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);