drivers/gpu/drm/radeon/radeon_encoders.c

   1 /*
   2  * Copyright 2007-8 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors: Dave Airlie
  24  *          Alex Deucher
  25  */
  26
  27 #include <linux/pci.h>
  28
  29 #include <drm/drm_crtc_helper.h>
  30 #include <drm/drm_device.h>
  31 #include <drm/radeon_drm.h>
  32
  33 #include <acpi/video.h>
  34
  35 #include "radeon.h"
  36 #include "radeon_atombios.h"
  37 #include "radeon_legacy_encoders.h"
  38 #include "atom.h"
  39
  40 static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
  41 {
  42         struct drm_device *dev = encoder->dev;
  43         struct radeon_device *rdev = dev->dev_private;
  44         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  45         struct drm_encoder *clone_encoder;
  46         uint32_t index_mask = 0;
  47         int count;
  48
  49         /* DIG routing gets problematic */
  50         if (rdev->family >= CHIP_R600)
  51                 return index_mask;
  52         /* LVDS/TV are too wacky */
  53         if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT)
  54                 return index_mask;
  55         /* DVO requires 2x ppll clocks depending on tmds chip */
  56         if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT)
  57                 return index_mask;
  58
  59         count = -1;
  60         list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
  61                 struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder);
  62                 count++;
  63
  64                 if (clone_encoder == encoder)
  65                         continue;
  66                 if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT))
  67                         continue;
  68                 if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT)
  69                         continue;
  70                 else
  71                         index_mask |= (1 << count);
  72         }
  73         return index_mask;
  74 }
  75
  76 void radeon_setup_encoder_clones(struct drm_device *dev)
  77 {
  78         struct drm_encoder *encoder;
  79
  80         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
  81                 encoder->possible_clones = radeon_encoder_clones(encoder);
  82         }
  83 }
  84
  85 uint32_t
  86 radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
  87 {
  88         struct radeon_device *rdev = dev->dev_private;
  89         uint32_t ret = 0;
  90
  91         switch (supported_device) {
  92         case ATOM_DEVICE_CRT1_SUPPORT:
  93         case ATOM_DEVICE_TV1_SUPPORT:
  94         case ATOM_DEVICE_TV2_SUPPORT:
  95         case ATOM_DEVICE_CRT2_SUPPORT:
  96         case ATOM_DEVICE_CV_SUPPORT:
  97                 switch (dac) {
  98                 case 1: /* dac a */
  99                         if ((rdev->family == CHIP_RS300) ||
 100                             (rdev->family == CHIP_RS400) ||
 101                             (rdev->family == CHIP_RS480))
 102                                 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
 103                         else if (ASIC_IS_AVIVO(rdev))
 104                                 ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1;
 105                         else
 106                                 ret = ENCODER_INTERNAL_DAC1_ENUM_ID1;
 107                         break;
 108                 case 2: /* dac b */
 109                         if (ASIC_IS_AVIVO(rdev))
 110                                 ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
 111                         else {
 112                                 /*if (rdev->family == CHIP_R200)
 113                                   ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
 114                                   else*/
 115                                 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
 116                         }
 117                         break;
 118                 case 3: /* external dac */
 119                         if (ASIC_IS_AVIVO(rdev))
 120                                 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
 121                         else
 122                                 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
 123                         break;
 124                 }
 125                 break;
 126         case ATOM_DEVICE_LCD1_SUPPORT:
 127                 if (ASIC_IS_AVIVO(rdev))
 128                         ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
 129                 else
 130                         ret = ENCODER_INTERNAL_LVDS_ENUM_ID1;
 131                 break;
 132         case ATOM_DEVICE_DFP1_SUPPORT:
 133                 if ((rdev->family == CHIP_RS300) ||
 134                     (rdev->family == CHIP_RS400) ||
 135                     (rdev->family == CHIP_RS480))
 136                         ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
 137                 else if (ASIC_IS_AVIVO(rdev))
 138                         ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1;
 139                 else
 140                         ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1;
 141                 break;
 142         case ATOM_DEVICE_LCD2_SUPPORT:
 143         case ATOM_DEVICE_DFP2_SUPPORT:
 144                 if ((rdev->family == CHIP_RS600) ||
 145                     (rdev->family == CHIP_RS690) ||
 146                     (rdev->family == CHIP_RS740))
 147                         ret = ENCODER_INTERNAL_DDI_ENUM_ID1;
 148                 else if (ASIC_IS_AVIVO(rdev))
 149                         ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
 150                 else
 151                         ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
 152                 break;
 153         case ATOM_DEVICE_DFP3_SUPPORT:
 154                 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
 155                 break;
 156         }
 157
 158         return ret;
 159 }
 160
 161 static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder,
 162                                          struct drm_connector *connector)
 163 {
 164         struct drm_device *dev = radeon_encoder->base.dev;
 165         struct radeon_device *rdev = dev->dev_private;
 166         bool use_bl = false;
 167
 168         if (!(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)))
 169                 return;
 170
 171         if (radeon_backlight == 0) {
 172                 use_bl = false;
 173         } else if (radeon_backlight == 1) {
 174                 use_bl = true;
 175         } else if (radeon_backlight == -1) {
 176                 /* Quirks */
 177                 /* Amilo Xi 2550 only works with acpi bl */
 178                 if ((rdev->pdev->device == 0x9583) &&
 179                     (rdev->pdev->subsystem_vendor == 0x1734) &&
 180                     (rdev->pdev->subsystem_device == 0x1107))
 181                         use_bl = false;
 182 /* Older PPC macs use on-GPU backlight controller */
 183 #ifndef CONFIG_PPC_PMAC
 184                 /* disable native backlight control on older asics */
 185                 else if (rdev->family < CHIP_R600)
 186                         use_bl = false;
 187 #endif
 188                 else
 189                         use_bl = true;
 190         }
 191
 192         if (use_bl) {
 193                 if (rdev->is_atom_bios)
 194                         radeon_atom_backlight_init(radeon_encoder, connector);
 195                 else
 196                         radeon_legacy_backlight_init(radeon_encoder, connector);
 197         }
 198
 199         /*
 200          * If there is no native backlight device (which may happen even when
 201          * use_bl==true) try registering an ACPI video backlight device instead.
 202          */
 203         if (!rdev->mode_info.bl_encoder)
 204                 acpi_video_register_backlight();
 205 }
 206
 207 void
 208 radeon_link_encoder_connector(struct drm_device *dev)
 209 {
 210         struct drm_connector *connector;
 211         struct radeon_connector *radeon_connector;
 212         struct drm_encoder *encoder;
 213         struct radeon_encoder *radeon_encoder;
 214
 215         /* walk the list and link encoders to connectors */
 216         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 217                 radeon_connector = to_radeon_connector(connector);
 218                 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 219                         radeon_encoder = to_radeon_encoder(encoder);
 220                         if (radeon_encoder->devices & radeon_connector->devices) {
 221                                 drm_connector_attach_encoder(connector, encoder);
 222                                 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
 223                                         radeon_encoder_add_backlight(radeon_encoder, connector);
 224                         }
 225                 }
 226         }
 227 }
 228
 229 void radeon_encoder_set_active_device(struct drm_encoder *encoder)
 230 {
 231         struct drm_device *dev = encoder->dev;
 232         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 233         struct drm_connector *connector;
 234
 235         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 236                 if (connector->encoder == encoder) {
 237                         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 238                         radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
 239                         DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
 240                                   radeon_encoder->active_device, radeon_encoder->devices,
 241                                   radeon_connector->devices, encoder->encoder_type);
 242                 }
 243         }
 244 }
 245
 246 struct drm_connector *
 247 radeon_get_connector_for_encoder(struct drm_encoder *encoder)
 248 {
 249         struct drm_device *dev = encoder->dev;
 250         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 251         struct drm_connector *connector;
 252         struct radeon_connector *radeon_connector;
 253
 254         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 255                 radeon_connector = to_radeon_connector(connector);
 256                 if (radeon_encoder->active_device & radeon_connector->devices)
 257                         return connector;
 258         }
 259         return NULL;
 260 }
 261
 262 struct drm_connector *
 263 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder)
 264 {
 265         struct drm_device *dev = encoder->dev;
 266         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 267         struct drm_connector *connector;
 268         struct radeon_connector *radeon_connector;
 269
 270         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 271                 radeon_connector = to_radeon_connector(connector);
 272                 if (radeon_encoder->devices & radeon_connector->devices)
 273                         return connector;
 274         }
 275         return NULL;
 276 }
 277
 278 struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder)
 279 {
 280         struct drm_device *dev = encoder->dev;
 281         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 282         struct drm_encoder *other_encoder;
 283         struct radeon_encoder *other_radeon_encoder;
 284
 285         if (radeon_encoder->is_ext_encoder)
 286                 return NULL;
 287
 288         list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
 289                 if (other_encoder == encoder)
 290                         continue;
 291                 other_radeon_encoder = to_radeon_encoder(other_encoder);
 292                 if (other_radeon_encoder->is_ext_encoder &&
 293                     (radeon_encoder->devices & other_radeon_encoder->devices))
 294                         return other_encoder;
 295         }
 296         return NULL;
 297 }
 298
 299 u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
 300 {
 301         struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder);
 302
 303         if (other_encoder) {
 304                 struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder);
 305
 306                 switch (radeon_encoder->encoder_id) {
 307                 case ENCODER_OBJECT_ID_TRAVIS:
 308                 case ENCODER_OBJECT_ID_NUTMEG:
 309                         return radeon_encoder->encoder_id;
 310                 default:
 311                         return ENCODER_OBJECT_ID_NONE;
 312                 }
 313         }
 314         return ENCODER_OBJECT_ID_NONE;
 315 }
 316
 317 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
 318                              struct drm_display_mode *adjusted_mode)
 319 {
 320         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 321         struct drm_device *dev = encoder->dev;
 322         struct radeon_device *rdev = dev->dev_private;
 323         struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
 324         unsigned hblank = native_mode->htotal - native_mode->hdisplay;
 325         unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
 326         unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
 327         unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
 328         unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
 329         unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
 330
 331         adjusted_mode->clock = native_mode->clock;
 332         adjusted_mode->flags = native_mode->flags;
 333
 334         if (ASIC_IS_AVIVO(rdev)) {
 335                 adjusted_mode->hdisplay = native_mode->hdisplay;
 336                 adjusted_mode->vdisplay = native_mode->vdisplay;
 337         }
 338
 339         adjusted_mode->htotal = native_mode->hdisplay + hblank;
 340         adjusted_mode->hsync_start = native_mode->hdisplay + hover;
 341         adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
 342
 343         adjusted_mode->vtotal = native_mode->vdisplay + vblank;
 344         adjusted_mode->vsync_start = native_mode->vdisplay + vover;
 345         adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
 346
 347         drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
 348
 349         if (ASIC_IS_AVIVO(rdev)) {
 350                 adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
 351                 adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
 352         }
 353
 354         adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
 355         adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
 356         adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
 357
 358         adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
 359         adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
 360         adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
 361
 362 }
 363
 364 bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
 365                                     u32 pixel_clock)
 366 {
 367         struct drm_device *dev = encoder->dev;
 368         struct radeon_device *rdev = dev->dev_private;
 369         struct drm_connector *connector;
 370         struct radeon_connector *radeon_connector;
 371         struct radeon_connector_atom_dig *dig_connector;
 372
 373         connector = radeon_get_connector_for_encoder(encoder);
 374         /* if we don't have an active device yet, just use one of
 375          * the connectors tied to the encoder.
 376          */
 377         if (!connector)
 378                 connector = radeon_get_connector_for_encoder_init(encoder);
 379         radeon_connector = to_radeon_connector(connector);
 380
 381         switch (connector->connector_type) {
 382         case DRM_MODE_CONNECTOR_DVII:
 383         case DRM_MODE_CONNECTOR_HDMIB:
 384                 if (radeon_connector->use_digital) {
 385                         /* HDMI 1.3 supports up to 340 Mhz over single link */
 386                         if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
 387                                 if (pixel_clock > 340000)
 388                                         return true;
 389                                 else
 390                                         return false;
 391                         } else {
 392                                 if (pixel_clock > 165000)
 393                                         return true;
 394                                 else
 395                                         return false;
 396                         }
 397                 } else
 398                         return false;
 399         case DRM_MODE_CONNECTOR_DVID:
 400         case DRM_MODE_CONNECTOR_HDMIA:
 401         case DRM_MODE_CONNECTOR_DisplayPort:
 402                 dig_connector = radeon_connector->con_priv;
 403                 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
 404                     (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
 405                         return false;
 406                 else {
 407                         /* HDMI 1.3 supports up to 340 Mhz over single link */
 408                         if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
 409                                 if (pixel_clock > 340000)
 410                                         return true;
 411                                 else
 412                                         return false;
 413                         } else {
 414                                 if (pixel_clock > 165000)
 415                                         return true;
 416                                 else
 417                                         return false;
 418                         }
 419                 }
 420         default:
 421                 return false;
 422         }
 423 }
 424
 425 bool radeon_encoder_is_digital(struct drm_encoder *encoder)
 426 {
 427         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 428         switch (radeon_encoder->encoder_id) {
 429         case ENCODER_OBJECT_ID_INTERNAL_LVDS:
 430         case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
 431         case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
 432         case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
 433         case ENCODER_OBJECT_ID_INTERNAL_DVO1:
 434         case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
 435         case ENCODER_OBJECT_ID_INTERNAL_DDI:
 436         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
 437         case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
 438         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
 439         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
 440         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
 441                 return true;
 442         default:
 443                 return false;
 444         }
 445 }