5 * \author Gareth Hughes <gareth@valinux.com>
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
34 #include "radeon_drm.h"
35 #include "radeon_drv.h"
37 #include "drm_pciids.h"
38 #include <linux/console.h>
39 #include <linux/module.h>
44 * - 2.0.0 - initial interface
45 * - 2.1.0 - add square tiling interface
46 * - 2.2.0 - add r6xx/r7xx const buffer support
47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
48 * - 2.4.0 - add crtc id query
49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
54 * 2.10.0 - fusion 2D tiling
55 * 2.11.0 - backend map, initial compute support for the CS checker
56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
57 * 2.13.0 - virtual memory support, streamout
58 * 2.14.0 - add evergreen tiling informations
59 * 2.15.0 - add max_pipes query
60 * 2.16.0 - fix evergreen 2D tiled surface calculation
61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
62 * 2.18.0 - r600-eg: allow "invalid" DB formats
63 * 2.19.0 - r600-eg: MSAA textures
65 #define KMS_DRIVER_MAJOR 2
66 #define KMS_DRIVER_MINOR 19
67 #define KMS_DRIVER_PATCHLEVEL 0
68 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
69 int radeon_driver_unload_kms(struct drm_device *dev);
70 int radeon_driver_firstopen_kms(struct drm_device *dev);
71 void radeon_driver_lastclose_kms(struct drm_device *dev);
72 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
73 void radeon_driver_postclose_kms(struct drm_device *dev,
74 struct drm_file *file_priv);
75 void radeon_driver_preclose_kms(struct drm_device *dev,
76 struct drm_file *file_priv);
77 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
78 int radeon_resume_kms(struct drm_device *dev);
79 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
80 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
81 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
82 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
84 struct timeval *vblank_time,
86 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
87 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
88 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
89 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
90 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
91 struct drm_file *file_priv);
92 int radeon_gem_object_init(struct drm_gem_object *obj);
93 void radeon_gem_object_free(struct drm_gem_object *obj);
94 int radeon_gem_object_open(struct drm_gem_object *obj,
95 struct drm_file *file_priv);
96 void radeon_gem_object_close(struct drm_gem_object *obj,
97 struct drm_file *file_priv);
98 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
99 int *vpos, int *hpos);
100 extern struct drm_ioctl_desc radeon_ioctls_kms[];
101 extern int radeon_max_kms_ioctl;
102 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
103 int radeon_mode_dumb_mmap(struct drm_file *filp,
104 struct drm_device *dev,
105 uint32_t handle, uint64_t *offset_p);
106 int radeon_mode_dumb_create(struct drm_file *file_priv,
107 struct drm_device *dev,
108 struct drm_mode_create_dumb *args);
109 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
110 struct drm_device *dev,
112 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
113 struct drm_gem_object *obj,
115 struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
116 struct dma_buf *dma_buf);
118 #if defined(CONFIG_DEBUG_FS)
119 int radeon_debugfs_init(struct drm_minor *minor);
120 void radeon_debugfs_cleanup(struct drm_minor *minor);
125 int radeon_modeset = -1;
126 int radeon_dynclks = -1;
127 int radeon_r4xx_atom = 0;
128 int radeon_agpmode = 0;
129 int radeon_vram_limit = 0;
130 int radeon_gart_size = 512; /* default gart size */
131 int radeon_benchmarking = 0;
132 int radeon_testing = 0;
133 int radeon_connector_table = 0;
135 int radeon_audio = 0;
136 int radeon_disp_priority = 0;
137 int radeon_hw_i2c = 0;
138 int radeon_pcie_gen2 = -1;
140 int radeon_lockup_timeout = 10000;
142 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
143 module_param_named(no_wb, radeon_no_wb, int, 0444);
145 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
146 module_param_named(modeset, radeon_modeset, int, 0400);
148 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
149 module_param_named(dynclks, radeon_dynclks, int, 0444);
151 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
152 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
154 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
155 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
157 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
158 module_param_named(agpmode, radeon_agpmode, int, 0444);
160 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
161 module_param_named(gartsize, radeon_gart_size, int, 0600);
163 MODULE_PARM_DESC(benchmark, "Run benchmark");
164 module_param_named(benchmark, radeon_benchmarking, int, 0444);
166 MODULE_PARM_DESC(test, "Run tests");
167 module_param_named(test, radeon_testing, int, 0444);
169 MODULE_PARM_DESC(connector_table, "Force connector table");
170 module_param_named(connector_table, radeon_connector_table, int, 0444);
172 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
173 module_param_named(tv, radeon_tv, int, 0444);
175 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
176 module_param_named(audio, radeon_audio, int, 0444);
178 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
179 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
181 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
182 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
184 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
185 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
187 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
188 module_param_named(msi, radeon_msi, int, 0444);
190 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
191 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
193 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
195 drm_radeon_private_t *dev_priv = dev->dev_private;
197 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
200 /* Disable *all* interrupts */
201 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
202 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
203 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
207 static int radeon_resume(struct drm_device *dev)
209 drm_radeon_private_t *dev_priv = dev->dev_private;
211 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
214 /* Restore interrupt registers */
215 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
216 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
217 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
221 static struct pci_device_id pciidlist[] = {
225 #if defined(CONFIG_DRM_RADEON_KMS)
226 MODULE_DEVICE_TABLE(pci, pciidlist);
229 static const struct file_operations radeon_driver_old_fops = {
230 .owner = THIS_MODULE,
232 .release = drm_release,
233 .unlocked_ioctl = drm_ioctl,
236 .fasync = drm_fasync,
239 .compat_ioctl = radeon_compat_ioctl,
241 .llseek = noop_llseek,
244 static struct drm_driver driver_old = {
246 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
247 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
248 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
249 .load = radeon_driver_load,
250 .firstopen = radeon_driver_firstopen,
251 .open = radeon_driver_open,
252 .preclose = radeon_driver_preclose,
253 .postclose = radeon_driver_postclose,
254 .lastclose = radeon_driver_lastclose,
255 .unload = radeon_driver_unload,
256 .suspend = radeon_suspend,
257 .resume = radeon_resume,
258 .get_vblank_counter = radeon_get_vblank_counter,
259 .enable_vblank = radeon_enable_vblank,
260 .disable_vblank = radeon_disable_vblank,
261 .master_create = radeon_master_create,
262 .master_destroy = radeon_master_destroy,
263 .irq_preinstall = radeon_driver_irq_preinstall,
264 .irq_postinstall = radeon_driver_irq_postinstall,
265 .irq_uninstall = radeon_driver_irq_uninstall,
266 .irq_handler = radeon_driver_irq_handler,
267 .ioctls = radeon_ioctls,
268 .dma_ioctl = radeon_cp_buffers,
269 .fops = &radeon_driver_old_fops,
273 .major = DRIVER_MAJOR,
274 .minor = DRIVER_MINOR,
275 .patchlevel = DRIVER_PATCHLEVEL,
278 static struct drm_driver kms_driver;
280 static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
282 struct apertures_struct *ap;
283 bool primary = false;
285 ap = alloc_apertures(1);
286 ap->ranges[0].base = pci_resource_start(pdev, 0);
287 ap->ranges[0].size = pci_resource_len(pdev, 0);
290 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
292 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
297 radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
299 /* Get rid of things like offb */
300 radeon_kick_out_firmware_fb(pdev);
302 return drm_get_pci_dev(pdev, ent, &kms_driver);
306 radeon_pci_remove(struct pci_dev *pdev)
308 struct drm_device *dev = pci_get_drvdata(pdev);
314 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
316 struct drm_device *dev = pci_get_drvdata(pdev);
317 return radeon_suspend_kms(dev, state);
321 radeon_pci_resume(struct pci_dev *pdev)
323 struct drm_device *dev = pci_get_drvdata(pdev);
324 return radeon_resume_kms(dev);
327 static const struct file_operations radeon_driver_kms_fops = {
328 .owner = THIS_MODULE,
330 .release = drm_release,
331 .unlocked_ioctl = drm_ioctl,
334 .fasync = drm_fasync,
337 .compat_ioctl = radeon_kms_compat_ioctl,
341 static struct drm_driver kms_driver = {
343 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
344 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
347 .load = radeon_driver_load_kms,
348 .firstopen = radeon_driver_firstopen_kms,
349 .open = radeon_driver_open_kms,
350 .preclose = radeon_driver_preclose_kms,
351 .postclose = radeon_driver_postclose_kms,
352 .lastclose = radeon_driver_lastclose_kms,
353 .unload = radeon_driver_unload_kms,
354 .suspend = radeon_suspend_kms,
355 .resume = radeon_resume_kms,
356 .get_vblank_counter = radeon_get_vblank_counter_kms,
357 .enable_vblank = radeon_enable_vblank_kms,
358 .disable_vblank = radeon_disable_vblank_kms,
359 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
360 .get_scanout_position = radeon_get_crtc_scanoutpos,
361 #if defined(CONFIG_DEBUG_FS)
362 .debugfs_init = radeon_debugfs_init,
363 .debugfs_cleanup = radeon_debugfs_cleanup,
365 .irq_preinstall = radeon_driver_irq_preinstall_kms,
366 .irq_postinstall = radeon_driver_irq_postinstall_kms,
367 .irq_uninstall = radeon_driver_irq_uninstall_kms,
368 .irq_handler = radeon_driver_irq_handler_kms,
369 .ioctls = radeon_ioctls_kms,
370 .gem_init_object = radeon_gem_object_init,
371 .gem_free_object = radeon_gem_object_free,
372 .gem_open_object = radeon_gem_object_open,
373 .gem_close_object = radeon_gem_object_close,
374 .dma_ioctl = radeon_dma_ioctl_kms,
375 .dumb_create = radeon_mode_dumb_create,
376 .dumb_map_offset = radeon_mode_dumb_mmap,
377 .dumb_destroy = radeon_mode_dumb_destroy,
378 .fops = &radeon_driver_kms_fops,
380 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
381 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
382 .gem_prime_export = radeon_gem_prime_export,
383 .gem_prime_import = radeon_gem_prime_import,
388 .major = KMS_DRIVER_MAJOR,
389 .minor = KMS_DRIVER_MINOR,
390 .patchlevel = KMS_DRIVER_PATCHLEVEL,
393 static struct drm_driver *driver;
394 static struct pci_driver *pdriver;
396 static struct pci_driver radeon_pci_driver = {
398 .id_table = pciidlist,
401 static struct pci_driver radeon_kms_pci_driver = {
403 .id_table = pciidlist,
404 .probe = radeon_pci_probe,
405 .remove = radeon_pci_remove,
406 .suspend = radeon_pci_suspend,
407 .resume = radeon_pci_resume,
410 static int __init radeon_init(void)
412 driver = &driver_old;
413 pdriver = &radeon_pci_driver;
414 driver->num_ioctls = radeon_max_ioctl;
415 #ifdef CONFIG_VGA_CONSOLE
416 if (vgacon_text_force() && radeon_modeset == -1) {
417 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
418 driver = &driver_old;
419 pdriver = &radeon_pci_driver;
420 driver->driver_features &= ~DRIVER_MODESET;
424 /* if enabled by default */
425 if (radeon_modeset == -1) {
426 #ifdef CONFIG_DRM_RADEON_KMS
427 DRM_INFO("radeon defaulting to kernel modesetting.\n");
430 DRM_INFO("radeon defaulting to userspace modesetting.\n");
434 if (radeon_modeset == 1) {
435 DRM_INFO("radeon kernel modesetting enabled.\n");
436 driver = &kms_driver;
437 pdriver = &radeon_kms_pci_driver;
438 driver->driver_features |= DRIVER_MODESET;
439 driver->num_ioctls = radeon_max_kms_ioctl;
440 radeon_register_atpx_handler();
442 /* if the vga console setting is enabled still
443 * let modprobe override it */
444 return drm_pci_init(driver, pdriver);
447 static void __exit radeon_exit(void)
449 drm_pci_exit(driver, pdriver);
450 radeon_unregister_atpx_handler();
453 module_init(radeon_init);
454 module_exit(radeon_exit);
456 MODULE_AUTHOR(DRIVER_AUTHOR);
457 MODULE_DESCRIPTION(DRIVER_DESC);
458 MODULE_LICENSE("GPL and additional rights");