5 * \author Gareth Hughes <gareth@valinux.com>
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
33 #include <drm/radeon_drm.h>
34 #include "radeon_drv.h"
36 #include <drm/drm_pciids.h>
37 #include <linux/console.h>
38 #include <linux/module.h>
43 * - 2.0.0 - initial interface
44 * - 2.1.0 - add square tiling interface
45 * - 2.2.0 - add r6xx/r7xx const buffer support
46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
47 * - 2.4.0 - add crtc id query
48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
49 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
50 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
51 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
52 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
53 * 2.10.0 - fusion 2D tiling
54 * 2.11.0 - backend map, initial compute support for the CS checker
55 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
56 * 2.13.0 - virtual memory support, streamout
57 * 2.14.0 - add evergreen tiling informations
58 * 2.15.0 - add max_pipes query
59 * 2.16.0 - fix evergreen 2D tiled surface calculation
60 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
61 * 2.18.0 - r600-eg: allow "invalid" DB formats
62 * 2.19.0 - r600-eg: MSAA textures
63 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
64 * 2.21.0 - r600-r700: FMASK and CMASK
65 * 2.22.0 - r600 only: RESOLVE_BOX allowed
66 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
67 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
68 * 2.25.0 - eg+: new info request for num SE and num SH
69 * 2.26.0 - r600-eg: fix htile size computation
70 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
71 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
72 * 2.29.0 - R500 FP16 color clear registers
74 #define KMS_DRIVER_MAJOR 2
75 #define KMS_DRIVER_MINOR 29
76 #define KMS_DRIVER_PATCHLEVEL 0
77 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
78 int radeon_driver_unload_kms(struct drm_device *dev);
79 int radeon_driver_firstopen_kms(struct drm_device *dev);
80 void radeon_driver_lastclose_kms(struct drm_device *dev);
81 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
82 void radeon_driver_postclose_kms(struct drm_device *dev,
83 struct drm_file *file_priv);
84 void radeon_driver_preclose_kms(struct drm_device *dev,
85 struct drm_file *file_priv);
86 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
87 int radeon_resume_kms(struct drm_device *dev);
88 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
89 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
90 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
91 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
93 struct timeval *vblank_time,
95 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
96 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
97 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
98 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
99 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
100 struct drm_file *file_priv);
101 int radeon_gem_object_init(struct drm_gem_object *obj);
102 void radeon_gem_object_free(struct drm_gem_object *obj);
103 int radeon_gem_object_open(struct drm_gem_object *obj,
104 struct drm_file *file_priv);
105 void radeon_gem_object_close(struct drm_gem_object *obj,
106 struct drm_file *file_priv);
107 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
108 int *vpos, int *hpos);
109 extern struct drm_ioctl_desc radeon_ioctls_kms[];
110 extern int radeon_max_kms_ioctl;
111 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
112 int radeon_mode_dumb_mmap(struct drm_file *filp,
113 struct drm_device *dev,
114 uint32_t handle, uint64_t *offset_p);
115 int radeon_mode_dumb_create(struct drm_file *file_priv,
116 struct drm_device *dev,
117 struct drm_mode_create_dumb *args);
118 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
119 struct drm_device *dev,
121 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
122 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
124 struct sg_table *sg);
125 int radeon_gem_prime_pin(struct drm_gem_object *obj);
126 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
127 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
128 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
131 #if defined(CONFIG_DEBUG_FS)
132 int radeon_debugfs_init(struct drm_minor *minor);
133 void radeon_debugfs_cleanup(struct drm_minor *minor);
137 #if defined(CONFIG_VGA_SWITCHEROO)
138 void radeon_register_atpx_handler(void);
139 void radeon_unregister_atpx_handler(void);
141 static inline void radeon_register_atpx_handler(void) {}
142 static inline void radeon_unregister_atpx_handler(void) {}
146 int radeon_modeset = 1;
147 int radeon_dynclks = -1;
148 int radeon_r4xx_atom = 0;
149 int radeon_agpmode = 0;
150 int radeon_vram_limit = 0;
151 int radeon_gart_size = 512; /* default gart size */
152 int radeon_benchmarking = 0;
153 int radeon_testing = 0;
154 int radeon_connector_table = 0;
156 int radeon_audio = 0;
157 int radeon_disp_priority = 0;
158 int radeon_hw_i2c = 0;
159 int radeon_pcie_gen2 = -1;
161 int radeon_lockup_timeout = 10000;
163 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
164 module_param_named(no_wb, radeon_no_wb, int, 0444);
166 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
167 module_param_named(modeset, radeon_modeset, int, 0400);
169 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
170 module_param_named(dynclks, radeon_dynclks, int, 0444);
172 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
173 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
175 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
176 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
178 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
179 module_param_named(agpmode, radeon_agpmode, int, 0444);
181 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
182 module_param_named(gartsize, radeon_gart_size, int, 0600);
184 MODULE_PARM_DESC(benchmark, "Run benchmark");
185 module_param_named(benchmark, radeon_benchmarking, int, 0444);
187 MODULE_PARM_DESC(test, "Run tests");
188 module_param_named(test, radeon_testing, int, 0444);
190 MODULE_PARM_DESC(connector_table, "Force connector table");
191 module_param_named(connector_table, radeon_connector_table, int, 0444);
193 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
194 module_param_named(tv, radeon_tv, int, 0444);
196 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
197 module_param_named(audio, radeon_audio, int, 0444);
199 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
200 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
202 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
203 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
205 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
206 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
208 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
209 module_param_named(msi, radeon_msi, int, 0444);
211 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
212 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
214 static struct pci_device_id pciidlist[] = {
218 MODULE_DEVICE_TABLE(pci, pciidlist);
220 #ifdef CONFIG_DRM_RADEON_UMS
222 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
224 drm_radeon_private_t *dev_priv = dev->dev_private;
226 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
229 /* Disable *all* interrupts */
230 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
231 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
232 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
236 static int radeon_resume(struct drm_device *dev)
238 drm_radeon_private_t *dev_priv = dev->dev_private;
240 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
243 /* Restore interrupt registers */
244 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
245 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
246 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
250 static const struct file_operations radeon_driver_old_fops = {
251 .owner = THIS_MODULE,
253 .release = drm_release,
254 .unlocked_ioctl = drm_ioctl,
257 .fasync = drm_fasync,
260 .compat_ioctl = radeon_compat_ioctl,
262 .llseek = noop_llseek,
265 static struct drm_driver driver_old = {
267 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
268 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
269 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
270 .load = radeon_driver_load,
271 .firstopen = radeon_driver_firstopen,
272 .open = radeon_driver_open,
273 .preclose = radeon_driver_preclose,
274 .postclose = radeon_driver_postclose,
275 .lastclose = radeon_driver_lastclose,
276 .unload = radeon_driver_unload,
277 .suspend = radeon_suspend,
278 .resume = radeon_resume,
279 .get_vblank_counter = radeon_get_vblank_counter,
280 .enable_vblank = radeon_enable_vblank,
281 .disable_vblank = radeon_disable_vblank,
282 .master_create = radeon_master_create,
283 .master_destroy = radeon_master_destroy,
284 .irq_preinstall = radeon_driver_irq_preinstall,
285 .irq_postinstall = radeon_driver_irq_postinstall,
286 .irq_uninstall = radeon_driver_irq_uninstall,
287 .irq_handler = radeon_driver_irq_handler,
288 .ioctls = radeon_ioctls,
289 .dma_ioctl = radeon_cp_buffers,
290 .fops = &radeon_driver_old_fops,
294 .major = DRIVER_MAJOR,
295 .minor = DRIVER_MINOR,
296 .patchlevel = DRIVER_PATCHLEVEL,
301 static struct drm_driver kms_driver;
303 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
305 struct apertures_struct *ap;
306 bool primary = false;
308 ap = alloc_apertures(1);
312 ap->ranges[0].base = pci_resource_start(pdev, 0);
313 ap->ranges[0].size = pci_resource_len(pdev, 0);
316 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
318 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
324 static int radeon_pci_probe(struct pci_dev *pdev,
325 const struct pci_device_id *ent)
329 /* Get rid of things like offb */
330 ret = radeon_kick_out_firmware_fb(pdev);
334 return drm_get_pci_dev(pdev, ent, &kms_driver);
338 radeon_pci_remove(struct pci_dev *pdev)
340 struct drm_device *dev = pci_get_drvdata(pdev);
346 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
348 struct drm_device *dev = pci_get_drvdata(pdev);
349 return radeon_suspend_kms(dev, state);
353 radeon_pci_resume(struct pci_dev *pdev)
355 struct drm_device *dev = pci_get_drvdata(pdev);
356 return radeon_resume_kms(dev);
359 static const struct file_operations radeon_driver_kms_fops = {
360 .owner = THIS_MODULE,
362 .release = drm_release,
363 .unlocked_ioctl = drm_ioctl,
366 .fasync = drm_fasync,
369 .compat_ioctl = radeon_kms_compat_ioctl,
373 static struct drm_driver kms_driver = {
375 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
376 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
379 .load = radeon_driver_load_kms,
380 .firstopen = radeon_driver_firstopen_kms,
381 .open = radeon_driver_open_kms,
382 .preclose = radeon_driver_preclose_kms,
383 .postclose = radeon_driver_postclose_kms,
384 .lastclose = radeon_driver_lastclose_kms,
385 .unload = radeon_driver_unload_kms,
386 .suspend = radeon_suspend_kms,
387 .resume = radeon_resume_kms,
388 .get_vblank_counter = radeon_get_vblank_counter_kms,
389 .enable_vblank = radeon_enable_vblank_kms,
390 .disable_vblank = radeon_disable_vblank_kms,
391 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
392 .get_scanout_position = radeon_get_crtc_scanoutpos,
393 #if defined(CONFIG_DEBUG_FS)
394 .debugfs_init = radeon_debugfs_init,
395 .debugfs_cleanup = radeon_debugfs_cleanup,
397 .irq_preinstall = radeon_driver_irq_preinstall_kms,
398 .irq_postinstall = radeon_driver_irq_postinstall_kms,
399 .irq_uninstall = radeon_driver_irq_uninstall_kms,
400 .irq_handler = radeon_driver_irq_handler_kms,
401 .ioctls = radeon_ioctls_kms,
402 .gem_init_object = radeon_gem_object_init,
403 .gem_free_object = radeon_gem_object_free,
404 .gem_open_object = radeon_gem_object_open,
405 .gem_close_object = radeon_gem_object_close,
406 .dma_ioctl = radeon_dma_ioctl_kms,
407 .dumb_create = radeon_mode_dumb_create,
408 .dumb_map_offset = radeon_mode_dumb_mmap,
409 .dumb_destroy = radeon_mode_dumb_destroy,
410 .fops = &radeon_driver_kms_fops,
412 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
413 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
414 .gem_prime_export = drm_gem_prime_export,
415 .gem_prime_import = drm_gem_prime_import,
416 .gem_prime_pin = radeon_gem_prime_pin,
417 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
418 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
419 .gem_prime_vmap = radeon_gem_prime_vmap,
420 .gem_prime_vunmap = radeon_gem_prime_vunmap,
425 .major = KMS_DRIVER_MAJOR,
426 .minor = KMS_DRIVER_MINOR,
427 .patchlevel = KMS_DRIVER_PATCHLEVEL,
430 static struct drm_driver *driver;
431 static struct pci_driver *pdriver;
433 #ifdef CONFIG_DRM_RADEON_UMS
434 static struct pci_driver radeon_pci_driver = {
436 .id_table = pciidlist,
440 static struct pci_driver radeon_kms_pci_driver = {
442 .id_table = pciidlist,
443 .probe = radeon_pci_probe,
444 .remove = radeon_pci_remove,
445 .suspend = radeon_pci_suspend,
446 .resume = radeon_pci_resume,
449 static int __init radeon_init(void)
451 if (radeon_modeset == 1) {
452 DRM_INFO("radeon kernel modesetting enabled.\n");
453 driver = &kms_driver;
454 pdriver = &radeon_kms_pci_driver;
455 driver->driver_features |= DRIVER_MODESET;
456 driver->num_ioctls = radeon_max_kms_ioctl;
457 radeon_register_atpx_handler();
460 #ifdef CONFIG_DRM_RADEON_UMS
461 DRM_INFO("radeon userspace modesetting enabled.\n");
462 driver = &driver_old;
463 pdriver = &radeon_pci_driver;
464 driver->driver_features &= ~DRIVER_MODESET;
465 driver->num_ioctls = radeon_max_ioctl;
467 DRM_ERROR("No UMS support in radeon module!\n");
472 /* let modprobe override vga console setting */
473 return drm_pci_init(driver, pdriver);
476 static void __exit radeon_exit(void)
478 drm_pci_exit(driver, pdriver);
479 radeon_unregister_atpx_handler();
482 module_init(radeon_init);
483 module_exit(radeon_exit);
485 MODULE_AUTHOR(DRIVER_AUTHOR);
486 MODULE_DESCRIPTION(DRIVER_DESC);
487 MODULE_LICENSE("GPL and additional rights");