drivers/gpu/drm/panfrost/panfrost_device.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */
   3 /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
   4
   5 #include <linux/clk.h>
   6 #include <linux/reset.h>
   7 #include <linux/platform_device.h>
   8 #include <linux/pm_runtime.h>
   9 #include <linux/regulator/consumer.h>
  10
  11 #include "panfrost_device.h"
  12 #include "panfrost_devfreq.h"
  13 #include "panfrost_features.h"
  14 #include "panfrost_gpu.h"
  15 #include "panfrost_job.h"
  16 #include "panfrost_mmu.h"
  17
  18 static int panfrost_reset_init(struct panfrost_device *pfdev)
  19 {
  20         int err;
  21
  22         pfdev->rstc = devm_reset_control_array_get(pfdev->dev, false, true);
  23         if (IS_ERR(pfdev->rstc)) {
  24                 dev_err(pfdev->dev, "get reset failed %ld\n", PTR_ERR(pfdev->rstc));
  25                 return PTR_ERR(pfdev->rstc);
  26         }
  27
  28         err = reset_control_deassert(pfdev->rstc);
  29         if (err)
  30                 return err;
  31
  32         return 0;
  33 }
  34
  35 static void panfrost_reset_fini(struct panfrost_device *pfdev)
  36 {
  37         reset_control_assert(pfdev->rstc);
  38 }
  39
  40 static int panfrost_clk_init(struct panfrost_device *pfdev)
  41 {
  42         int err;
  43         unsigned long rate;
  44
  45         pfdev->clock = devm_clk_get(pfdev->dev, NULL);
  46         if (IS_ERR(pfdev->clock)) {
  47                 dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));
  48                 return PTR_ERR(pfdev->clock);
  49         }
  50
  51         rate = clk_get_rate(pfdev->clock);
  52         dev_info(pfdev->dev, "clock rate = %lu\n", rate);
  53
  54         err = clk_prepare_enable(pfdev->clock);
  55         if (err)
  56                 return err;
  57
  58         pfdev->bus_clock = devm_clk_get_optional(pfdev->dev, "bus");
  59         if (IS_ERR(pfdev->bus_clock)) {
  60                 dev_err(pfdev->dev, "get bus_clock failed %ld\n",
  61                         PTR_ERR(pfdev->bus_clock));
  62                 return PTR_ERR(pfdev->bus_clock);
  63         }
  64
  65         if (pfdev->bus_clock) {
  66                 rate = clk_get_rate(pfdev->bus_clock);
  67                 dev_info(pfdev->dev, "bus_clock rate = %lu\n", rate);
  68
  69                 err = clk_prepare_enable(pfdev->bus_clock);
  70                 if (err)
  71                         goto disable_clock;
  72         }
  73
  74         return 0;
  75
  76 disable_clock:
  77         clk_disable_unprepare(pfdev->clock);
  78
  79         return err;
  80 }
  81
  82 static void panfrost_clk_fini(struct panfrost_device *pfdev)
  83 {
  84         clk_disable_unprepare(pfdev->bus_clock);
  85         clk_disable_unprepare(pfdev->clock);
  86 }
  87
  88 static int panfrost_regulator_init(struct panfrost_device *pfdev)
  89 {
  90         int ret;
  91
  92         pfdev->regulator = devm_regulator_get_optional(pfdev->dev, "mali");
  93         if (IS_ERR(pfdev->regulator)) {
  94                 ret = PTR_ERR(pfdev->regulator);
  95                 pfdev->regulator = NULL;
  96                 if (ret == -ENODEV)
  97                         return 0;
  98                 dev_err(pfdev->dev, "failed to get regulator: %d\n", ret);
  99                 return ret;
 100         }
 101
 102         ret = regulator_enable(pfdev->regulator);
 103         if (ret < 0) {
 104                 dev_err(pfdev->dev, "failed to enable regulator: %d\n", ret);
 105                 return ret;
 106         }
 107
 108         return 0;
 109 }
 110
 111 static void panfrost_regulator_fini(struct panfrost_device *pfdev)
 112 {
 113         if (pfdev->regulator)
 114                 regulator_disable(pfdev->regulator);
 115 }
 116
 117 int panfrost_device_init(struct panfrost_device *pfdev)
 118 {
 119         int err;
 120         struct resource *res;
 121
 122         mutex_init(&pfdev->sched_lock);
 123         mutex_init(&pfdev->reset_lock);
 124         INIT_LIST_HEAD(&pfdev->scheduled_jobs);
 125
 126         spin_lock_init(&pfdev->hwaccess_lock);
 127
 128         err = panfrost_clk_init(pfdev);
 129         if (err) {
 130                 dev_err(pfdev->dev, "clk init failed %d\n", err);
 131                 return err;
 132         }
 133
 134         err = panfrost_regulator_init(pfdev);
 135         if (err) {
 136                 dev_err(pfdev->dev, "regulator init failed %d\n", err);
 137                 goto err_out0;
 138         }
 139
 140         err = panfrost_reset_init(pfdev);
 141         if (err) {
 142                 dev_err(pfdev->dev, "reset init failed %d\n", err);
 143                 goto err_out1;
 144         }
 145
 146         res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0);
 147         pfdev->iomem = devm_ioremap_resource(pfdev->dev, res);
 148         if (IS_ERR(pfdev->iomem)) {
 149                 dev_err(pfdev->dev, "failed to ioremap iomem\n");
 150                 err = PTR_ERR(pfdev->iomem);
 151                 goto err_out2;
 152         }
 153
 154         err = panfrost_gpu_init(pfdev);
 155         if (err)
 156                 goto err_out2;
 157
 158         err = panfrost_mmu_init(pfdev);
 159         if (err)
 160                 goto err_out3;
 161
 162         err = panfrost_job_init(pfdev);
 163         if (err)
 164                 goto err_out4;
 165
 166         /* runtime PM will wake us up later */
 167         panfrost_gpu_power_off(pfdev);
 168
 169         pm_runtime_set_active(pfdev->dev);
 170         pm_runtime_get_sync(pfdev->dev);
 171         pm_runtime_mark_last_busy(pfdev->dev);
 172         pm_runtime_put_autosuspend(pfdev->dev);
 173
 174         return 0;
 175 err_out4:
 176         panfrost_mmu_fini(pfdev);
 177 err_out3:
 178         panfrost_gpu_fini(pfdev);
 179 err_out2:
 180         panfrost_reset_fini(pfdev);
 181 err_out1:
 182         panfrost_regulator_fini(pfdev);
 183 err_out0:
 184         panfrost_clk_fini(pfdev);
 185         return err;
 186 }
 187
 188 void panfrost_device_fini(struct panfrost_device *pfdev)
 189 {
 190         panfrost_job_fini(pfdev);
 191         panfrost_mmu_fini(pfdev);
 192         panfrost_gpu_fini(pfdev);
 193         panfrost_reset_fini(pfdev);
 194         panfrost_regulator_fini(pfdev);
 195         panfrost_clk_fini(pfdev);
 196 }
 197
 198 const char *panfrost_exception_name(struct panfrost_device *pfdev, u32 exception_code)
 199 {
 200         switch (exception_code) {
 201                 /* Non-Fault Status code */
 202         case 0x00: return "NOT_STARTED/IDLE/OK";
 203         case 0x01: return "DONE";
 204         case 0x02: return "INTERRUPTED";
 205         case 0x03: return "STOPPED";
 206         case 0x04: return "TERMINATED";
 207         case 0x08: return "ACTIVE";
 208                 /* Job exceptions */
 209         case 0x40: return "JOB_CONFIG_FAULT";
 210         case 0x41: return "JOB_POWER_FAULT";
 211         case 0x42: return "JOB_READ_FAULT";
 212         case 0x43: return "JOB_WRITE_FAULT";
 213         case 0x44: return "JOB_AFFINITY_FAULT";
 214         case 0x48: return "JOB_BUS_FAULT";
 215         case 0x50: return "INSTR_INVALID_PC";
 216         case 0x51: return "INSTR_INVALID_ENC";
 217         case 0x52: return "INSTR_TYPE_MISMATCH";
 218         case 0x53: return "INSTR_OPERAND_FAULT";
 219         case 0x54: return "INSTR_TLS_FAULT";
 220         case 0x55: return "INSTR_BARRIER_FAULT";
 221         case 0x56: return "INSTR_ALIGN_FAULT";
 222         case 0x58: return "DATA_INVALID_FAULT";
 223         case 0x59: return "TILE_RANGE_FAULT";
 224         case 0x5A: return "ADDR_RANGE_FAULT";
 225         case 0x60: return "OUT_OF_MEMORY";
 226                 /* GPU exceptions */
 227         case 0x80: return "DELAYED_BUS_FAULT";
 228         case 0x88: return "SHAREABILITY_FAULT";
 229                 /* MMU exceptions */
 230         case 0xC1: return "TRANSLATION_FAULT_LEVEL1";
 231         case 0xC2: return "TRANSLATION_FAULT_LEVEL2";
 232         case 0xC3: return "TRANSLATION_FAULT_LEVEL3";
 233         case 0xC4: return "TRANSLATION_FAULT_LEVEL4";
 234         case 0xC8: return "PERMISSION_FAULT";
 235         case 0xC9 ... 0xCF: return "PERMISSION_FAULT";
 236         case 0xD1: return "TRANSTAB_BUS_FAULT_LEVEL1";
 237         case 0xD2: return "TRANSTAB_BUS_FAULT_LEVEL2";
 238         case 0xD3: return "TRANSTAB_BUS_FAULT_LEVEL3";
 239         case 0xD4: return "TRANSTAB_BUS_FAULT_LEVEL4";
 240         case 0xD8: return "ACCESS_FLAG";
 241         case 0xD9 ... 0xDF: return "ACCESS_FLAG";
 242         case 0xE0 ... 0xE7: return "ADDRESS_SIZE_FAULT";
 243         case 0xE8 ... 0xEF: return "MEMORY_ATTRIBUTES_FAULT";
 244         }
 245
 246         return "UNKNOWN";
 247 }
 248
 249 #ifdef CONFIG_PM
 250 int panfrost_device_resume(struct device *dev)
 251 {
 252         struct platform_device *pdev = to_platform_device(dev);
 253         struct panfrost_device *pfdev = platform_get_drvdata(pdev);
 254
 255         panfrost_gpu_soft_reset(pfdev);
 256
 257         /* TODO: Re-enable all other address spaces */
 258         panfrost_gpu_power_on(pfdev);
 259         panfrost_mmu_enable(pfdev, 0);
 260         panfrost_job_enable_interrupts(pfdev);
 261         panfrost_devfreq_resume(pfdev);
 262
 263         return 0;
 264 }
 265
 266 int panfrost_device_suspend(struct device *dev)
 267 {
 268         struct platform_device *pdev = to_platform_device(dev);
 269         struct panfrost_device *pfdev = platform_get_drvdata(pdev);
 270
 271         if (!panfrost_job_is_idle(pfdev))
 272                 return -EBUSY;
 273
 274         panfrost_devfreq_suspend(pfdev);
 275         panfrost_gpu_power_off(pfdev);
 276
 277         return 0;
 278 }
 279 #endif