drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  * Author: Rob Clark <rob@ti.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/of.h>
  19 #include <linux/sort.h>
  20 #include <linux/sys_soc.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_crtc_helper.h>
  25 #include <drm/drm_fb_helper.h>
  26
  27 #include "omap_dmm_tiler.h"
  28 #include "omap_drv.h"
  29
  30 #define DRIVER_NAME             MODULE_NAME
  31 #define DRIVER_DESC             "OMAP DRM"
  32 #define DRIVER_DATE             "20110917"
  33 #define DRIVER_MAJOR            1
  34 #define DRIVER_MINOR            0
  35 #define DRIVER_PATCHLEVEL       0
  36
  37 /*
  38  * mode config funcs
  39  */
  40
  41 /* Notes about mapping DSS and DRM entities:
  42  *    CRTC:        overlay
  43  *    encoder:     manager.. with some extension to allow one primary CRTC
  44  *                 and zero or more video CRTC's to be mapped to one encoder?
  45  *    connector:   dssdev.. manager can be attached/detached from different
  46  *                 devices
  47  */
  48
  49 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  50                                             struct drm_atomic_state *old_state)
  51 {
  52         struct drm_crtc_state *new_crtc_state;
  53         struct drm_crtc *crtc;
  54         unsigned int i;
  55         int ret;
  56
  57         for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
  58                 if (!new_crtc_state->active)
  59                         continue;
  60
  61                 ret = omap_crtc_wait_pending(crtc);
  62
  63                 if (!ret)
  64                         dev_warn(dev->dev,
  65                                  "atomic complete timeout (pipe %u)!\n", i);
  66         }
  67 }
  68
  69 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
  70 {
  71         struct drm_device *dev = old_state->dev;
  72         struct omap_drm_private *priv = dev->dev_private;
  73
  74         priv->dispc_ops->runtime_get(priv->dispc);
  75
  76         /* Apply the atomic update. */
  77         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  78
  79         if (priv->omaprev != 0x3430) {
  80                 /* With the current dss dispc implementation we have to enable
  81                  * the new modeset before we can commit planes. The dispc ovl
  82                  * configuration relies on the video mode configuration been
  83                  * written into the HW when the ovl configuration is
  84                  * calculated.
  85                  *
  86                  * This approach is not ideal because after a mode change the
  87                  * plane update is executed only after the first vblank
  88                  * interrupt. The dispc implementation should be fixed so that
  89                  * it is able use uncommitted drm state information.
  90                  */
  91                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
  92                 omap_atomic_wait_for_completion(dev, old_state);
  93
  94                 drm_atomic_helper_commit_planes(dev, old_state, 0);
  95
  96                 drm_atomic_helper_commit_hw_done(old_state);
  97         } else {
  98                 /*
  99                  * OMAP3 DSS seems to have issues with the work-around above,
 100                  * resulting in endless sync losts if a crtc is enabled without
 101                  * a plane. For now, skip the WA for OMAP3.
 102                  */
 103                 drm_atomic_helper_commit_planes(dev, old_state, 0);
 104
 105                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
 106
 107                 drm_atomic_helper_commit_hw_done(old_state);
 108         }
 109
 110         /*
 111          * Wait for completion of the page flips to ensure that old buffers
 112          * can't be touched by the hardware anymore before cleaning up planes.
 113          */
 114         omap_atomic_wait_for_completion(dev, old_state);
 115
 116         drm_atomic_helper_cleanup_planes(dev, old_state);
 117
 118         priv->dispc_ops->runtime_put(priv->dispc);
 119 }
 120
 121 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
 122         .atomic_commit_tail = omap_atomic_commit_tail,
 123 };
 124
 125 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 126         .fb_create = omap_framebuffer_create,
 127         .output_poll_changed = drm_fb_helper_output_poll_changed,
 128         .atomic_check = drm_atomic_helper_check,
 129         .atomic_commit = drm_atomic_helper_commit,
 130 };
 131
 132 static int get_connector_type(struct omap_dss_device *display)
 133 {
 134         switch (display->type) {
 135         case OMAP_DISPLAY_TYPE_HDMI:
 136                 return DRM_MODE_CONNECTOR_HDMIA;
 137         case OMAP_DISPLAY_TYPE_DVI:
 138                 return DRM_MODE_CONNECTOR_DVID;
 139         case OMAP_DISPLAY_TYPE_DSI:
 140                 return DRM_MODE_CONNECTOR_DSI;
 141         case OMAP_DISPLAY_TYPE_DPI:
 142         case OMAP_DISPLAY_TYPE_DBI:
 143                 return DRM_MODE_CONNECTOR_DPI;
 144         case OMAP_DISPLAY_TYPE_VENC:
 145                 /* TODO: This could also be composite */
 146                 return DRM_MODE_CONNECTOR_SVIDEO;
 147         case OMAP_DISPLAY_TYPE_SDI:
 148                 return DRM_MODE_CONNECTOR_LVDS;
 149         default:
 150                 return DRM_MODE_CONNECTOR_Unknown;
 151         }
 152 }
 153
 154 static void omap_disconnect_pipelines(struct drm_device *ddev)
 155 {
 156         struct omap_drm_private *priv = ddev->dev_private;
 157         unsigned int i;
 158
 159         for (i = 0; i < priv->num_pipes; i++) {
 160                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 161
 162                 omapdss_device_disconnect(NULL, pipe->output);
 163
 164                 omapdss_device_put(pipe->output);
 165                 omapdss_device_put(pipe->display);
 166                 pipe->output = NULL;
 167                 pipe->display = NULL;
 168         }
 169
 170         memset(&priv->channels, 0, sizeof(priv->channels));
 171
 172         priv->num_pipes = 0;
 173 }
 174
 175 static int omap_compare_pipes(const void *a, const void *b)
 176 {
 177         const struct omap_drm_pipeline *pipe1 = a;
 178         const struct omap_drm_pipeline *pipe2 = b;
 179
 180         if (pipe1->display->alias_id > pipe2->display->alias_id)
 181                 return 1;
 182         else if (pipe1->display->alias_id < pipe2->display->alias_id)
 183                 return -1;
 184         return 0;
 185 }
 186
 187 static int omap_connect_pipelines(struct drm_device *ddev)
 188 {
 189         struct omap_drm_private *priv = ddev->dev_private;
 190         struct omap_dss_device *output = NULL;
 191         unsigned int i;
 192         int r;
 193
 194         if (!omapdss_stack_is_ready())
 195                 return -EPROBE_DEFER;
 196
 197         for_each_dss_output(output) {
 198                 r = omapdss_device_connect(priv->dss, NULL, output);
 199                 if (r == -EPROBE_DEFER) {
 200                         omapdss_device_put(output);
 201                         goto cleanup;
 202                 } else if (r) {
 203                         dev_warn(output->dev, "could not connect output %s\n",
 204                                  output->name);
 205                 } else {
 206                         struct omap_drm_pipeline *pipe;
 207
 208                         pipe = &priv->pipes[priv->num_pipes++];
 209                         pipe->output = omapdss_device_get(output);
 210                         pipe->display = omapdss_display_get(output);
 211
 212                         if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
 213                                 /* To balance the 'for_each_dss_output' loop */
 214                                 omapdss_device_put(output);
 215                                 break;
 216                         }
 217                 }
 218         }
 219
 220         /* Sort the list by DT aliases */
 221         sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
 222              omap_compare_pipes, NULL);
 223
 224         /*
 225          * Populate the pipeline lookup table by DISPC channel. Only one display
 226          * is allowed per channel.
 227          */
 228         for (i = 0; i < priv->num_pipes; ++i) {
 229                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 230                 enum omap_channel channel = pipe->output->dispc_channel;
 231
 232                 if (WARN_ON(priv->channels[channel] != NULL)) {
 233                         r = -EINVAL;
 234                         goto cleanup;
 235                 }
 236
 237                 priv->channels[channel] = pipe;
 238         }
 239
 240         return 0;
 241
 242 cleanup:
 243         /*
 244          * if we are deferring probe, we disconnect the devices we previously
 245          * connected
 246          */
 247         omap_disconnect_pipelines(ddev);
 248
 249         return r;
 250 }
 251
 252 static int omap_modeset_init_properties(struct drm_device *dev)
 253 {
 254         struct omap_drm_private *priv = dev->dev_private;
 255         unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
 256
 257         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
 258                                                       num_planes - 1);
 259         if (!priv->zorder_prop)
 260                 return -ENOMEM;
 261
 262         return 0;
 263 }
 264
 265 static int omap_modeset_init(struct drm_device *dev)
 266 {
 267         struct omap_drm_private *priv = dev->dev_private;
 268         int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
 269         int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
 270         unsigned int i;
 271         int ret;
 272         u32 plane_crtc_mask;
 273
 274         drm_mode_config_init(dev);
 275
 276         ret = omap_modeset_init_properties(dev);
 277         if (ret < 0)
 278                 return ret;
 279
 280         /*
 281          * This function creates exactly one connector, encoder, crtc,
 282          * and primary plane per each connected dss-device. Each
 283          * connector->encoder->crtc chain is expected to be separate
 284          * and each crtc is connect to a single dss-channel. If the
 285          * configuration does not match the expectations or exceeds
 286          * the available resources, the configuration is rejected.
 287          */
 288         if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
 289                 dev_err(dev->dev, "%s(): Too many connected displays\n",
 290                         __func__);
 291                 return -EINVAL;
 292         }
 293
 294         /* Create all planes first. They can all be put to any CRTC. */
 295         plane_crtc_mask = (1 << priv->num_pipes) - 1;
 296
 297         for (i = 0; i < num_ovls; i++) {
 298                 enum drm_plane_type type = i < priv->num_pipes
 299                                          ? DRM_PLANE_TYPE_PRIMARY
 300                                          : DRM_PLANE_TYPE_OVERLAY;
 301                 struct drm_plane *plane;
 302
 303                 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
 304                         return -EINVAL;
 305
 306                 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
 307                 if (IS_ERR(plane))
 308                         return PTR_ERR(plane);
 309
 310                 priv->planes[priv->num_planes++] = plane;
 311         }
 312
 313         /* Create the CRTCs, encoders and connectors. */
 314         for (i = 0; i < priv->num_pipes; i++) {
 315                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 316                 struct omap_dss_device *display = pipe->display;
 317                 struct drm_connector *connector;
 318                 struct drm_encoder *encoder;
 319                 struct drm_crtc *crtc;
 320
 321                 encoder = omap_encoder_init(dev, display);
 322                 if (!encoder)
 323                         return -ENOMEM;
 324
 325                 connector = omap_connector_init(dev,
 326                                 get_connector_type(display), display, encoder);
 327                 if (!connector)
 328                         return -ENOMEM;
 329
 330                 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
 331                 if (IS_ERR(crtc))
 332                         return PTR_ERR(crtc);
 333
 334                 drm_connector_attach_encoder(connector, encoder);
 335                 encoder->possible_crtcs = 1 << i;
 336
 337                 pipe->crtc = crtc;
 338                 pipe->encoder = encoder;
 339                 pipe->connector = connector;
 340         }
 341
 342         DBG("registered %u planes, %u crtcs/encoders/connectors\n",
 343             priv->num_planes, priv->num_pipes);
 344
 345         dev->mode_config.min_width = 8;
 346         dev->mode_config.min_height = 2;
 347
 348         /*
 349          * Note: these values are used for multiple independent things:
 350          * connector mode filtering, buffer sizes, crtc sizes...
 351          * Use big enough values here to cover all use cases, and do more
 352          * specific checking in the respective code paths.
 353          */
 354         dev->mode_config.max_width = 8192;
 355         dev->mode_config.max_height = 8192;
 356
 357         /* We want the zpos to be normalized */
 358         dev->mode_config.normalize_zpos = true;
 359
 360         dev->mode_config.funcs = &omap_mode_config_funcs;
 361         dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
 362
 363         drm_mode_config_reset(dev);
 364
 365         omap_drm_irq_install(dev);
 366
 367         return 0;
 368 }
 369
 370 /*
 371  * Enable the HPD in external components if supported
 372  */
 373 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
 374 {
 375         struct omap_drm_private *priv = ddev->dev_private;
 376         int i;
 377
 378         for (i = 0; i < priv->num_pipes; i++)
 379                 omap_connector_enable_hpd(priv->pipes[i].connector);
 380 }
 381
 382 /*
 383  * Disable the HPD in external components if supported
 384  */
 385 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
 386 {
 387         struct omap_drm_private *priv = ddev->dev_private;
 388         int i;
 389
 390         for (i = 0; i < priv->num_pipes; i++)
 391                 omap_connector_disable_hpd(priv->pipes[i].connector);
 392 }
 393
 394 /*
 395  * drm ioctl funcs
 396  */
 397
 398
 399 static int ioctl_get_param(struct drm_device *dev, void *data,
 400                 struct drm_file *file_priv)
 401 {
 402         struct omap_drm_private *priv = dev->dev_private;
 403         struct drm_omap_param *args = data;
 404
 405         DBG("%p: param=%llu", dev, args->param);
 406
 407         switch (args->param) {
 408         case OMAP_PARAM_CHIPSET_ID:
 409                 args->value = priv->omaprev;
 410                 break;
 411         default:
 412                 DBG("unknown parameter %lld", args->param);
 413                 return -EINVAL;
 414         }
 415
 416         return 0;
 417 }
 418
 419 static int ioctl_set_param(struct drm_device *dev, void *data,
 420                 struct drm_file *file_priv)
 421 {
 422         struct drm_omap_param *args = data;
 423
 424         switch (args->param) {
 425         default:
 426                 DBG("unknown parameter %lld", args->param);
 427                 return -EINVAL;
 428         }
 429
 430         return 0;
 431 }
 432
 433 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 434
 435 static int ioctl_gem_new(struct drm_device *dev, void *data,
 436                 struct drm_file *file_priv)
 437 {
 438         struct drm_omap_gem_new *args = data;
 439         u32 flags = args->flags & OMAP_BO_USER_MASK;
 440
 441         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 442              args->size.bytes, flags);
 443
 444         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 445                                    &args->handle);
 446 }
 447
 448 static int ioctl_gem_info(struct drm_device *dev, void *data,
 449                 struct drm_file *file_priv)
 450 {
 451         struct drm_omap_gem_info *args = data;
 452         struct drm_gem_object *obj;
 453         int ret = 0;
 454
 455         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 456
 457         obj = drm_gem_object_lookup(file_priv, args->handle);
 458         if (!obj)
 459                 return -ENOENT;
 460
 461         args->size = omap_gem_mmap_size(obj);
 462         args->offset = omap_gem_mmap_offset(obj);
 463
 464         drm_gem_object_unreference_unlocked(obj);
 465
 466         return ret;
 467 }
 468
 469 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 470         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
 471                           DRM_AUTH | DRM_RENDER_ALLOW),
 472         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
 473                           DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
 474         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
 475                           DRM_AUTH | DRM_RENDER_ALLOW),
 476         /* Deprecated, to be removed. */
 477         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
 478                           DRM_AUTH | DRM_RENDER_ALLOW),
 479         /* Deprecated, to be removed. */
 480         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
 481                           DRM_AUTH | DRM_RENDER_ALLOW),
 482         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
 483                           DRM_AUTH | DRM_RENDER_ALLOW),
 484 };
 485
 486 /*
 487  * drm driver funcs
 488  */
 489
 490 static int dev_open(struct drm_device *dev, struct drm_file *file)
 491 {
 492         file->driver_priv = NULL;
 493
 494         DBG("open: dev=%p, file=%p", dev, file);
 495
 496         return 0;
 497 }
 498
 499 static const struct vm_operations_struct omap_gem_vm_ops = {
 500         .fault = omap_gem_fault,
 501         .open = drm_gem_vm_open,
 502         .close = drm_gem_vm_close,
 503 };
 504
 505 static const struct file_operations omapdriver_fops = {
 506         .owner = THIS_MODULE,
 507         .open = drm_open,
 508         .unlocked_ioctl = drm_ioctl,
 509         .compat_ioctl = drm_compat_ioctl,
 510         .release = drm_release,
 511         .mmap = omap_gem_mmap,
 512         .poll = drm_poll,
 513         .read = drm_read,
 514         .llseek = noop_llseek,
 515 };
 516
 517 static struct drm_driver omap_drm_driver = {
 518         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
 519                 DRIVER_ATOMIC | DRIVER_RENDER,
 520         .open = dev_open,
 521         .lastclose = drm_fb_helper_lastclose,
 522 #ifdef CONFIG_DEBUG_FS
 523         .debugfs_init = omap_debugfs_init,
 524 #endif
 525         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 526         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 527         .gem_prime_export = omap_gem_prime_export,
 528         .gem_prime_import = omap_gem_prime_import,
 529         .gem_free_object_unlocked = omap_gem_free_object,
 530         .gem_vm_ops = &omap_gem_vm_ops,
 531         .dumb_create = omap_gem_dumb_create,
 532         .dumb_map_offset = omap_gem_dumb_map_offset,
 533         .ioctls = ioctls,
 534         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 535         .fops = &omapdriver_fops,
 536         .name = DRIVER_NAME,
 537         .desc = DRIVER_DESC,
 538         .date = DRIVER_DATE,
 539         .major = DRIVER_MAJOR,
 540         .minor = DRIVER_MINOR,
 541         .patchlevel = DRIVER_PATCHLEVEL,
 542 };
 543
 544 static const struct soc_device_attribute omapdrm_soc_devices[] = {
 545         { .family = "OMAP3", .data = (void *)0x3430 },
 546         { .family = "OMAP4", .data = (void *)0x4430 },
 547         { .family = "OMAP5", .data = (void *)0x5430 },
 548         { .family = "DRA7",  .data = (void *)0x0752 },
 549         { /* sentinel */ }
 550 };
 551
 552 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
 553 {
 554         const struct soc_device_attribute *soc;
 555         struct drm_device *ddev;
 556         unsigned int i;
 557         int ret;
 558
 559         DBG("%s", dev_name(dev));
 560
 561         /* Allocate and initialize the DRM device. */
 562         ddev = drm_dev_alloc(&omap_drm_driver, dev);
 563         if (IS_ERR(ddev))
 564                 return PTR_ERR(ddev);
 565
 566         priv->ddev = ddev;
 567         ddev->dev_private = priv;
 568
 569         priv->dev = dev;
 570         priv->dss = omapdss_get_dss();
 571         priv->dispc = dispc_get_dispc(priv->dss);
 572         priv->dispc_ops = dispc_get_ops(priv->dss);
 573
 574         omap_crtc_pre_init(priv);
 575
 576         ret = omap_connect_pipelines(ddev);
 577         if (ret)
 578                 goto err_crtc_uninit;
 579
 580         soc = soc_device_match(omapdrm_soc_devices);
 581         priv->omaprev = soc ? (unsigned int)soc->data : 0;
 582         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 583
 584         mutex_init(&priv->list_lock);
 585         INIT_LIST_HEAD(&priv->obj_list);
 586
 587         /* Get memory bandwidth limits */
 588         if (priv->dispc_ops->get_memory_bandwidth_limit)
 589                 priv->max_bandwidth =
 590                         priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
 591
 592         omap_gem_init(ddev);
 593
 594         ret = omap_modeset_init(ddev);
 595         if (ret) {
 596                 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
 597                 goto err_gem_deinit;
 598         }
 599
 600         /* Initialize vblank handling, start with all CRTCs disabled. */
 601         ret = drm_vblank_init(ddev, priv->num_pipes);
 602         if (ret) {
 603                 dev_err(priv->dev, "could not init vblank\n");
 604                 goto err_cleanup_modeset;
 605         }
 606
 607         for (i = 0; i < priv->num_pipes; i++)
 608                 drm_crtc_vblank_off(priv->pipes[i].crtc);
 609
 610         omap_fbdev_init(ddev);
 611
 612         drm_kms_helper_poll_init(ddev);
 613         omap_modeset_enable_external_hpd(ddev);
 614
 615         /*
 616          * Register the DRM device with the core and the connectors with
 617          * sysfs.
 618          */
 619         ret = drm_dev_register(ddev, 0);
 620         if (ret)
 621                 goto err_cleanup_helpers;
 622
 623         return 0;
 624
 625 err_cleanup_helpers:
 626         omap_modeset_disable_external_hpd(ddev);
 627         drm_kms_helper_poll_fini(ddev);
 628
 629         omap_fbdev_fini(ddev);
 630 err_cleanup_modeset:
 631         drm_mode_config_cleanup(ddev);
 632         omap_drm_irq_uninstall(ddev);
 633 err_gem_deinit:
 634         omap_gem_deinit(ddev);
 635         destroy_workqueue(priv->wq);
 636         omap_disconnect_pipelines(ddev);
 637 err_crtc_uninit:
 638         omap_crtc_pre_uninit(priv);
 639         drm_dev_unref(ddev);
 640         return ret;
 641 }
 642
 643 static void omapdrm_cleanup(struct omap_drm_private *priv)
 644 {
 645         struct drm_device *ddev = priv->ddev;
 646
 647         DBG("");
 648
 649         drm_dev_unregister(ddev);
 650
 651         omap_modeset_disable_external_hpd(ddev);
 652         drm_kms_helper_poll_fini(ddev);
 653
 654         omap_fbdev_fini(ddev);
 655
 656         drm_atomic_helper_shutdown(ddev);
 657
 658         drm_mode_config_cleanup(ddev);
 659
 660         omap_drm_irq_uninstall(ddev);
 661         omap_gem_deinit(ddev);
 662
 663         destroy_workqueue(priv->wq);
 664
 665         omap_disconnect_pipelines(ddev);
 666         omap_crtc_pre_uninit(priv);
 667
 668         drm_dev_unref(ddev);
 669 }
 670
 671 static int pdev_probe(struct platform_device *pdev)
 672 {
 673         struct omap_drm_private *priv;
 674         int ret;
 675
 676         if (omapdss_is_initialized() == false)
 677                 return -EPROBE_DEFER;
 678
 679         ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
 680         if (ret) {
 681                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
 682                 return ret;
 683         }
 684
 685         /* Allocate and initialize the driver private structure. */
 686         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 687         if (!priv)
 688                 return -ENOMEM;
 689
 690         platform_set_drvdata(pdev, priv);
 691
 692         ret = omapdrm_init(priv, &pdev->dev);
 693         if (ret < 0)
 694                 kfree(priv);
 695
 696         return ret;
 697 }
 698
 699 static int pdev_remove(struct platform_device *pdev)
 700 {
 701         struct omap_drm_private *priv = platform_get_drvdata(pdev);
 702
 703         omapdrm_cleanup(priv);
 704         kfree(priv);
 705
 706         return 0;
 707 }
 708
 709 #ifdef CONFIG_PM_SLEEP
 710 static int omap_drm_suspend_all_displays(struct drm_device *ddev)
 711 {
 712         struct omap_drm_private *priv = ddev->dev_private;
 713         int i;
 714
 715         for (i = 0; i < priv->num_pipes; i++) {
 716                 struct omap_dss_device *display = priv->pipes[i].display;
 717
 718                 if (display->state == OMAP_DSS_DISPLAY_ACTIVE) {
 719                         display->ops->disable(display);
 720                         display->activate_after_resume = true;
 721                 } else {
 722                         display->activate_after_resume = false;
 723                 }
 724         }
 725
 726         return 0;
 727 }
 728
 729 static int omap_drm_resume_all_displays(struct drm_device *ddev)
 730 {
 731         struct omap_drm_private *priv = ddev->dev_private;
 732         int i;
 733
 734         for (i = 0; i < priv->num_pipes; i++) {
 735                 struct omap_dss_device *display = priv->pipes[i].display;
 736
 737                 if (display->activate_after_resume) {
 738                         display->ops->enable(display);
 739                         display->activate_after_resume = false;
 740                 }
 741         }
 742
 743         return 0;
 744 }
 745
 746 static int omap_drm_suspend(struct device *dev)
 747 {
 748         struct omap_drm_private *priv = dev_get_drvdata(dev);
 749         struct drm_device *drm_dev = priv->ddev;
 750
 751         drm_kms_helper_poll_disable(drm_dev);
 752
 753         drm_modeset_lock_all(drm_dev);
 754         omap_drm_suspend_all_displays(drm_dev);
 755         drm_modeset_unlock_all(drm_dev);
 756
 757         return 0;
 758 }
 759
 760 static int omap_drm_resume(struct device *dev)
 761 {
 762         struct omap_drm_private *priv = dev_get_drvdata(dev);
 763         struct drm_device *drm_dev = priv->ddev;
 764
 765         drm_modeset_lock_all(drm_dev);
 766         omap_drm_resume_all_displays(drm_dev);
 767         drm_modeset_unlock_all(drm_dev);
 768
 769         drm_kms_helper_poll_enable(drm_dev);
 770
 771         return omap_gem_resume(drm_dev);
 772 }
 773 #endif
 774
 775 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 776
 777 static struct platform_driver pdev = {
 778         .driver = {
 779                 .name = "omapdrm",
 780                 .pm = &omapdrm_pm_ops,
 781         },
 782         .probe = pdev_probe,
 783         .remove = pdev_remove,
 784 };
 785
 786 static struct platform_driver * const drivers[] = {
 787         &omap_dmm_driver,
 788         &pdev,
 789 };
 790
 791 static int __init omap_drm_init(void)
 792 {
 793         DBG("init");
 794
 795         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 796 }
 797
 798 static void __exit omap_drm_fini(void)
 799 {
 800         DBG("fini");
 801
 802         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 803 }
 804
 805 /* need late_initcall() so we load after dss_driver's are loaded */
 806 late_initcall(omap_drm_init);
 807 module_exit(omap_drm_fini);
 808
 809 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 810 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 811 MODULE_ALIAS("platform:" DRIVER_NAME);
 812 MODULE_LICENSE("GPL v2");