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20 * DEALINGS IN THE SOFTWARE.
26 #include <core/gpuobj.h>
29 * r367 ACR: new LS signature format requires a rewrite of LS firmware and
30 * blob creation functions. Also the hsflcn_desc layout has changed slightly.
33 #define LSF_LSB_DEPMAP_SIZE 11
36 * struct acr_r367_lsf_lsb_header - LS firmware header
38 * See also struct acr_r352_lsf_lsb_header for documentation.
40 struct acr_r367_lsf_lsb_header {
42 * LS falcon signatures
43 * @prd_keys: signature to use in production mode
44 * @dgb_keys: signature to use in debug mode
45 * @b_prd_present: whether the production key is present
46 * @b_dgb_present: whether the debug key is present
47 * @falcon_id: ID of the falcon the ucode applies to
55 u32 supports_versioning;
58 u8 depmap[LSF_LSB_DEPMAP_SIZE * 2 * 4];
76 * struct acr_r367_lsf_wpr_header - LS blob WPR Header
78 * See also struct acr_r352_lsf_wpr_header for documentation.
80 struct acr_r367_lsf_wpr_header {
87 #define LSF_IMAGE_STATUS_NONE 0
88 #define LSF_IMAGE_STATUS_COPY 1
89 #define LSF_IMAGE_STATUS_VALIDATION_CODE_FAILED 2
90 #define LSF_IMAGE_STATUS_VALIDATION_DATA_FAILED 3
91 #define LSF_IMAGE_STATUS_VALIDATION_DONE 4
92 #define LSF_IMAGE_STATUS_VALIDATION_SKIPPED 5
93 #define LSF_IMAGE_STATUS_BOOTSTRAP_READY 6
94 #define LSF_IMAGE_STATUS_REVOCATION_CHECK_FAILED 7
98 * struct ls_ucode_img_r367 - ucode image augmented with r367 headers
100 struct ls_ucode_img_r367 {
101 struct ls_ucode_img base;
103 struct acr_r367_lsf_wpr_header wpr_header;
104 struct acr_r367_lsf_lsb_header lsb_header;
106 #define ls_ucode_img_r367(i) container_of(i, struct ls_ucode_img_r367, base)
108 struct ls_ucode_img *
109 acr_r367_ls_ucode_img_load(const struct acr_r352 *acr,
110 enum nvkm_secboot_falcon falcon_id)
112 const struct nvkm_subdev *subdev = acr->base.subdev;
113 struct ls_ucode_img_r367 *img;
116 img = kzalloc(sizeof(*img), GFP_KERNEL);
118 return ERR_PTR(-ENOMEM);
120 img->base.falcon_id = falcon_id;
122 ret = acr->func->ls_func[falcon_id]->load(subdev, &img->base);
124 kfree(img->base.ucode_data);
125 kfree(img->base.sig);
130 /* Check that the signature size matches our expectations... */
131 if (img->base.sig_size != sizeof(img->lsb_header.signature)) {
132 nvkm_error(subdev, "invalid signature size for %s falcon!\n",
133 nvkm_secboot_falcon_name[falcon_id]);
134 return ERR_PTR(-EINVAL);
137 /* Copy signature to the right place */
138 memcpy(&img->lsb_header.signature, img->base.sig, img->base.sig_size);
140 /* not needed? the signature should already have the right value */
141 img->lsb_header.signature.falcon_id = falcon_id;
146 #define LSF_LSB_HEADER_ALIGN 256
147 #define LSF_BL_DATA_ALIGN 256
148 #define LSF_BL_DATA_SIZE_ALIGN 256
149 #define LSF_BL_CODE_SIZE_ALIGN 256
150 #define LSF_UCODE_DATA_ALIGN 4096
153 acr_r367_ls_img_fill_headers(struct acr_r352 *acr,
154 struct ls_ucode_img_r367 *img, u32 offset)
156 struct ls_ucode_img *_img = &img->base;
157 struct acr_r367_lsf_wpr_header *whdr = &img->wpr_header;
158 struct acr_r367_lsf_lsb_header *lhdr = &img->lsb_header;
159 struct ls_ucode_img_desc *desc = &_img->ucode_desc;
160 const struct acr_r352_ls_func *func =
161 acr->func->ls_func[_img->falcon_id];
163 /* Fill WPR header */
164 whdr->falcon_id = _img->falcon_id;
165 whdr->bootstrap_owner = acr->base.boot_falcon;
166 whdr->bin_version = lhdr->signature.version;
167 whdr->status = LSF_IMAGE_STATUS_COPY;
169 /* Skip bootstrapping falcons started by someone else than ACR */
170 if (acr->lazy_bootstrap & BIT(_img->falcon_id))
171 whdr->lazy_bootstrap = 1;
173 /* Align, save off, and include an LSB header size */
174 offset = ALIGN(offset, LSF_LSB_HEADER_ALIGN);
175 whdr->lsb_offset = offset;
176 offset += sizeof(*lhdr);
179 * Align, save off, and include the original (static) ucode
182 offset = ALIGN(offset, LSF_UCODE_DATA_ALIGN);
183 _img->ucode_off = lhdr->ucode_off = offset;
184 offset += _img->ucode_size;
187 * For falcons that use a boot loader (BL), we append a loader
188 * desc structure on the end of the ucode image and consider
189 * this the boot loader data. The host will then copy the loader
190 * desc args to this space within the WPR region (before locking
191 * down) and the HS bin will then copy them to DMEM 0 for the
194 lhdr->bl_code_size = ALIGN(desc->bootloader_size,
195 LSF_BL_CODE_SIZE_ALIGN);
196 lhdr->ucode_size = ALIGN(desc->app_resident_data_offset,
197 LSF_BL_CODE_SIZE_ALIGN) + lhdr->bl_code_size;
198 lhdr->data_size = ALIGN(desc->app_size, LSF_BL_CODE_SIZE_ALIGN) +
199 lhdr->bl_code_size - lhdr->ucode_size;
201 * Though the BL is located at 0th offset of the image, the VA
202 * is different to make sure that it doesn't collide the actual
205 lhdr->bl_imem_off = desc->bootloader_imem_offset;
206 lhdr->app_code_off = desc->app_start_offset +
207 desc->app_resident_code_offset;
208 lhdr->app_code_size = desc->app_resident_code_size;
209 lhdr->app_data_off = desc->app_start_offset +
210 desc->app_resident_data_offset;
211 lhdr->app_data_size = desc->app_resident_data_size;
213 lhdr->flags = func->lhdr_flags;
214 if (_img->falcon_id == acr->base.boot_falcon)
215 lhdr->flags |= LSF_FLAG_DMACTL_REQ_CTX;
217 /* Align and save off BL descriptor size */
218 lhdr->bl_data_size = ALIGN(func->bl_desc_size, LSF_BL_DATA_SIZE_ALIGN);
221 * Align, save off, and include the additional BL data
223 offset = ALIGN(offset, LSF_BL_DATA_ALIGN);
224 lhdr->bl_data_off = offset;
225 offset += lhdr->bl_data_size;
231 acr_r367_ls_fill_headers(struct acr_r352 *acr, struct list_head *imgs)
233 struct ls_ucode_img_r367 *img;
238 /* Count the number of images to manage */
239 list_for_each(l, imgs)
243 * Start with an array of WPR headers at the base of the WPR.
244 * The expectation here is that the secure falcon will do a single DMA
245 * read of this array and cache it internally so it's ok to pack these.
246 * Also, we add 1 to the falcon count to indicate the end of the array.
248 offset = sizeof(img->wpr_header) * (count + 1);
251 * Walk the managed falcons, accounting for the LSB structs
252 * as well as the ucode images.
254 list_for_each_entry(img, imgs, base.node) {
255 offset = acr_r367_ls_img_fill_headers(acr, img, offset);
262 acr_r367_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs,
263 struct nvkm_gpuobj *wpr_blob, u64 wpr_addr)
265 struct ls_ucode_img *_img;
270 list_for_each_entry(_img, imgs, node) {
271 struct ls_ucode_img_r367 *img = ls_ucode_img_r367(_img);
272 const struct acr_r352_ls_func *ls_func =
273 acr->func->ls_func[_img->falcon_id];
274 u8 gdesc[ls_func->bl_desc_size];
276 nvkm_gpuobj_memcpy_to(wpr_blob, pos, &img->wpr_header,
277 sizeof(img->wpr_header));
279 nvkm_gpuobj_memcpy_to(wpr_blob, img->wpr_header.lsb_offset,
280 &img->lsb_header, sizeof(img->lsb_header));
282 /* Generate and write BL descriptor */
283 memset(gdesc, 0, ls_func->bl_desc_size);
284 ls_func->generate_bl_desc(&acr->base, _img, wpr_addr, gdesc);
286 nvkm_gpuobj_memcpy_to(wpr_blob, img->lsb_header.bl_data_off,
287 gdesc, ls_func->bl_desc_size);
290 nvkm_gpuobj_memcpy_to(wpr_blob, img->lsb_header.ucode_off,
291 _img->ucode_data, _img->ucode_size);
293 pos += sizeof(img->wpr_header);
296 nvkm_wo32(wpr_blob, pos, NVKM_SECBOOT_FALCON_INVALID);
303 struct acr_r367_hsflcn_desc {
304 u8 reserved_dmem[0x200];
308 u32 mmu_memory_range;
309 #define FLCN_ACR_MAX_REGIONS 2
319 u32 shadow_mem_start_addr;
320 } region_props[FLCN_ACR_MAX_REGIONS];
323 u64 ucode_blob_base __aligned(8);
333 acr_r367_fixup_hs_desc(struct acr_r352 *acr, struct nvkm_secboot *sb,
336 struct acr_r367_hsflcn_desc *desc = _desc;
337 struct nvkm_gpuobj *ls_blob = acr->ls_blob;
339 /* WPR region information if WPR is not fixed */
340 if (sb->wpr_size == 0) {
341 u64 wpr_start = ls_blob->addr;
342 u64 wpr_end = ls_blob->addr + ls_blob->size;
344 if (acr->func->shadow_blob)
345 wpr_start += ls_blob->size / 2;
347 desc->wpr_region_id = 1;
348 desc->regions.no_regions = 2;
349 desc->regions.region_props[0].start_addr = wpr_start >> 8;
350 desc->regions.region_props[0].end_addr = wpr_end >> 8;
351 desc->regions.region_props[0].region_id = 1;
352 desc->regions.region_props[0].read_mask = 0xf;
353 desc->regions.region_props[0].write_mask = 0xc;
354 desc->regions.region_props[0].client_mask = 0x2;
355 if (acr->func->shadow_blob)
356 desc->regions.region_props[0].shadow_mem_start_addr =
359 desc->regions.region_props[0].shadow_mem_start_addr = 0;
361 desc->ucode_blob_base = ls_blob->addr;
362 desc->ucode_blob_size = ls_blob->size;
366 const struct acr_r352_func
368 .fixup_hs_desc = acr_r367_fixup_hs_desc,
369 .generate_hs_bl_desc = acr_r361_generate_hs_bl_desc,
370 .hs_bl_desc_size = sizeof(struct acr_r361_flcn_bl_desc),
372 .ls_ucode_img_load = acr_r367_ls_ucode_img_load,
373 .ls_fill_headers = acr_r367_ls_fill_headers,
374 .ls_write_wpr = acr_r367_ls_write_wpr,
376 [NVKM_SECBOOT_FALCON_FECS] = &acr_r361_ls_fecs_func,
377 [NVKM_SECBOOT_FALCON_GPCCS] = &acr_r361_ls_gpccs_func,
378 [NVKM_SECBOOT_FALCON_PMU] = &acr_r361_ls_pmu_func,
379 [NVKM_SECBOOT_FALCON_SEC2] = &acr_r361_ls_sec2_func,
384 acr_r367_new(enum nvkm_secboot_falcon boot_falcon,
385 unsigned long managed_falcons)
387 return acr_r352_new_(&acr_r367_func, boot_falcon, managed_falcons);