drivers/gpu/drm/nouveau/nouveau_bo.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29
  30 #include <linux/dma-mapping.h>
  31 #include <linux/swiotlb.h>
  32
  33 #include "nouveau_drv.h"
  34 #include "nouveau_chan.h"
  35 #include "nouveau_fence.h"
  36
  37 #include "nouveau_bo.h"
  38 #include "nouveau_ttm.h"
  39 #include "nouveau_gem.h"
  40 #include "nouveau_mem.h"
  41 #include "nouveau_vmm.h"
  42
  43 #include <nvif/class.h>
  44 #include <nvif/if500b.h>
  45 #include <nvif/if900b.h>
  46
  47 /*
  48  * NV10-NV40 tiling helpers
  49  */
  50
  51 static void
  52 nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
  53                            u32 addr, u32 size, u32 pitch, u32 flags)
  54 {
  55         struct nouveau_drm *drm = nouveau_drm(dev);
  56         int i = reg - drm->tile.reg;
  57         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
  58         struct nvkm_fb_tile *tile = &fb->tile.region[i];
  59
  60         nouveau_fence_unref(&reg->fence);
  61
  62         if (tile->pitch)
  63                 nvkm_fb_tile_fini(fb, i, tile);
  64
  65         if (pitch)
  66                 nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile);
  67
  68         nvkm_fb_tile_prog(fb, i, tile);
  69 }
  70
  71 static struct nouveau_drm_tile *
  72 nv10_bo_get_tile_region(struct drm_device *dev, int i)
  73 {
  74         struct nouveau_drm *drm = nouveau_drm(dev);
  75         struct nouveau_drm_tile *tile = &drm->tile.reg[i];
  76
  77         spin_lock(&drm->tile.lock);
  78
  79         if (!tile->used &&
  80             (!tile->fence || nouveau_fence_done(tile->fence)))
  81                 tile->used = true;
  82         else
  83                 tile = NULL;
  84
  85         spin_unlock(&drm->tile.lock);
  86         return tile;
  87 }
  88
  89 static void
  90 nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
  91                         struct dma_fence *fence)
  92 {
  93         struct nouveau_drm *drm = nouveau_drm(dev);
  94
  95         if (tile) {
  96                 spin_lock(&drm->tile.lock);
  97                 tile->fence = (struct nouveau_fence *)dma_fence_get(fence);
  98                 tile->used = false;
  99                 spin_unlock(&drm->tile.lock);
 100         }
 101 }
 102
 103 static struct nouveau_drm_tile *
 104 nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
 105                    u32 size, u32 pitch, u32 zeta)
 106 {
 107         struct nouveau_drm *drm = nouveau_drm(dev);
 108         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
 109         struct nouveau_drm_tile *tile, *found = NULL;
 110         int i;
 111
 112         for (i = 0; i < fb->tile.regions; i++) {
 113                 tile = nv10_bo_get_tile_region(dev, i);
 114
 115                 if (pitch && !found) {
 116                         found = tile;
 117                         continue;
 118
 119                 } else if (tile && fb->tile.region[i].pitch) {
 120                         /* Kill an unused tile region. */
 121                         nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
 122                 }
 123
 124                 nv10_bo_put_tile_region(dev, tile, NULL);
 125         }
 126
 127         if (found)
 128                 nv10_bo_update_tile_region(dev, found, addr, size, pitch, zeta);
 129         return found;
 130 }
 131
 132 static void
 133 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 134 {
 135         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 136         struct drm_device *dev = drm->dev;
 137         struct nouveau_bo *nvbo = nouveau_bo(bo);
 138
 139         WARN_ON(nvbo->pin_refcnt > 0);
 140         nouveau_bo_del_io_reserve_lru(bo);
 141         nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
 142
 143         /*
 144          * If nouveau_bo_new() allocated this buffer, the GEM object was never
 145          * initialized, so don't attempt to release it.
 146          */
 147         if (bo->base.dev)
 148                 drm_gem_object_release(&bo->base);
 149
 150         kfree(nvbo);
 151 }
 152
 153 static inline u64
 154 roundup_64(u64 x, u32 y)
 155 {
 156         x += y - 1;
 157         do_div(x, y);
 158         return x * y;
 159 }
 160
 161 static void
 162 nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
 163                        int *align, u64 *size)
 164 {
 165         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 166         struct nvif_device *device = &drm->client.device;
 167
 168         if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
 169                 if (nvbo->mode) {
 170                         if (device->info.chipset >= 0x40) {
 171                                 *align = 65536;
 172                                 *size = roundup_64(*size, 64 * nvbo->mode);
 173
 174                         } else if (device->info.chipset >= 0x30) {
 175                                 *align = 32768;
 176                                 *size = roundup_64(*size, 64 * nvbo->mode);
 177
 178                         } else if (device->info.chipset >= 0x20) {
 179                                 *align = 16384;
 180                                 *size = roundup_64(*size, 64 * nvbo->mode);
 181
 182                         } else if (device->info.chipset >= 0x10) {
 183                                 *align = 16384;
 184                                 *size = roundup_64(*size, 32 * nvbo->mode);
 185                         }
 186                 }
 187         } else {
 188                 *size = roundup_64(*size, (1 << nvbo->page));
 189                 *align = max((1 <<  nvbo->page), *align);
 190         }
 191
 192         *size = roundup_64(*size, PAGE_SIZE);
 193 }
 194
 195 struct nouveau_bo *
 196 nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 flags,
 197                  u32 tile_mode, u32 tile_flags)
 198 {
 199         struct nouveau_drm *drm = cli->drm;
 200         struct nouveau_bo *nvbo;
 201         struct nvif_mmu *mmu = &cli->mmu;
 202         struct nvif_vmm *vmm = cli->svm.cli ? &cli->svm.vmm : &cli->vmm.vmm;
 203         int i, pi = -1;
 204
 205         if (!*size) {
 206                 NV_WARN(drm, "skipped size %016llx\n", *size);
 207                 return ERR_PTR(-EINVAL);
 208         }
 209
 210         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
 211         if (!nvbo)
 212                 return ERR_PTR(-ENOMEM);
 213         INIT_LIST_HEAD(&nvbo->head);
 214         INIT_LIST_HEAD(&nvbo->entry);
 215         INIT_LIST_HEAD(&nvbo->vma_list);
 216         nvbo->bo.bdev = &drm->ttm.bdev;
 217
 218         /* This is confusing, and doesn't actually mean we want an uncached
 219          * mapping, but is what NOUVEAU_GEM_DOMAIN_COHERENT gets translated
 220          * into in nouveau_gem_new().
 221          */
 222         if (flags & TTM_PL_FLAG_UNCACHED) {
 223                 /* Determine if we can get a cache-coherent map, forcing
 224                  * uncached mapping if we can't.
 225                  */
 226                 if (!nouveau_drm_use_coherent_gpu_mapping(drm))
 227                         nvbo->force_coherent = true;
 228         }
 229
 230         if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) {
 231                 nvbo->kind = (tile_flags & 0x0000ff00) >> 8;
 232                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 233                         kfree(nvbo);
 234                         return ERR_PTR(-EINVAL);
 235                 }
 236
 237                 nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind;
 238         } else
 239         if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 240                 nvbo->kind = (tile_flags & 0x00007f00) >> 8;
 241                 nvbo->comp = (tile_flags & 0x00030000) >> 16;
 242                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 243                         kfree(nvbo);
 244                         return ERR_PTR(-EINVAL);
 245                 }
 246         } else {
 247                 nvbo->zeta = (tile_flags & 0x00000007);
 248         }
 249         nvbo->mode = tile_mode;
 250         nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG);
 251
 252         /* Determine the desirable target GPU page size for the buffer. */
 253         for (i = 0; i < vmm->page_nr; i++) {
 254                 /* Because we cannot currently allow VMM maps to fail
 255                  * during buffer migration, we need to determine page
 256                  * size for the buffer up-front, and pre-allocate its
 257                  * page tables.
 258                  *
 259                  * Skip page sizes that can't support needed domains.
 260                  */
 261                 if (cli->device.info.family > NV_DEVICE_INFO_V0_CURIE &&
 262                     (flags & TTM_PL_FLAG_VRAM) && !vmm->page[i].vram)
 263                         continue;
 264                 if ((flags & TTM_PL_FLAG_TT) &&
 265                     (!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))
 266                         continue;
 267
 268                 /* Select this page size if it's the first that supports
 269                  * the potential memory domains, or when it's compatible
 270                  * with the requested compression settings.
 271                  */
 272                 if (pi < 0 || !nvbo->comp || vmm->page[i].comp)
 273                         pi = i;
 274
 275                 /* Stop once the buffer is larger than the current page size. */
 276                 if (*size >= 1ULL << vmm->page[i].shift)
 277                         break;
 278         }
 279
 280         if (WARN_ON(pi < 0))
 281                 return ERR_PTR(-EINVAL);
 282
 283         /* Disable compression if suitable settings couldn't be found. */
 284         if (nvbo->comp && !vmm->page[pi].comp) {
 285                 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100)
 286                         nvbo->kind = mmu->kind[nvbo->kind];
 287                 nvbo->comp = 0;
 288         }
 289         nvbo->page = vmm->page[pi].shift;
 290
 291         nouveau_bo_fixup_align(nvbo, flags, align, size);
 292
 293         return nvbo;
 294 }
 295
 296 int
 297 nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 flags,
 298                 struct sg_table *sg, struct dma_resv *robj)
 299 {
 300         int type = sg ? ttm_bo_type_sg : ttm_bo_type_device;
 301         size_t acc_size;
 302         int ret;
 303
 304         acc_size = ttm_bo_dma_acc_size(nvbo->bo.bdev, size, sizeof(*nvbo));
 305
 306         nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
 307         nouveau_bo_placement_set(nvbo, flags, 0);
 308         INIT_LIST_HEAD(&nvbo->io_reserve_lru);
 309
 310         ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type,
 311                           &nvbo->placement, align >> PAGE_SHIFT, false,
 312                           acc_size, sg, robj, nouveau_bo_del_ttm);
 313         if (ret) {
 314                 /* ttm will call nouveau_bo_del_ttm if it fails.. */
 315                 return ret;
 316         }
 317
 318         return 0;
 319 }
 320
 321 int
 322 nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
 323                uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
 324                struct sg_table *sg, struct dma_resv *robj,
 325                struct nouveau_bo **pnvbo)
 326 {
 327         struct nouveau_bo *nvbo;
 328         int ret;
 329
 330         nvbo = nouveau_bo_alloc(cli, &size, &align, flags, tile_mode,
 331                                 tile_flags);
 332         if (IS_ERR(nvbo))
 333                 return PTR_ERR(nvbo);
 334
 335         ret = nouveau_bo_init(nvbo, size, align, flags, sg, robj);
 336         if (ret)
 337                 return ret;
 338
 339         *pnvbo = nvbo;
 340         return 0;
 341 }
 342
 343 static void
 344 set_placement_list(struct ttm_place *pl, unsigned *n, uint32_t type, uint32_t flags)
 345 {
 346         *n = 0;
 347
 348         if (type & TTM_PL_FLAG_VRAM)
 349                 pl[(*n)++].flags = TTM_PL_FLAG_VRAM | flags;
 350         if (type & TTM_PL_FLAG_TT)
 351                 pl[(*n)++].flags = TTM_PL_FLAG_TT | flags;
 352         if (type & TTM_PL_FLAG_SYSTEM)
 353                 pl[(*n)++].flags = TTM_PL_FLAG_SYSTEM | flags;
 354 }
 355
 356 static void
 357 set_placement_range(struct nouveau_bo *nvbo, uint32_t type)
 358 {
 359         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 360         u32 vram_pages = drm->client.device.info.ram_size >> PAGE_SHIFT;
 361         unsigned i, fpfn, lpfn;
 362
 363         if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS &&
 364             nvbo->mode && (type & TTM_PL_FLAG_VRAM) &&
 365             nvbo->bo.mem.num_pages < vram_pages / 4) {
 366                 /*
 367                  * Make sure that the color and depth buffers are handled
 368                  * by independent memory controller units. Up to a 9x
 369                  * speed up when alpha-blending and depth-test are enabled
 370                  * at the same time.
 371                  */
 372                 if (nvbo->zeta) {
 373                         fpfn = vram_pages / 2;
 374                         lpfn = ~0;
 375                 } else {
 376                         fpfn = 0;
 377                         lpfn = vram_pages / 2;
 378                 }
 379                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
 380                         nvbo->placements[i].fpfn = fpfn;
 381                         nvbo->placements[i].lpfn = lpfn;
 382                 }
 383                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
 384                         nvbo->busy_placements[i].fpfn = fpfn;
 385                         nvbo->busy_placements[i].lpfn = lpfn;
 386                 }
 387         }
 388 }
 389
 390 void
 391 nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy)
 392 {
 393         struct ttm_placement *pl = &nvbo->placement;
 394         uint32_t flags = (nvbo->force_coherent ? TTM_PL_FLAG_UNCACHED :
 395                                                  TTM_PL_MASK_CACHING) |
 396                          (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0);
 397
 398         pl->placement = nvbo->placements;
 399         set_placement_list(nvbo->placements, &pl->num_placement,
 400                            type, flags);
 401
 402         pl->busy_placement = nvbo->busy_placements;
 403         set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
 404                            type | busy, flags);
 405
 406         set_placement_range(nvbo, type);
 407 }
 408
 409 int
 410 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype, bool contig)
 411 {
 412         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 413         struct ttm_buffer_object *bo = &nvbo->bo;
 414         bool force = false, evict = false;
 415         int ret;
 416
 417         ret = ttm_bo_reserve(bo, false, false, NULL);
 418         if (ret)
 419                 return ret;
 420
 421         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
 422             memtype == TTM_PL_FLAG_VRAM && contig) {
 423                 if (!nvbo->contig) {
 424                         nvbo->contig = true;
 425                         force = true;
 426                         evict = true;
 427                 }
 428         }
 429
 430         if (nvbo->pin_refcnt) {
 431                 if (!(memtype & (1 << bo->mem.mem_type)) || evict) {
 432                         NV_ERROR(drm, "bo %p pinned elsewhere: "
 433                                       "0x%08x vs 0x%08x\n", bo,
 434                                  1 << bo->mem.mem_type, memtype);
 435                         ret = -EBUSY;
 436                 }
 437                 nvbo->pin_refcnt++;
 438                 goto out;
 439         }
 440
 441         if (evict) {
 442                 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT, 0);
 443                 ret = nouveau_bo_validate(nvbo, false, false);
 444                 if (ret)
 445                         goto out;
 446         }
 447
 448         nvbo->pin_refcnt++;
 449         nouveau_bo_placement_set(nvbo, memtype, 0);
 450
 451         /* drop pin_refcnt temporarily, so we don't trip the assertion
 452          * in nouveau_bo_move() that makes sure we're not trying to
 453          * move a pinned buffer
 454          */
 455         nvbo->pin_refcnt--;
 456         ret = nouveau_bo_validate(nvbo, false, false);
 457         if (ret)
 458                 goto out;
 459         nvbo->pin_refcnt++;
 460
 461         switch (bo->mem.mem_type) {
 462         case TTM_PL_VRAM:
 463                 drm->gem.vram_available -= bo->mem.size;
 464                 break;
 465         case TTM_PL_TT:
 466                 drm->gem.gart_available -= bo->mem.size;
 467                 break;
 468         default:
 469                 break;
 470         }
 471
 472 out:
 473         if (force && ret)
 474                 nvbo->contig = false;
 475         ttm_bo_unreserve(bo);
 476         return ret;
 477 }
 478
 479 int
 480 nouveau_bo_unpin(struct nouveau_bo *nvbo)
 481 {
 482         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 483         struct ttm_buffer_object *bo = &nvbo->bo;
 484         int ret, ref;
 485
 486         ret = ttm_bo_reserve(bo, false, false, NULL);
 487         if (ret)
 488                 return ret;
 489
 490         ref = --nvbo->pin_refcnt;
 491         WARN_ON_ONCE(ref < 0);
 492         if (ref)
 493                 goto out;
 494
 495         nouveau_bo_placement_set(nvbo, bo->mem.placement, 0);
 496
 497         ret = nouveau_bo_validate(nvbo, false, false);
 498         if (ret == 0) {
 499                 switch (bo->mem.mem_type) {
 500                 case TTM_PL_VRAM:
 501                         drm->gem.vram_available += bo->mem.size;
 502                         break;
 503                 case TTM_PL_TT:
 504                         drm->gem.gart_available += bo->mem.size;
 505                         break;
 506                 default:
 507                         break;
 508                 }
 509         }
 510
 511 out:
 512         ttm_bo_unreserve(bo);
 513         return ret;
 514 }
 515
 516 int
 517 nouveau_bo_map(struct nouveau_bo *nvbo)
 518 {
 519         int ret;
 520
 521         ret = ttm_bo_reserve(&nvbo->bo, false, false, NULL);
 522         if (ret)
 523                 return ret;
 524
 525         ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
 526
 527         ttm_bo_unreserve(&nvbo->bo);
 528         return ret;
 529 }
 530
 531 void
 532 nouveau_bo_unmap(struct nouveau_bo *nvbo)
 533 {
 534         if (!nvbo)
 535                 return;
 536
 537         ttm_bo_kunmap(&nvbo->kmap);
 538 }
 539
 540 void
 541 nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
 542 {
 543         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 544         struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
 545         int i;
 546
 547         if (!ttm_dma)
 548                 return;
 549
 550         /* Don't waste time looping if the object is coherent */
 551         if (nvbo->force_coherent)
 552                 return;
 553
 554         for (i = 0; i < ttm_dma->ttm.num_pages; i++)
 555                 dma_sync_single_for_device(drm->dev->dev,
 556                                            ttm_dma->dma_address[i],
 557                                            PAGE_SIZE, DMA_TO_DEVICE);
 558 }
 559
 560 void
 561 nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
 562 {
 563         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 564         struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm;
 565         int i;
 566
 567         if (!ttm_dma)
 568                 return;
 569
 570         /* Don't waste time looping if the object is coherent */
 571         if (nvbo->force_coherent)
 572                 return;
 573
 574         for (i = 0; i < ttm_dma->ttm.num_pages; i++)
 575                 dma_sync_single_for_cpu(drm->dev->dev, ttm_dma->dma_address[i],
 576                                         PAGE_SIZE, DMA_FROM_DEVICE);
 577 }
 578
 579 void nouveau_bo_add_io_reserve_lru(struct ttm_buffer_object *bo)
 580 {
 581         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 582         struct nouveau_bo *nvbo = nouveau_bo(bo);
 583
 584         mutex_lock(&drm->ttm.io_reserve_mutex);
 585         list_move_tail(&nvbo->io_reserve_lru, &drm->ttm.io_reserve_lru);
 586         mutex_unlock(&drm->ttm.io_reserve_mutex);
 587 }
 588
 589 void nouveau_bo_del_io_reserve_lru(struct ttm_buffer_object *bo)
 590 {
 591         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 592         struct nouveau_bo *nvbo = nouveau_bo(bo);
 593
 594         mutex_lock(&drm->ttm.io_reserve_mutex);
 595         list_del_init(&nvbo->io_reserve_lru);
 596         mutex_unlock(&drm->ttm.io_reserve_mutex);
 597 }
 598
 599 int
 600 nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
 601                     bool no_wait_gpu)
 602 {
 603         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 604         int ret;
 605
 606         ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, &ctx);
 607         if (ret)
 608                 return ret;
 609
 610         nouveau_bo_sync_for_device(nvbo);
 611
 612         return 0;
 613 }
 614
 615 void
 616 nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
 617 {
 618         bool is_iomem;
 619         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 620
 621         mem += index;
 622
 623         if (is_iomem)
 624                 iowrite16_native(val, (void __force __iomem *)mem);
 625         else
 626                 *mem = val;
 627 }
 628
 629 u32
 630 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
 631 {
 632         bool is_iomem;
 633         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 634
 635         mem += index;
 636
 637         if (is_iomem)
 638                 return ioread32_native((void __force __iomem *)mem);
 639         else
 640                 return *mem;
 641 }
 642
 643 void
 644 nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
 645 {
 646         bool is_iomem;
 647         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 648
 649         mem += index;
 650
 651         if (is_iomem)
 652                 iowrite32_native(val, (void __force __iomem *)mem);
 653         else
 654                 *mem = val;
 655 }
 656
 657 static struct ttm_tt *
 658 nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags)
 659 {
 660 #if IS_ENABLED(CONFIG_AGP)
 661         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 662
 663         if (drm->agp.bridge) {
 664                 return ttm_agp_tt_create(bo, drm->agp.bridge, page_flags);
 665         }
 666 #endif
 667
 668         return nouveau_sgdma_create_ttm(bo, page_flags);
 669 }
 670
 671 static int
 672 nouveau_ttm_tt_bind(struct ttm_bo_device *bdev, struct ttm_tt *ttm,
 673                     struct ttm_resource *reg)
 674 {
 675 #if IS_ENABLED(CONFIG_AGP)
 676         struct nouveau_drm *drm = nouveau_bdev(bdev);
 677
 678         if (drm->agp.bridge)
 679                 return ttm_agp_bind(bdev, ttm, reg);
 680 #endif
 681         return nouveau_sgdma_bind(bdev, ttm, reg);
 682 }
 683
 684 static void
 685 nouveau_ttm_tt_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 686 {
 687 #if IS_ENABLED(CONFIG_AGP)
 688         struct nouveau_drm *drm = nouveau_bdev(bdev);
 689
 690         if (drm->agp.bridge) {
 691                 ttm_agp_unbind(bdev, ttm);
 692                 return;
 693         }
 694 #endif
 695         nouveau_sgdma_unbind(bdev, ttm);
 696 }
 697
 698 static void
 699 nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 700 {
 701         struct nouveau_bo *nvbo = nouveau_bo(bo);
 702
 703         switch (bo->mem.mem_type) {
 704         case TTM_PL_VRAM:
 705                 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT,
 706                                          TTM_PL_FLAG_SYSTEM);
 707                 break;
 708         default:
 709                 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0);
 710                 break;
 711         }
 712
 713         *pl = nvbo->placement;
 714 }
 715
 716 static int
 717 nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
 718                      struct ttm_resource *reg)
 719 {
 720         struct nouveau_mem *old_mem = nouveau_mem(&bo->mem);
 721         struct nouveau_mem *new_mem = nouveau_mem(reg);
 722         struct nvif_vmm *vmm = &drm->client.vmm.vmm;
 723         int ret;
 724
 725         ret = nvif_vmm_get(vmm, LAZY, false, old_mem->mem.page, 0,
 726                            old_mem->mem.size, &old_mem->vma[0]);
 727         if (ret)
 728                 return ret;
 729
 730         ret = nvif_vmm_get(vmm, LAZY, false, new_mem->mem.page, 0,
 731                            new_mem->mem.size, &old_mem->vma[1]);
 732         if (ret)
 733                 goto done;
 734
 735         ret = nouveau_mem_map(old_mem, vmm, &old_mem->vma[0]);
 736         if (ret)
 737                 goto done;
 738
 739         ret = nouveau_mem_map(new_mem, vmm, &old_mem->vma[1]);
 740 done:
 741         if (ret) {
 742                 nvif_vmm_put(vmm, &old_mem->vma[1]);
 743                 nvif_vmm_put(vmm, &old_mem->vma[0]);
 744         }
 745         return 0;
 746 }
 747
 748 static int
 749 nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
 750                      bool no_wait_gpu, struct ttm_resource *new_reg)
 751 {
 752         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 753         struct nouveau_channel *chan = drm->ttm.chan;
 754         struct nouveau_cli *cli = (void *)chan->user.client;
 755         struct nouveau_fence *fence;
 756         int ret;
 757
 758         /* create temporary vmas for the transfer and attach them to the
 759          * old nvkm_mem node, these will get cleaned up after ttm has
 760          * destroyed the ttm_resource
 761          */
 762         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 763                 ret = nouveau_bo_move_prep(drm, bo, new_reg);
 764                 if (ret)
 765                         return ret;
 766         }
 767
 768         mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING);
 769         ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, intr);
 770         if (ret == 0) {
 771                 ret = drm->ttm.move(chan, bo, &bo->mem, new_reg);
 772                 if (ret == 0) {
 773                         ret = nouveau_fence_new(chan, false, &fence);
 774                         if (ret == 0) {
 775                                 ret = ttm_bo_move_accel_cleanup(bo,
 776                                                                 &fence->base,
 777                                                                 evict,
 778                                                                 new_reg);
 779                                 nouveau_fence_unref(&fence);
 780                         }
 781                 }
 782         }
 783         mutex_unlock(&cli->mutex);
 784         return ret;
 785 }
 786
 787 void
 788 nouveau_bo_move_init(struct nouveau_drm *drm)
 789 {
 790         static const struct _method_table {
 791                 const char *name;
 792                 int engine;
 793                 s32 oclass;
 794                 int (*exec)(struct nouveau_channel *,
 795                             struct ttm_buffer_object *,
 796                             struct ttm_resource *, struct ttm_resource *);
 797                 int (*init)(struct nouveau_channel *, u32 handle);
 798         } _methods[] = {
 799                 {  "COPY", 4, 0xc5b5, nve0_bo_move_copy, nve0_bo_move_init },
 800                 {  "GRCE", 0, 0xc5b5, nve0_bo_move_copy, nvc0_bo_move_init },
 801                 {  "COPY", 4, 0xc3b5, nve0_bo_move_copy, nve0_bo_move_init },
 802                 {  "GRCE", 0, 0xc3b5, nve0_bo_move_copy, nvc0_bo_move_init },
 803                 {  "COPY", 4, 0xc1b5, nve0_bo_move_copy, nve0_bo_move_init },
 804                 {  "GRCE", 0, 0xc1b5, nve0_bo_move_copy, nvc0_bo_move_init },
 805                 {  "COPY", 4, 0xc0b5, nve0_bo_move_copy, nve0_bo_move_init },
 806                 {  "GRCE", 0, 0xc0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 807                 {  "COPY", 4, 0xb0b5, nve0_bo_move_copy, nve0_bo_move_init },
 808                 {  "GRCE", 0, 0xb0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 809                 {  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
 810                 {  "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 811                 { "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
 812                 { "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
 813                 {  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
 814                 { "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
 815                 {  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
 816                 {  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
 817                 {  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
 818                 {},
 819         };
 820         const struct _method_table *mthd = _methods;
 821         const char *name = "CPU";
 822         int ret;
 823
 824         do {
 825                 struct nouveau_channel *chan;
 826
 827                 if (mthd->engine)
 828                         chan = drm->cechan;
 829                 else
 830                         chan = drm->channel;
 831                 if (chan == NULL)
 832                         continue;
 833
 834                 ret = nvif_object_ctor(&chan->user, "ttmBoMove",
 835                                        mthd->oclass | (mthd->engine << 16),
 836                                        mthd->oclass, NULL, 0,
 837                                        &drm->ttm.copy);
 838                 if (ret == 0) {
 839                         ret = mthd->init(chan, drm->ttm.copy.handle);
 840                         if (ret) {
 841                                 nvif_object_dtor(&drm->ttm.copy);
 842                                 continue;
 843                         }
 844
 845                         drm->ttm.move = mthd->exec;
 846                         drm->ttm.chan = chan;
 847                         name = mthd->name;
 848                         break;
 849                 }
 850         } while ((++mthd)->exec);
 851
 852         NV_INFO(drm, "MM: using %s for buffer copies\n", name);
 853 }
 854
 855 static int
 856 nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
 857                       bool no_wait_gpu, struct ttm_resource *new_reg)
 858 {
 859         struct ttm_operation_ctx ctx = { intr, no_wait_gpu };
 860         struct ttm_place placement_memtype = {
 861                 .fpfn = 0,
 862                 .lpfn = 0,
 863                 .flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING
 864         };
 865         struct ttm_placement placement;
 866         struct ttm_resource tmp_reg;
 867         int ret;
 868
 869         placement.num_placement = placement.num_busy_placement = 1;
 870         placement.placement = placement.busy_placement = &placement_memtype;
 871
 872         tmp_reg = *new_reg;
 873         tmp_reg.mm_node = NULL;
 874         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, &ctx);
 875         if (ret)
 876                 return ret;
 877
 878         ret = ttm_tt_bind(bo->bdev, bo->ttm, &tmp_reg, &ctx);
 879         if (ret)
 880                 goto out;
 881
 882         ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, &tmp_reg);
 883         if (ret)
 884                 goto out;
 885
 886         ret = ttm_bo_move_ttm(bo, &ctx, new_reg);
 887 out:
 888         ttm_resource_free(bo, &tmp_reg);
 889         return ret;
 890 }
 891
 892 static int
 893 nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
 894                       bool no_wait_gpu, struct ttm_resource *new_reg)
 895 {
 896         struct ttm_operation_ctx ctx = { intr, no_wait_gpu };
 897         struct ttm_place placement_memtype = {
 898                 .fpfn = 0,
 899                 .lpfn = 0,
 900                 .flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING
 901         };
 902         struct ttm_placement placement;
 903         struct ttm_resource tmp_reg;
 904         int ret;
 905
 906         placement.num_placement = placement.num_busy_placement = 1;
 907         placement.placement = placement.busy_placement = &placement_memtype;
 908
 909         tmp_reg = *new_reg;
 910         tmp_reg.mm_node = NULL;
 911         ret = ttm_bo_mem_space(bo, &placement, &tmp_reg, &ctx);
 912         if (ret)
 913                 return ret;
 914
 915         ret = ttm_bo_move_ttm(bo, &ctx, &tmp_reg);
 916         if (ret)
 917                 goto out;
 918
 919         ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, new_reg);
 920         if (ret)
 921                 goto out;
 922
 923 out:
 924         ttm_resource_free(bo, &tmp_reg);
 925         return ret;
 926 }
 927
 928 static void
 929 nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, bool evict,
 930                      struct ttm_resource *new_reg)
 931 {
 932         struct nouveau_mem *mem = new_reg ? nouveau_mem(new_reg) : NULL;
 933         struct nouveau_bo *nvbo = nouveau_bo(bo);
 934         struct nouveau_vma *vma;
 935
 936         /* ttm can now (stupidly) pass the driver bos it didn't create... */
 937         if (bo->destroy != nouveau_bo_del_ttm)
 938                 return;
 939
 940         nouveau_bo_del_io_reserve_lru(bo);
 941
 942         if (mem && new_reg->mem_type != TTM_PL_SYSTEM &&
 943             mem->mem.page == nvbo->page) {
 944                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 945                         nouveau_vma_map(vma, mem);
 946                 }
 947         } else {
 948                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 949                         WARN_ON(ttm_bo_wait(bo, false, false));
 950                         nouveau_vma_unmap(vma);
 951                 }
 952         }
 953
 954         if (new_reg) {
 955                 if (new_reg->mm_node)
 956                         nvbo->offset = (new_reg->start << PAGE_SHIFT);
 957                 else
 958                         nvbo->offset = 0;
 959         }
 960
 961 }
 962
 963 static int
 964 nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_resource *new_reg,
 965                    struct nouveau_drm_tile **new_tile)
 966 {
 967         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 968         struct drm_device *dev = drm->dev;
 969         struct nouveau_bo *nvbo = nouveau_bo(bo);
 970         u64 offset = new_reg->start << PAGE_SHIFT;
 971
 972         *new_tile = NULL;
 973         if (new_reg->mem_type != TTM_PL_VRAM)
 974                 return 0;
 975
 976         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {
 977                 *new_tile = nv10_bo_set_tiling(dev, offset, new_reg->size,
 978                                                nvbo->mode, nvbo->zeta);
 979         }
 980
 981         return 0;
 982 }
 983
 984 static void
 985 nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
 986                       struct nouveau_drm_tile *new_tile,
 987                       struct nouveau_drm_tile **old_tile)
 988 {
 989         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 990         struct drm_device *dev = drm->dev;
 991         struct dma_fence *fence = dma_resv_get_excl(bo->base.resv);
 992
 993         nv10_bo_put_tile_region(dev, *old_tile, fence);
 994         *old_tile = new_tile;
 995 }
 996
 997 static int
 998 nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
 999                 struct ttm_operation_ctx *ctx,
1000                 struct ttm_resource *new_reg)
1001 {
1002         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1003         struct nouveau_bo *nvbo = nouveau_bo(bo);
1004         struct ttm_resource *old_reg = &bo->mem;
1005         struct nouveau_drm_tile *new_tile = NULL;
1006         int ret = 0;
1007
1008         ret = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
1009         if (ret)
1010                 return ret;
1011
1012         if (nvbo->pin_refcnt)
1013                 NV_WARN(drm, "Moving pinned object %p!\n", nvbo);
1014
1015         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1016                 ret = nouveau_bo_vm_bind(bo, new_reg, &new_tile);
1017                 if (ret)
1018                         return ret;
1019         }
1020
1021         /* Fake bo copy. */
1022         if (old_reg->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
1023                 ttm_bo_move_null(bo, new_reg);
1024                 goto out;
1025         }
1026
1027         /* Hardware assisted copy. */
1028         if (drm->ttm.move) {
1029                 if (new_reg->mem_type == TTM_PL_SYSTEM)
1030                         ret = nouveau_bo_move_flipd(bo, evict,
1031                                                     ctx->interruptible,
1032                                                     ctx->no_wait_gpu, new_reg);
1033                 else if (old_reg->mem_type == TTM_PL_SYSTEM)
1034                         ret = nouveau_bo_move_flips(bo, evict,
1035                                                     ctx->interruptible,
1036                                                     ctx->no_wait_gpu, new_reg);
1037                 else
1038                         ret = nouveau_bo_move_m2mf(bo, evict,
1039                                                    ctx->interruptible,
1040                                                    ctx->no_wait_gpu, new_reg);
1041                 if (!ret)
1042                         goto out;
1043         }
1044
1045         /* Fallback to software copy. */
1046         ret = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
1047         if (ret == 0)
1048                 ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
1049
1050 out:
1051         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1052                 if (ret)
1053                         nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
1054                 else
1055                         nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
1056         }
1057
1058         return ret;
1059 }
1060
1061 static int
1062 nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
1063 {
1064         struct nouveau_bo *nvbo = nouveau_bo(bo);
1065
1066         return drm_vma_node_verify_access(&nvbo->bo.base.vma_node,
1067                                           filp->private_data);
1068 }
1069
1070 static void
1071 nouveau_ttm_io_mem_free_locked(struct nouveau_drm *drm,
1072                                struct ttm_resource *reg)
1073 {
1074         struct nouveau_mem *mem = nouveau_mem(reg);
1075
1076         if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1077                 switch (reg->mem_type) {
1078                 case TTM_PL_TT:
1079                         if (mem->kind)
1080                                 nvif_object_unmap_handle(&mem->mem.object);
1081                         break;
1082                 case TTM_PL_VRAM:
1083                         nvif_object_unmap_handle(&mem->mem.object);
1084                         break;
1085                 default:
1086                         break;
1087                 }
1088         }
1089 }
1090
1091 static int
1092 nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1093 {
1094         struct nouveau_drm *drm = nouveau_bdev(bdev);
1095         struct nvkm_device *device = nvxx_device(&drm->client.device);
1096         struct nouveau_mem *mem = nouveau_mem(reg);
1097         int ret;
1098
1099         mutex_lock(&drm->ttm.io_reserve_mutex);
1100 retry:
1101         switch (reg->mem_type) {
1102         case TTM_PL_SYSTEM:
1103                 /* System memory */
1104                 ret = 0;
1105                 goto out;
1106         case TTM_PL_TT:
1107 #if IS_ENABLED(CONFIG_AGP)
1108                 if (drm->agp.bridge) {
1109                         reg->bus.offset = (reg->start << PAGE_SHIFT) +
1110                                 drm->agp.base;
1111                         reg->bus.is_iomem = !drm->agp.cma;
1112                 }
1113 #endif
1114                 if (drm->client.mem->oclass < NVIF_CLASS_MEM_NV50 ||
1115                     !mem->kind) {
1116                         /* untiled */
1117                         ret = 0;
1118                         break;
1119                 }
1120                 fallthrough;    /* tiled memory */
1121         case TTM_PL_VRAM:
1122                 reg->bus.offset = (reg->start << PAGE_SHIFT) +
1123                         device->func->resource_addr(device, 1);
1124                 reg->bus.is_iomem = true;
1125                 if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1126                         union {
1127                                 struct nv50_mem_map_v0 nv50;
1128                                 struct gf100_mem_map_v0 gf100;
1129                         } args;
1130                         u64 handle, length;
1131                         u32 argc = 0;
1132
1133                         switch (mem->mem.object.oclass) {
1134                         case NVIF_CLASS_MEM_NV50:
1135                                 args.nv50.version = 0;
1136                                 args.nv50.ro = 0;
1137                                 args.nv50.kind = mem->kind;
1138                                 args.nv50.comp = mem->comp;
1139                                 argc = sizeof(args.nv50);
1140                                 break;
1141                         case NVIF_CLASS_MEM_GF100:
1142                                 args.gf100.version = 0;
1143                                 args.gf100.ro = 0;
1144                                 args.gf100.kind = mem->kind;
1145                                 argc = sizeof(args.gf100);
1146                                 break;
1147                         default:
1148                                 WARN_ON(1);
1149                                 break;
1150                         }
1151
1152                         ret = nvif_object_map_handle(&mem->mem.object,
1153                                                      &args, argc,
1154                                                      &handle, &length);
1155                         if (ret != 1) {
1156                                 if (WARN_ON(ret == 0))
1157                                         ret = -EINVAL;
1158                                 goto out;
1159                         }
1160
1161                         reg->bus.offset = handle;
1162                         ret = 0;
1163                 }
1164                 break;
1165         default:
1166                 ret = -EINVAL;
1167         }
1168
1169 out:
1170         if (ret == -ENOSPC) {
1171                 struct nouveau_bo *nvbo;
1172
1173                 nvbo = list_first_entry_or_null(&drm->ttm.io_reserve_lru,
1174                                                 typeof(*nvbo),
1175                                                 io_reserve_lru);
1176                 if (nvbo) {
1177                         list_del_init(&nvbo->io_reserve_lru);
1178                         drm_vma_node_unmap(&nvbo->bo.base.vma_node,
1179                                            bdev->dev_mapping);
1180                         nouveau_ttm_io_mem_free_locked(drm, &nvbo->bo.mem);
1181                         goto retry;
1182                 }
1183
1184         }
1185         mutex_unlock(&drm->ttm.io_reserve_mutex);
1186         return ret;
1187 }
1188
1189 static void
1190 nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_resource *reg)
1191 {
1192         struct nouveau_drm *drm = nouveau_bdev(bdev);
1193
1194         mutex_lock(&drm->ttm.io_reserve_mutex);
1195         nouveau_ttm_io_mem_free_locked(drm, reg);
1196         mutex_unlock(&drm->ttm.io_reserve_mutex);
1197 }
1198
1199 static int
1200 nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
1201 {
1202         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1203         struct nouveau_bo *nvbo = nouveau_bo(bo);
1204         struct nvkm_device *device = nvxx_device(&drm->client.device);
1205         u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
1206         int i, ret;
1207
1208         /* as long as the bo isn't in vram, and isn't tiled, we've got
1209          * nothing to do here.
1210          */
1211         if (bo->mem.mem_type != TTM_PL_VRAM) {
1212                 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA ||
1213                     !nvbo->kind)
1214                         return 0;
1215
1216                 if (bo->mem.mem_type == TTM_PL_SYSTEM) {
1217                         nouveau_bo_placement_set(nvbo, TTM_PL_TT, 0);
1218
1219                         ret = nouveau_bo_validate(nvbo, false, false);
1220                         if (ret)
1221                                 return ret;
1222                 }
1223                 return 0;
1224         }
1225
1226         /* make sure bo is in mappable vram */
1227         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
1228             bo->mem.start + bo->mem.num_pages < mappable)
1229                 return 0;
1230
1231         for (i = 0; i < nvbo->placement.num_placement; ++i) {
1232                 nvbo->placements[i].fpfn = 0;
1233                 nvbo->placements[i].lpfn = mappable;
1234         }
1235
1236         for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
1237                 nvbo->busy_placements[i].fpfn = 0;
1238                 nvbo->busy_placements[i].lpfn = mappable;
1239         }
1240
1241         nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0);
1242         return nouveau_bo_validate(nvbo, false, false);
1243 }
1244
1245 static int
1246 nouveau_ttm_tt_populate(struct ttm_bo_device *bdev,
1247                         struct ttm_tt *ttm, struct ttm_operation_ctx *ctx)
1248 {
1249         struct ttm_dma_tt *ttm_dma = (void *)ttm;
1250         struct nouveau_drm *drm;
1251         struct device *dev;
1252         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1253
1254         if (ttm->state != tt_unpopulated)
1255                 return 0;
1256
1257         if (slave && ttm->sg) {
1258                 /* make userspace faulting work */
1259                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
1260                                                  ttm_dma->dma_address, ttm->num_pages);
1261                 ttm->state = tt_unbound;
1262                 return 0;
1263         }
1264
1265         drm = nouveau_bdev(bdev);
1266         dev = drm->dev->dev;
1267
1268 #if IS_ENABLED(CONFIG_AGP)
1269         if (drm->agp.bridge) {
1270                 return ttm_agp_tt_populate(bdev, ttm, ctx);
1271         }
1272 #endif
1273
1274 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1275         if (swiotlb_nr_tbl()) {
1276                 return ttm_dma_populate((void *)ttm, dev, ctx);
1277         }
1278 #endif
1279         return ttm_populate_and_map_pages(dev, ttm_dma, ctx);
1280 }
1281
1282 static void
1283 nouveau_ttm_tt_unpopulate(struct ttm_bo_device *bdev,
1284                           struct ttm_tt *ttm)
1285 {
1286         struct ttm_dma_tt *ttm_dma = (void *)ttm;
1287         struct nouveau_drm *drm;
1288         struct device *dev;
1289         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
1290
1291         if (slave)
1292                 return;
1293
1294         drm = nouveau_bdev(bdev);
1295         dev = drm->dev->dev;
1296
1297 #if IS_ENABLED(CONFIG_AGP)
1298         if (drm->agp.bridge) {
1299                 ttm_agp_tt_unpopulate(bdev, ttm);
1300                 return;
1301         }
1302 #endif
1303
1304 #if IS_ENABLED(CONFIG_SWIOTLB) && IS_ENABLED(CONFIG_X86)
1305         if (swiotlb_nr_tbl()) {
1306                 ttm_dma_unpopulate((void *)ttm, dev);
1307                 return;
1308         }
1309 #endif
1310
1311         ttm_unmap_and_unpopulate_pages(dev, ttm_dma);
1312 }
1313
1314 static void
1315 nouveau_ttm_tt_destroy(struct ttm_bo_device *bdev,
1316                        struct ttm_tt *ttm)
1317 {
1318 #if IS_ENABLED(CONFIG_AGP)
1319         struct nouveau_drm *drm = nouveau_bdev(bdev);
1320         if (drm->agp.bridge) {
1321                 ttm_agp_destroy(bdev, ttm);
1322                 return;
1323         }
1324 #endif
1325         nouveau_sgdma_destroy(bdev, ttm);
1326 }
1327
1328 void
1329 nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence, bool exclusive)
1330 {
1331         struct dma_resv *resv = nvbo->bo.base.resv;
1332
1333         if (exclusive)
1334                 dma_resv_add_excl_fence(resv, &fence->base);
1335         else if (fence)
1336                 dma_resv_add_shared_fence(resv, &fence->base);
1337 }
1338
1339 struct ttm_bo_driver nouveau_bo_driver = {
1340         .ttm_tt_create = &nouveau_ttm_tt_create,
1341         .ttm_tt_populate = &nouveau_ttm_tt_populate,
1342         .ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1343         .ttm_tt_bind = &nouveau_ttm_tt_bind,
1344         .ttm_tt_unbind = &nouveau_ttm_tt_unbind,
1345         .ttm_tt_destroy = &nouveau_ttm_tt_destroy,
1346         .eviction_valuable = ttm_bo_eviction_valuable,
1347         .evict_flags = nouveau_bo_evict_flags,
1348         .move_notify = nouveau_bo_move_ntfy,
1349         .move = nouveau_bo_move,
1350         .verify_access = nouveau_bo_verify_access,
1351         .fault_reserve_notify = &nouveau_ttm_fault_reserve_notify,
1352         .io_mem_reserve = &nouveau_ttm_io_mem_reserve,
1353         .io_mem_free = &nouveau_ttm_io_mem_free,
1354 };